diff options
Diffstat (limited to 'src/mesa')
131 files changed, 3784 insertions, 2057 deletions
diff --git a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h index 0495d0e276..c548ef3ad5 100644 --- a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h +++ b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h @@ -38,11 +38,11 @@ static void TAG(emit)(GLcontext *ctx, GLuint start, GLuint end) #endif #if (IND & (FFB_VB_RGBA_BIT)) - col0 = VB->ColorPtr[0]->data; - col0_stride = VB->ColorPtr[0]->stride; + col0 = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col0_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; #if (IND & (FFB_VB_TWOSIDE_BIT)) - col1 = VB->ColorPtr[1]->data; - col1_stride = VB->ColorPtr[1]->stride; + col1 = VB->BackfaceColorPtr->data; + col1_stride = VB->BackfaceColorPtr->stride; #endif #endif diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c index 1b9fd169f4..a03a93d132 100644 --- a/src/mesa/drivers/dri/gamma/gamma_render.c +++ b/src/mesa/drivers/dri/gamma/gamma_render.c @@ -53,13 +53,13 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end) GLfloat (*tc0)[4] = 0; GLuint tc0_size = 0; - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; if (ctx->Texture.Unit[0]._ReallyEnabled) { - tc0_stride = VB->TexCoordPtr[0]->stride; - tc0 = VB->TexCoordPtr[0]->data; - tc0_size = VB->TexCoordPtr[0]->size; + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0]->stride; + tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data; + tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0]->size; coord = VB->ClipPtr->data; coord_stride = VB->ClipPtr->stride; } else { diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c index ce409b3a60..27c5aa1e08 100644 --- a/src/mesa/drivers/dri/i915/i830_texstate.c +++ b/src/mesa/drivers/dri/i915/i830_texstate.c @@ -27,6 +27,7 @@ #include "main/mtypes.h" #include "main/enums.h" +#include "main/colormac.h" #include "intel_mipmap_tree.h" #include "intel_tex.h" @@ -308,11 +309,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]); CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]); - state[I830_TEXREG_TM0S4] = INTEL_PACKCOLOR8888(border[0], - border[1], - border[2], - border[3]); - + state[I830_TEXREG_TM0S4] = PACK_COLOR_8888(border[3], + border[0], + border[1], + border[2]); I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE); /* memcmp was already disabled, but definitely won't work as the diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index e8c8d5a048..1e3c8301d8 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -126,7 +126,7 @@ i830_render_start(struct intel_context *intel) for (i = 0; i < I830_TEX_UNITS; i++) { if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_TEX(i))) { - GLuint sz = VB->TexCoordPtr[i]->size; + GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; GLuint emit; GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] & ~TEXCOORDTYPE_MASK); @@ -714,9 +714,6 @@ i830_new_batch(struct intel_context *intel) { struct i830_context *i830 = i830_context(&intel->ctx); i830->state.emitted = 0; - - /* Check that we didn't just wrap our batchbuffer at a bad time. */ - assert(!intel->no_batch_wrap); } static void diff --git a/src/mesa/drivers/dri/i915/i915_context.c b/src/mesa/drivers/dri/i915/i915_context.c index 7d4c7cfbab..0485be2cc1 100644 --- a/src/mesa/drivers/dri/i915/i915_context.c +++ b/src/mesa/drivers/dri/i915/i915_context.c @@ -143,6 +143,9 @@ i915CreateContext(const __GLcontextModes * mesaVis, ctx->Const.MaxTextureImageUnits = I915_TEX_UNITS; ctx->Const.MaxTextureCoordUnits = I915_TEX_UNITS; ctx->Const.MaxVarying = I915_TEX_UNITS; + ctx->Const.MaxCombinedTextureImageUnits = + ctx->Const.MaxVertexTextureImageUnits + + ctx->Const.MaxTextureImageUnits; /* Advertise the full hardware capabilities. The new memory * manager should cope much better with overload situations: diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c index d9c61446f5..9e4d318036 100644 --- a/src/mesa/drivers/dri/i915/i915_fragprog.c +++ b/src/mesa/drivers/dri/i915/i915_fragprog.c @@ -1301,7 +1301,7 @@ i915ValidateFragmentProgram(struct i915_context *i915) for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) { if (inputsRead & FRAG_BIT_TEX(i)) { - int sz = VB->TexCoordPtr[i]->size; + int sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK); s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz)); diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index f52ff2bcc4..2b03331a00 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -28,6 +28,7 @@ #include "main/mtypes.h" #include "main/enums.h" #include "main/macros.h" +#include "main/colormac.h" #include "intel_mipmap_tree.h" #include "intel_tex.h" @@ -360,15 +361,15 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3) * R channel, while the hardware uses A. Spam R into all the channels * for safety. */ - state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0], - border[0], - border[0], - border[0]); + state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[0], + border[0], + border[0], + border[0]); } else { - state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0], - border[1], - border[2], - border[3]); + state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[3], + border[0], + border[1], + border[2]); } diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index ff97e5a944..ba6be9796e 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -667,9 +667,6 @@ i915_new_batch(struct intel_context *intel) * difficulties associated with them (physical address requirements). */ i915->state.emitted = 0; - - /* Check that we didn't just wrap our batchbuffer at a bad time. */ - assert(!intel->no_batch_wrap); } static void diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index bc527aae47..8a3ab39bc2 100644 --- a/src/mesa/drivers/dri/i915/intel_tris.c +++ b/src/mesa/drivers/dri/i915/intel_tris.c @@ -1250,81 +1250,6 @@ union fi GLint i; }; - -/**********************************************************************/ -/* Used only with the metaops callbacks. */ -/**********************************************************************/ -static void -intel_meta_draw_poly(struct intel_context *intel, - GLuint n, - GLfloat xy[][2], - GLfloat z, GLuint color, GLfloat tex[][2]) -{ - union fi *vb; - GLint i; - unsigned int saved_vertex_size = intel->vertex_size; - - LOCK_HARDWARE(intel); - - intel->vertex_size = 6; - - /* All 3d primitives should be emitted with LOOP_CLIPRECTS, - * otherwise the drawing origin (DR4) might not be set correctly. - */ - intel_set_prim(intel, PRIM3D_TRIFAN); - vb = (union fi *) intel_get_prim_space(intel, n); - - for (i = 0; i < n; i++) { - vb[0].f = xy[i][0]; - vb[1].f = xy[i][1]; - vb[2].f = z; - vb[3].i = color; - vb[4].f = tex[i][0]; - vb[5].f = tex[i][1]; - vb += 6; - } - - INTEL_FIREVERTICES(intel); - - intel->vertex_size = saved_vertex_size; - - UNLOCK_HARDWARE(intel); -} - -static void -intel_meta_draw_quad(struct intel_context *intel, - GLfloat x0, GLfloat x1, - GLfloat y0, GLfloat y1, - GLfloat z, - GLuint color, - GLfloat s0, GLfloat s1, GLfloat t0, GLfloat t1) -{ - GLfloat xy[4][2]; - GLfloat tex[4][2]; - - xy[0][0] = x0; - xy[0][1] = y0; - xy[1][0] = x1; - xy[1][1] = y0; - xy[2][0] = x1; - xy[2][1] = y1; - xy[3][0] = x0; - xy[3][1] = y1; - - tex[0][0] = s0; - tex[0][1] = t0; - tex[1][0] = s1; - tex[1][1] = t0; - tex[2][0] = s1; - tex[2][1] = t1; - tex[3][0] = s0; - tex[3][1] = t1; - - intel_meta_draw_poly(intel, 4, xy, z, color, tex); -} - - - /**********************************************************************/ /* Initialization. */ /**********************************************************************/ @@ -1333,7 +1258,6 @@ intel_meta_draw_quad(struct intel_context *intel, void intelInitTriFuncs(GLcontext * ctx) { - struct intel_context *intel = intel_context(ctx); TNLcontext *tnl = TNL_CONTEXT(ctx); static int firsttime = 1; @@ -1350,6 +1274,4 @@ intelInitTriFuncs(GLcontext * ctx) tnl->Driver.Render.BuildVertices = _tnl_build_vertices; tnl->Driver.Render.CopyPV = _tnl_copy_pv; tnl->Driver.Render.Interp = _tnl_interp; - - intel->vtbl.meta_draw_quad = intel_meta_draw_quad; } diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c index 48685c087b..78bea82949 100644 --- a/src/mesa/drivers/dri/i965/brw_context.c +++ b/src/mesa/drivers/dri/i965/brw_context.c @@ -111,6 +111,9 @@ GLboolean brwCreateContext( const __GLcontextModes *mesaVis, ctx->Const.MaxTextureUnits = MIN2(ctx->Const.MaxTextureCoordUnits, ctx->Const.MaxTextureImageUnits); ctx->Const.MaxVertexTextureImageUnits = 0; /* no vertex shader textures */ + ctx->Const.MaxCombinedTextureImageUnits = + ctx->Const.MaxVertexTextureImageUnits + + ctx->Const.MaxTextureImageUnits; /* Mesa limits textures to 4kx4k; it would be nice to fix that someday */ diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index fded47aa2f..e73e21433c 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -172,8 +172,8 @@ struct brw_fragment_program { GLuint id; /**< serial no. to identify frag progs, never re-used */ GLboolean isGLSL; /**< really, any IF/LOOP/CONT/BREAK instructions */ - dri_bo *const_buffer; /** Program constant buffer/surface */ GLboolean use_const_buffer; + dri_bo *const_buffer; /** Program constant buffer/surface */ /** for debugging, which texture units are referenced */ GLbitfield tex_units_used; @@ -438,7 +438,6 @@ struct brw_context GLuint primitive; GLboolean emit_state_always; - GLboolean no_batch_wrap; struct { struct brw_state_flags dirty; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 8bcb6083f7..7ad860898f 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -145,7 +145,7 @@ static void brw_emit_prim(struct brw_context *brw, prim_packet.base_vert_location = prim->basevertex; /* Can't wrap here, since we rely on the validated state. */ - brw->no_batch_wrap = GL_TRUE; + intel->no_batch_wrap = GL_TRUE; /* If we're set to always flush, do it before and after the primitive emit. * We want to catch both missed flushes that hurt instruction/state cache @@ -163,7 +163,7 @@ static void brw_emit_prim(struct brw_context *brw, intel_batchbuffer_emit_mi_flush(intel->batch); } - brw->no_batch_wrap = GL_FALSE; + intel->no_batch_wrap = GL_FALSE; } static void brw_merge_inputs( struct brw_context *brw, diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 271a88dae0..7c796dae93 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -243,14 +243,6 @@ static void wrap_buffers( struct brw_context *brw, dri_bo_unreference(brw->vb.upload.bo); brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO", size, 1); - - /* Set the internal VBO\ to no-backing-store. We only use them as a - * temporary within a brw_try_draw_prims while the lock is held. - */ - /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH - FAKE TO PUSH THIS STUFF */ -// if (!brw->intel.ttm) -// dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL); } static void get_space( struct brw_context *brw, diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 34aaea3736..72749b3859 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -150,9 +150,6 @@ static void brw_new_batch( struct intel_context *intel ) { struct brw_context *brw = brw_context(&intel->ctx); - /* Check that we didn't just wrap our batchbuffer at a bad time. */ - assert(!brw->no_batch_wrap); - brw->curbe.need_new_bo = GL_TRUE; /* Mark all context state as needing to be re-emitted. diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 9dcb6e14bb..b9b987ea70 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -76,10 +76,10 @@ struct brw_wm_prog_key { GLushort tex_swizzles[BRW_MAX_TEX_UNIT]; - GLuint program_string_id:32; GLushort origin_x, origin_y; GLushort drawable_height; GLbitfield64 vp_outputs_written; + GLuint program_string_id:32; }; diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index 7d03179588..3737faf26f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -138,7 +138,6 @@ static struct prog_dst_register dst_reg(GLuint file, GLuint idx) reg.CondMask = COND_TR; reg.CondSwizzle = 0; reg.CondSrc = 0; - reg.pad = 0; return reg; } diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index ca6e2fa5b1..2eae9b66d8 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -80,7 +80,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch) batch->buf = NULL; } - if (!batch->buffer && intel->ttm == GL_TRUE) + if (!batch->buffer) batch->buffer = malloc (intel->maxBatchSize); batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer", @@ -212,7 +212,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file, batch->reserved_space = 0; /* Emit a flush if the bufmgr doesn't do it for us. */ - if (intel->always_flush_cache || !intel->ttm) { + if (intel->always_flush_cache) { intel_batchbuffer_emit_mi_flush(batch); used = batch->ptr - batch->map; } @@ -244,6 +244,9 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file, if (intel->vtbl.finish_batch) intel->vtbl.finish_batch(intel); + /* Check that we didn't just wrap our batchbuffer at a bad time. */ + assert(!intel->no_batch_wrap); + batch->reserved_space = BATCH_RESERVED; /* TODO: Just pass the relocation list and dma buffer up to the diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index 9f638b0ef9..cdf1408cd3 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -499,10 +499,11 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask) switch (irb->Base.Format) { case MESA_FORMAT_ARGB8888: case MESA_FORMAT_XRGB8888: - clearVal = intel->ClearColor8888; + clearVal = PACK_COLOR_8888(clear[3], clear[0], + clear[1], clear[2]); break; case MESA_FORMAT_RGB565: - clearVal = intel->ClearColor565; + clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]); break; case MESA_FORMAT_ARGB4444: clearVal = PACK_COLOR_4444(clear[3], clear[0], diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 2aeca6b81b..1434ae530b 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -176,9 +176,7 @@ intelGetString(GLcontext * ctx, GLenum name) break; } - (void) driGetRendererString(buffer, chipset, - (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE, - 0); + (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0); return (GLubyte *) buffer; default: @@ -601,6 +599,7 @@ intelInitContext(struct intel_context *intel, __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private; int fthrottle_mode; + int bo_reuse_mode; if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx, functions, (void *) intel)) { @@ -635,18 +634,14 @@ intelInitContext(struct intel_context *intel, intel->maxBatchSize = BATCH_SZ; intel->bufmgr = intelScreen->bufmgr; - intel->ttm = intelScreen->ttm; - if (intel->ttm) { - int bo_reuse_mode; - bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); - switch (bo_reuse_mode) { - case DRI_CONF_BO_REUSE_DISABLED: - break; - case DRI_CONF_BO_REUSE_ALL: - intel_bufmgr_gem_enable_reuse(intel->bufmgr); - break; - } + bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); + switch (bo_reuse_mode) { + case DRI_CONF_BO_REUSE_DISABLED: + break; + case DRI_CONF_BO_REUSE_ALL: + intel_bufmgr_gem_enable_reuse(intel->bufmgr); + break; } /* This doesn't yet catch all non-conformant rendering, but it's a @@ -733,12 +728,6 @@ intelInitContext(struct intel_context *intel, intel->RenderIndex = ~0; fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode"); - intel->irqsEmitted = 0; - - intel->do_irqs = (intel->intelScreen->irq_active && - fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS); - - intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS); if (intel->gen >= 4 && !intel->intelScreen->irq_active) { _mesa_printf("IRQs not active. Exiting\n"); @@ -1058,21 +1047,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags) sarea->ctxOwner = me; } - /* If the last consumer of the texture memory wasn't us, notify the fake - * bufmgr and record the new owner. We should have the memory shared - * between contexts of a single fake bufmgr, but this will at least make - * things correct for now. - */ - if (!intel->ttm && sarea->texAge != intel->hHWContext) { - sarea->texAge = intel->hHWContext; - intel_bufmgr_fake_contended_lock_take(intel->bufmgr); - if (INTEL_DEBUG & DEBUG_BATCH) - intel_decode_context_reset(); - if (INTEL_DEBUG & DEBUG_BUFMGR) - fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n", - sarea->ctxOwner, intel->hHWContext); - } - /* Drawable changed? */ if (dPriv && intel->lastStamp != dPriv->lastStamp) { diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index eb7be7ddd0..481202c971 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -135,14 +135,6 @@ struct intel_context struct intel_region * draw_region, struct intel_region * depth_region); - void (*meta_draw_quad)(struct intel_context *intel, - GLfloat x0, GLfloat x1, - GLfloat y0, GLfloat y1, - GLfloat z, - GLuint color, /* ARGB32 */ - GLfloat s0, GLfloat s1, - GLfloat t0, GLfloat t1); - void (*meta_color_mask) (struct intel_context * intel, GLboolean); void (*meta_stencil_replace) (struct intel_context * intel, @@ -189,12 +181,6 @@ struct intel_context struct intel_region *back_region; struct intel_region *depth_region; - /** - * This value indicates that the kernel memory manager is being used - * instead of the fake client-side memory manager. - */ - GLboolean ttm; - struct intel_batchbuffer *batch; drm_intel_bo *first_post_swapbuffers_batch; GLboolean no_batch_wrap; @@ -217,10 +203,6 @@ struct intel_context char *prevLockFile; int prevLockLine; - GLuint ClearColor565; - GLuint ClearColor8888; - - /* Offsets of fields within the current vertex: */ GLuint coloroffset; @@ -237,6 +219,7 @@ struct intel_context GLboolean hw_stipple; GLboolean depth_buffer_is_float; GLboolean no_rast; + GLboolean no_hw; GLboolean always_flush_batch; GLboolean always_flush_cache; @@ -302,13 +285,6 @@ struct intel_context GLboolean use_early_z; drm_clip_rect_t fboRect; /**< cliprect for FBO rendering */ - int perf_boxes; - - GLuint do_usleeps; - int do_irqs; - GLuint irqsEmitted; - - GLboolean scissor; drm_clip_rect_t draw_rect; drm_clip_rect_t scissor_rect; @@ -325,8 +301,6 @@ struct intel_context GLuint lastStamp; - GLboolean no_hw; - /** * Configuration cache */ @@ -374,29 +348,6 @@ do { \ } while (0) /* ================================================================ - * Color packing: - */ - -#define INTEL_PACKCOLOR4444(r,g,b,a) \ - ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) - -#define INTEL_PACKCOLOR1555(r,g,b,a) \ - ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ - ((a) ? 0x8000 : 0)) - -#define INTEL_PACKCOLOR565(r,g,b) \ - ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) - -#define INTEL_PACKCOLOR8888(r,g,b,a) \ - ((a<<24) | (r<<16) | (g<<8) | b) - -#define INTEL_PACKCOLOR(format, r, g, b, a) \ -(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) : \ - (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) : \ - (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) : \ - 0))) - -/* ================================================================ * From linux kernel i386 header files, copes with odd sizes better * than COPY_DWORDS would: * XXX Put this in src/mesa/main/imports.h ??? diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index 48cdae509e..86dc42cc51 100644 --- a/src/mesa/drivers/dri/intel/intel_extensions.c +++ b/src/mesa/drivers/dri/intel/intel_extensions.c @@ -79,6 +79,7 @@ static const struct dri_extension card_extensions[] = { { "GL_ARB_half_float_pixel", NULL }, { "GL_ARB_map_buffer_range", GL_ARB_map_buffer_range_functions }, { "GL_ARB_multitexture", NULL }, + { "GL_ARB_pixel_buffer_object", NULL }, { "GL_ARB_point_parameters", GL_ARB_point_parameters_functions }, { "GL_ARB_point_sprite", NULL }, { "GL_ARB_shader_objects", GL_ARB_shader_objects_functions }, @@ -104,6 +105,8 @@ static const struct dri_extension card_extensions[] = { { "GL_EXT_blend_logic_op", NULL }, { "GL_EXT_blend_subtract", NULL }, { "GL_EXT_cull_vertex", GL_EXT_cull_vertex_functions }, + { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions }, + { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, { "GL_EXT_fog_coord", GL_EXT_fog_coord_functions }, { "GL_EXT_gpu_program_parameters", GL_EXT_gpu_program_parameters_functions }, { "GL_EXT_packed_depth_stencil", NULL }, @@ -175,14 +178,6 @@ static const struct dri_extension arb_oq_extensions[] = { { NULL, NULL } }; - -static const struct dri_extension ttm_extensions[] = { - { "GL_ARB_pixel_buffer_object", NULL }, - { "GL_EXT_framebuffer_blit", GL_EXT_framebuffer_blit_functions }, - { "GL_EXT_framebuffer_object", GL_EXT_framebuffer_object_functions }, - { NULL, NULL } -}; - static const struct dri_extension fragment_shader_extensions[] = { { "GL_ARB_fragment_shader", NULL }, { NULL, NULL } @@ -201,9 +196,6 @@ intelInitExtensions(GLcontext *ctx) */ driInitExtensions(ctx, card_extensions, GL_FALSE); - if (intel->ttm) - driInitExtensions(ctx, ttm_extensions, GL_FALSE); - if (IS_965(intel->intelScreen->deviceID)) driInitExtensions(ctx, brw_extensions, GL_FALSE); diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index abb3024bfb..6a565f80cf 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -224,16 +224,12 @@ int intel_miptree_pitch_align (struct intel_context *intel, if (!mt->compressed) { int pitch_align; - if (intel->ttm) { - /* XXX: Align pitch to multiple of 64 bytes for now to allow - * render-to-texture to work in all cases. This should probably be - * replaced at some point by some scheme to only do this when really - * necessary. - */ - pitch_align = 64; - } else { - pitch_align = 4; - } + /* XXX: Align pitch to multiple of 64 bytes for now to allow + * render-to-texture to work in all cases. This should probably be + * replaced at some point by some scheme to only do this when really + * necessary. + */ + pitch_align = 64; if (tiling == I915_TILING_X) pitch_align = 512; diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c index 204a233173..668697cb5e 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c @@ -228,10 +228,9 @@ do_blit_bitmap( GLcontext *ctx, UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]); if (dst->cpp == 2) - color = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]); + color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]); else - color = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1], - ubcolor[2], ubcolor[3]); + color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]); if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F)) return GL_FALSE; diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index 80975163d4..d6b9dc4446 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -542,55 +542,18 @@ intel_recreate_static(struct intel_context *intel, region->buffer = NULL; } - if (intel->ttm) { - assert(region_desc->bo_handle != -1); - region->buffer = intel_bo_gem_create_from_name(intel->bufmgr, - name, - region_desc->bo_handle); - - ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, - ®ion->bit_6_swizzle); - if (ret != 0) { - fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", - region_desc->bo_handle, name, strerror(-ret)); - intel_region_release(®ion); - return NULL; - } - } else { - if (region->classic_map != NULL) { - drmUnmap(region->classic_map, - region->pitch * region->cpp * region->height); - region->classic_map = NULL; - } - ret = drmMap(intel->driFd, region_desc->handle, - region->pitch * region->cpp * region->height, - ®ion->classic_map); - if (ret != 0) { - fprintf(stderr, "Failed to drmMap %s buffer\n", name); - free(region); - return NULL; - } - - region->buffer = intel_bo_fake_alloc_static(intel->bufmgr, + assert(region_desc->bo_handle != -1); + region->buffer = intel_bo_gem_create_from_name(intel->bufmgr, name, - region_desc->offset, - region->pitch * region->cpp * - region->height, - region->classic_map); - - /* The sarea just gives us a boolean for whether it's tiled or not, - * instead of which tiling mode it is. Guess. - */ - if (region_desc->tiled) { - if (intel->gen >= 4 && region_desc == &intelScreen->depth) - region->tiling = I915_TILING_Y; - else - region->tiling = I915_TILING_X; - } else { - region->tiling = I915_TILING_NONE; - } + region_desc->bo_handle); - region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE; + ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, + ®ion->bit_6_swizzle); + if (ret != 0) { + fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", + region_desc->bo_handle, name, strerror(-ret)); + intel_region_release(®ion); + return NULL; } assert(region->buffer != NULL); diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 789135b49f..2c5a884a9b 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -605,7 +605,6 @@ intelFillInModes(__DRIscreenPrivate *psp, static GLboolean intel_init_bufmgr(intelScreenPrivate *intelScreen) { - GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL; int gem_kernel = 0; GLboolean gem_supported; struct drm_i915_getparam gp; @@ -622,43 +621,24 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen) /* If we've got a new enough DDX that's initializing GEM and giving us * object handles for the shared buffers, use that. */ - intelScreen->ttm = GL_FALSE; if (intelScreen->driScrnPriv->dri2.enabled) gem_supported = GL_TRUE; else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 && gem_kernel && intelScreen->front.bo_handle != -1) gem_supported = GL_TRUE; - else - gem_supported = GL_FALSE; - - if (!gem_disable && gem_supported) { - intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ); - if (intelScreen->bufmgr != NULL) - intelScreen->ttm = GL_TRUE; + else { + fprintf(stderr, "[%s:%u] Error initializing GEM.\n", + __func__, __LINE__); + return GL_FALSE; } + + intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ); /* Otherwise, use the classic buffer manager. */ if (intelScreen->bufmgr == NULL) { - if (gem_disable) { - _mesa_warning(NULL, "GEM disabled. Using classic."); - } else { - _mesa_warning(NULL, - "Failed to initialize GEM. Falling back to classic."); - } - - if (intelScreen->tex.size == 0) { - fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", - __func__, __LINE__); - return GL_FALSE; - } - - intelScreen->bufmgr = - intel_bufmgr_fake_init(spriv->fd, - intelScreen->tex.offset, - intelScreen->tex.map, - intelScreen->tex.size, - (unsigned int * volatile) - &intelScreen->sarea->last_dispatch); + fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", + __func__, __LINE__); + return GL_FALSE; } if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences)) diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h index a9b9e109a6..14ca0903b6 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.h +++ b/src/mesa/drivers/dri/intel/intel_screen.h @@ -77,7 +77,6 @@ typedef struct GLboolean no_hw; GLboolean no_vbo; - int ttm; dri_bufmgr *bufmgr; GLboolean kernel_exec_fencing; diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index 34c3d9df74..d1681e9088 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -613,15 +613,7 @@ intel_set_span_functions(struct intel_context *intel, struct gl_renderbuffer *rb) { struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; - uint32_t tiling; - - /* If in GEM mode, we need to do the tile address swizzling ourselves, - * instead of the fence registers handling it. - */ - if (intel->ttm) - tiling = irb->region->tiling; - else - tiling = I915_TILING_NONE; + uint32_t tiling = irb->region->tiling; if (intel->intelScreen->kernel_exec_fencing) { switch (irb->Base.Format) { @@ -667,6 +659,9 @@ intel_set_span_functions(struct intel_context *intel, return; } + /* If in GEM mode, we need to do the tile address swizzling ourselves, + * instead of the fence registers handling it. + */ switch (irb->Base.Format) { case MESA_FORMAT_RGB565: switch (tiling) { diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c index 4ee742377d..aefae53eb2 100644 --- a/src/mesa/drivers/dri/intel/intel_state.c +++ b/src/mesa/drivers/dri/intel/intel_state.c @@ -196,25 +196,6 @@ intel_translate_logic_op(GLenum opcode) } } - -static void -intelClearColor(GLcontext *ctx, const GLfloat color[4]) -{ - struct intel_context *intel = intel_context(ctx); - GLubyte clear[4]; - - CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]); - CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]); - CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]); - CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]); - - /* compute both 32 and 16-bit clear values */ - intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1], - clear[2], clear[3]); - intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]); -} - - /* Fallback to swrast for select and feedback. */ static void @@ -229,5 +210,4 @@ void intelInitStateFuncs(struct dd_function_table *functions) { functions->RenderMode = intelRenderMode; - functions->ClearColor = intelClearColor; } diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vb.c b/src/mesa/drivers/dri/mach64/mach64_native_vb.c index 99f1a14e17..816682ec5f 100644 --- a/src/mesa/drivers/dri/mach64/mach64_native_vb.c +++ b/src/mesa/drivers/dri/mach64/mach64_native_vb.c @@ -207,19 +207,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx, LOCALVARS struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); + if (VB->BackfaceColorPtr) { + assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat)); INTERP_4F( t, - GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], out), - GET_COLOR(VB->ColorPtr[1], in) ); + GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, out), + GET_COLOR(VB->BackfaceColorPtr, in) ); - if (VB->SecondaryColorPtr[1]) { + if (VB->BackfaceSecondaryColorPtr) { INTERP_3F( t, - GET_COLOR(VB->SecondaryColorPtr[1], dst), - GET_COLOR(VB->SecondaryColorPtr[1], out), - GET_COLOR(VB->SecondaryColorPtr[1], in) ); + GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), + GET_COLOR(VB->BackfaceSecondaryColorPtr, out), + GET_COLOR(VB->BackfaceSecondaryColorPtr, in) ); } } @@ -236,13 +236,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx, LOCALVARS struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], src) ); + if (VB->BackfaceColorPtr) { + COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, src) ); - if (VB->SecondaryColorPtr[1]) { - COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst), - GET_COLOR(VB->SecondaryColorPtr[1], src) ); + if (VB->BackfaceSecondaryColorPtr) { + COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), + GET_COLOR(VB->BackfaceSecondaryColorPtr, src) ); } } diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h index 684f2acc89..6e5fa3520e 100644 --- a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h +++ b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h @@ -103,10 +103,10 @@ static void TAG(emit)( GLcontext *ctx, #if DO_TEX1 { const GLuint t1 = GET_TEXSOURCE(1); - tc1 = VB->TexCoordPtr[t1]->data; - tc1_stride = VB->TexCoordPtr[t1]->stride; + tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; + tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride; #if DO_PTEX - tc1_size = VB->TexCoordPtr[t1]->size; + tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size; #endif } #endif @@ -114,18 +114,18 @@ static void TAG(emit)( GLcontext *ctx, #if DO_TEX0 { const GLuint t0 = GET_TEXSOURCE(0); - tc0 = VB->TexCoordPtr[t0]->data; - tc0_stride = VB->TexCoordPtr[t0]->stride; + tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data; + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; #if DO_PTEX - tc0_size = VB->TexCoordPtr[t0]->size; + tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size; #endif } #endif #if DO_SPEC - if (VB->SecondaryColorPtr[0]) { - spec = VB->SecondaryColorPtr[0]->data; - spec_stride = VB->SecondaryColorPtr[0]->stride; + if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { + spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; + spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride; } else { spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1]; spec_stride = 0; @@ -133,9 +133,9 @@ static void TAG(emit)( GLcontext *ctx, #endif #if DO_FOG - if (VB->FogCoordPtr) { - fog = VB->FogCoordPtr->data; - fog_stride = VB->FogCoordPtr->stride; + if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { + fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; + fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride; } else { static GLfloat tmp[4] = {0, 0, 0, 0}; fog = &tmp; @@ -144,8 +144,8 @@ static void TAG(emit)( GLcontext *ctx, #endif #if DO_RGBA - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; #endif coord = VB->NdcPtr->data; @@ -319,8 +319,8 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* Force 'missing' texcoords to something valid. */ - if (DO_TEX1 && VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; if (DO_PTEX) return GL_TRUE; @@ -328,12 +328,12 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* No hardware support for projective texture. Can fake it for * TEX0 only. */ - if ((DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) { + if ((DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) { PTEX_FALLBACK(); return GL_FALSE; } - if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) { + if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) { if (DO_TEX1) { PTEX_FALLBACK(); } diff --git a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h index 938804af9e..60bfab8f6d 100644 --- a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h +++ b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h @@ -156,53 +156,53 @@ static void TAG(emit)( GLcontext *ctx, if (DO_TEX3) { const GLuint t3 = GET_TEXSOURCE(3); - tc3 = VB->TexCoordPtr[t3]->data; - tc3_stride = VB->TexCoordPtr[t3]->stride; + tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data; + tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride; if (DO_PTEX) - tc3_size = VB->TexCoordPtr[t3]->size; + tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size; } if (DO_TEX2) { const GLuint t2 = GET_TEXSOURCE(2); - tc2 = VB->TexCoordPtr[t2]->data; - tc2_stride = VB->TexCoordPtr[t2]->stride; + tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; + tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride; if (DO_PTEX) - tc2_size = VB->TexCoordPtr[t2]->size; + tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size; } if (DO_TEX1) { const GLuint t1 = GET_TEXSOURCE(1); - tc1 = VB->TexCoordPtr[t1]->data; - tc1_stride = VB->TexCoordPtr[t1]->stride; + tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; + tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride; if (DO_PTEX) - tc1_size = VB->TexCoordPtr[t1]->size; + tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size; } if (DO_TEX0) { const GLuint t0 = GET_TEXSOURCE(0); - tc0_stride = VB->TexCoordPtr[t0]->stride; - tc0 = VB->TexCoordPtr[t0]->data; + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; + tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data; if (DO_PTEX) - tc0_size = VB->TexCoordPtr[t0]->size; + tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size; } if (DO_RGBA) { - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; } if (DO_SPEC) { - spec = VB->SecondaryColorPtr[0]->data; - spec_stride = VB->SecondaryColorPtr[0]->stride; + spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; + spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride; } else { spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1]; spec_stride = 0; } if (DO_FOG) { - if (VB->FogCoordPtr) { - fog = VB->FogCoordPtr->data; - fog_stride = VB->FogCoordPtr->stride; + if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { + fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; + fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride; } else { static GLfloat tmp[4] = {0, 0, 0, 0}; fog = &tmp; @@ -384,8 +384,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end, ASSERT(stride == 4); - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; /* Pack what's left into a 4-dword vertex. Color is in a different * place, and there is no 'w' coordinate. @@ -432,8 +432,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end, GLfloat *v = (GLfloat *)dest; int i; - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; if (start) STRIDE_4F(col, col_stride * start); @@ -473,22 +473,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* Force 'missing' texcoords to something valid. */ - if (DO_TEX3 && VB->TexCoordPtr[2] == 0) - VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; + if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3]; - if (DO_TEX2 && VB->TexCoordPtr[1] == 0) - VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; + if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2]; - if (DO_TEX1 && VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; if (DO_PTEX) return GL_TRUE; - if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || - (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || - (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) || - (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4)) + if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || + (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || + (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) || + (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4)) return GL_FALSE; return GL_TRUE; @@ -501,14 +501,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* Force 'missing' texcoords to something valid. */ - if (DO_TEX3 && VB->TexCoordPtr[2] == 0) - VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; + if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3]; - if (DO_TEX2 && VB->TexCoordPtr[1] == 0) - VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; + if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2]; - if (DO_TEX1 && VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; if (DO_PTEX) return GL_TRUE; @@ -516,14 +516,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* No hardware support for projective texture. Can fake it for * TEX0 only. */ - if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || - (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || - (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) { + if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || + (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || + (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) { PTEX_FALLBACK(); return GL_FALSE; } - if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) { + if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) { if (DO_TEX1 || DO_TEX2 || DO_TEX3) { PTEX_FALLBACK(); } diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c index 5b91271d74..448e34e047 100644 --- a/src/mesa/drivers/dri/r128/r128_tris.c +++ b/src/mesa/drivers/dri/r128/r128_tris.c @@ -650,12 +650,12 @@ static void r128RenderStart( GLcontext *ctx ) } if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[0]) )) { - if ( VB->TexCoordPtr[rmesa->tmu_source[0]]->size > 2 ) + if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[0]]->size > 2 ) fallback_projtex = GL_TRUE; EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, R128_CCE_VC_FRMT_S_T, 8 ); } if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[1]) )) { - if ( VB->TexCoordPtr[rmesa->tmu_source[1]]->size > 2 ) + if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[1]]->size > 2 ) fallback_projtex = GL_TRUE; EMIT_ATTR( _TNL_ATTRIB_TEX1, EMIT_2F, R128_CCE_VC_FRMT_S2_T2, 8 ); } diff --git a/src/mesa/drivers/dri/r200/r200_maos_arrays.c b/src/mesa/drivers/dri/r200/r200_maos_arrays.c index 383a0c4b0d..249c0bbc11 100644 --- a/src/mesa/drivers/dri/r200/r200_maos_arrays.c +++ b/src/mesa/drivers/dri/r200/r200_maos_arrays.c @@ -90,12 +90,14 @@ static void r200_emit_vecfog(GLcontext *ctx, struct radeon_aos *aos, aos->components = size; aos->count = count; + radeon_bo_map(aos->bo, 1); out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); for (i = 0; i < count; i++) { out[0] = r200ComputeFogBlendFactor( ctx, *(GLfloat *)data ); out++; data += stride; } + radeon_bo_unmap(aos->bo); } /* Emit any changed arrays to new GART memory, re-emit a packet to diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index 240fb45078..4596912ddc 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -168,7 +168,7 @@ static void r200SetVertexFormat( GLcontext *ctx ) for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { - GLuint sz = VB->TexCoordPtr[i]->size; + GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; fmt_1 |= sz << (3 * i); EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_1F + sz - 1, 0 ); @@ -297,7 +297,7 @@ void r200_swtcl_flush(GLcontext *ctx, uint32_t current_offset) radeonEmitState(&rmesa->radeon); r200EmitVertexAOS( rmesa, rmesa->radeon.swtcl.vertex_size, - first_elem(&rmesa->radeon.dma.reserved)->bo, + rmesa->radeon.swtcl.bo, current_offset); diff --git a/src/mesa/drivers/dri/r200/r200_texstate.c b/src/mesa/drivers/dri/r200/r200_texstate.c index 7782404a79..e2f9cf0ea8 100644 --- a/src/mesa/drivers/dri/r200/r200_texstate.c +++ b/src/mesa/drivers/dri/r200/r200_texstate.c @@ -797,24 +797,13 @@ void r200SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo return; } - radeon_update_renderbuffers(pDRICtx, dPriv); - /* back & depth buffer are useless free them right away */ - rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } + radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE); rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ return; } - + _mesa_lock_texture(radeon->glCtx, texObj); if (t->bo) { radeon_bo_unref(t->bo); diff --git a/src/mesa/drivers/dri/r300/r300_draw.c b/src/mesa/drivers/dri/r300/r300_draw.c index e9968f9ffe..3dcd986e22 100644 --- a/src/mesa/drivers/dri/r300/r300_draw.c +++ b/src/mesa/drivers/dri/r300/r300_draw.c @@ -100,7 +100,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer GLubyte *in = (GLubyte *)src_ptr; radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4); - + radeon_bo_map(r300->ind_buf.bo, 1); assert(r300->ind_buf.bo->ptr != NULL); out = (GLuint *)ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset); @@ -111,7 +111,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer if (i < mesa_ind_buf->count) { *out++ = in[i]; } - + radeon_bo_unmap(r300->ind_buf.bo); #if MESA_BIG_ENDIAN } else { /* if (mesa_ind_buf->type == GL_UNSIGNED_SHORT) */ GLushort *in = (GLushort *)src_ptr; @@ -120,6 +120,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4); + radeon_bo_map(r300->ind_buf.bo, 1); assert(r300->ind_buf.bo->ptr != NULL); out = (GLuint *)ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset); @@ -130,6 +131,7 @@ static void r300FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer if (i < mesa_ind_buf->count) { *out++ = in[i]; } + radeon_bo_unmap(r300->ind_buf.bo); #endif } @@ -173,10 +175,12 @@ static void r300SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer radeonAllocDmaRegion(&r300->radeon, &r300->ind_buf.bo, &r300->ind_buf.bo_offset, size, 4); + radeon_bo_map(r300->ind_buf.bo, 1); assert(r300->ind_buf.bo->ptr != NULL); dst_ptr = ADD_POINTERS(r300->ind_buf.bo->ptr, r300->ind_buf.bo_offset); _mesa_memcpy(dst_ptr, src_ptr, size); + radeon_bo_unmap(r300->ind_buf.bo); r300->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT); r300->ind_buf.count = mesa_ind_buf->count; @@ -242,6 +246,7 @@ static void r300ConvertAttrib(GLcontext *ctx, int count, const struct gl_client_ } radeonAllocDmaRegion(&r300->radeon, &attr->bo, &attr->bo_offset, sizeof(GLfloat) * input->Size * count, 32); + radeon_bo_map(attr->bo, 1); dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset); radeon_print(RADEON_FALLBACKS, RADEON_IMPORTANT, @@ -280,6 +285,7 @@ static void r300ConvertAttrib(GLcontext *ctx, int count, const struct gl_client_ break; } + radeon_bo_unmap(attr->bo); if (mapped_named_bo) { ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj); } @@ -294,6 +300,8 @@ static void r300AlignDataToDword(GLcontext *ctx, const struct gl_client_array *i radeonAllocDmaRegion(&r300->radeon, &attr->bo, &attr->bo_offset, size, 32); + radeon_bo_map(attr->bo, 1); + if (!input->BufferObj->Pointer) { ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj); mapped_named_bo = GL_TRUE; @@ -317,6 +325,7 @@ static void r300AlignDataToDword(GLcontext *ctx, const struct gl_client_array *i ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj); } + radeon_bo_unmap(attr->bo); attr->stride = dst_stride; } @@ -527,6 +536,7 @@ static void r300AllocDmaRegions(GLcontext *ctx, const struct gl_client_array *in } radeonAllocDmaRegion(&r300->radeon, &vbuf->attribs[index].bo, &vbuf->attribs[index].bo_offset, size, 32); + radeon_bo_map(vbuf->attribs[index].bo, 1); assert(vbuf->attribs[index].bo->ptr != NULL); dst = (uint32_t *)ADD_POINTERS(vbuf->attribs[index].bo->ptr, vbuf->attribs[index].bo_offset); switch (vbuf->attribs[index].dwords) { @@ -536,6 +546,7 @@ static void r300AllocDmaRegions(GLcontext *ctx, const struct gl_client_array *in case 4: radeonEmitVec16(dst, input[i]->Ptr, input[i]->StrideB, local_count); break; default: assert(0); break; } + radeon_bo_unmap(vbuf->attribs[index].bo); } } diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c index ee2c71e1a7..383c8a274b 100644 --- a/src/mesa/drivers/dri/r300/r300_swtcl.c +++ b/src/mesa/drivers/dri/r300/r300_swtcl.c @@ -124,7 +124,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_ } if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) { - VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->ColorPtr[1]; + VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->BackfaceColorPtr; OutputsWritten |= 1 << VERT_RESULT_BFC0; #if MESA_LITTLE_ENDIAN EMIT_ATTR( _TNL_ATTRIB_GENERIC0, EMIT_4UB_4F_RGBA ); @@ -134,7 +134,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_ ADD_ATTR(VERT_ATTRIB_GENERIC0, R300_DATA_TYPE_BYTE, SWTCL_OVM_COLOR2, SWIZZLE_XYZW, MASK_XYZW, 1); #endif if (fp_reads & FRAG_BIT_COL1) { - VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->SecondaryColorPtr[1]; + VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->BackfaceSecondaryColorPtr; GLuint swiz = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE); OutputsWritten |= 1 << VERT_RESULT_BFC1; #if MESA_LITTLE_ENDIAN @@ -159,7 +159,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_ int tex_id = rmesa->selected_fp->wpos_attr - FRAG_ATTRIB_TEX0; VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS]; - VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_POS]; + VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS]; RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id); } @@ -167,7 +167,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_ int tex_id = rmesa->selected_fp->fog_attr - FRAG_ATTRIB_TEX0; VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG]; - VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG]; + VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG]; RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id); } @@ -180,7 +180,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead, GLuint *_ GLuint swiz, format, hw_format; for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { if (fp_reads & FRAG_BIT_TEX(i)) { - switch (VB->TexCoordPtr[i]->size) { + switch (VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size) { case 1: format = EMIT_1F; hw_format = R300_DATA_TYPE_FLOAT_1; @@ -665,11 +665,11 @@ void r300_swtcl_flush(GLcontext *ctx, uint32_t current_offset) r300EmitCacheFlush(rmesa); radeonEmitState(&rmesa->radeon); - r300_emit_scissor(ctx); + r300_emit_scissor(ctx); r300EmitVertexAOS(rmesa, - rmesa->radeon.swtcl.vertex_size, - first_elem(&rmesa->radeon.dma.reserved)->bo, - current_offset); + rmesa->radeon.swtcl.vertex_size, + rmesa->radeon.swtcl.bo, + current_offset); r300EmitVbufPrim(rmesa, rmesa->radeon.swtcl.hw_primitive, diff --git a/src/mesa/drivers/dri/r300/r300_texstate.c b/src/mesa/drivers/dri/r300/r300_texstate.c index e6f2c0c1a7..9eaf390b46 100644 --- a/src/mesa/drivers/dri/r300/r300_texstate.c +++ b/src/mesa/drivers/dri/r300/r300_texstate.c @@ -409,18 +409,7 @@ void r300SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo return; } - radeon_update_renderbuffers(pDRICtx, dPriv); - /* back & depth buffer are useless free them right away */ - rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } + radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE); rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c index dbd233729c..25314eff56 100644 --- a/src/mesa/drivers/dri/r600/r600_context.c +++ b/src/mesa/drivers/dri/r600/r600_context.c @@ -74,6 +74,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "utils.h" #include "xmlpool.h" /* for symbolic values of enum-type options */ +//#define R600_ENABLE_GLSL_TEST 1 + #define need_GL_VERSION_2_0 #define need_GL_ARB_occlusion_query #define need_GL_ARB_point_parameters @@ -109,6 +111,7 @@ static const struct dri_extension card_extensions[] = { {"GL_ARB_texture_env_crossbar", NULL}, {"GL_ARB_texture_env_dot3", NULL}, {"GL_ARB_texture_mirrored_repeat", NULL}, + {"GL_ARB_texture_non_power_of_two", NULL}, {"GL_ARB_vertex_program", GL_ARB_vertex_program_functions}, {"GL_EXT_blend_equation_separate", GL_EXT_blend_equation_separate_functions}, {"GL_EXT_blend_func_separate", GL_EXT_blend_func_separate_functions}, @@ -155,7 +158,11 @@ static const struct dri_extension mm_extensions[] = { * functions added by GL_ATI_separate_stencil. */ static const struct dri_extension gl_20_extension[] = { +#ifdef R600_ENABLE_GLSL_TEST + {"GL_ARB_shading_language_100", GL_VERSION_2_0_functions }, +#else {"GL_VERSION_2_0", GL_VERSION_2_0_functions }, +#endif /* R600_ENABLE_GLSL_TEST */ }; static const struct tnl_pipeline_stage *r600_pipeline[] = { @@ -308,6 +315,26 @@ static void r600InitGLExtensions(GLcontext *ctx) if (r600->radeon.radeonScreen->kernel_mm) driInitExtensions(ctx, mm_extensions, GL_FALSE); +#ifdef R600_ENABLE_GLSL_TEST + driInitExtensions(ctx, gl_20_extension, GL_TRUE); + //_mesa_enable_2_0_extensions(ctx); + //1.5 + ctx->Extensions.ARB_occlusion_query = GL_TRUE; + ctx->Extensions.ARB_vertex_buffer_object = GL_TRUE; + ctx->Extensions.EXT_shadow_funcs = GL_TRUE; + //2.0 + ctx->Extensions.ARB_draw_buffers = GL_TRUE; + ctx->Extensions.ARB_point_sprite = GL_TRUE; + ctx->Extensions.ARB_shader_objects = GL_TRUE; + ctx->Extensions.ARB_vertex_shader = GL_TRUE; + ctx->Extensions.ARB_fragment_shader = GL_TRUE; + ctx->Extensions.EXT_blend_equation_separate = GL_TRUE; + ctx->Extensions.ATI_separate_stencil = GL_TRUE; + + /* glsl compiler has problem if this is not GL_TRUE */ + ctx->Shader.EmitCondCodes = GL_TRUE; +#endif /* R600_ENABLE_GLSL_TEST */ + if (driQueryOptionb (&r600->radeon.optionCache, "disable_stencil_two_side")) _mesa_disable_extension(ctx, "GL_EXT_stencil_two_side"); diff --git a/src/mesa/drivers/dri/r600/r600_texstate.c b/src/mesa/drivers/dri/r600/r600_texstate.c index 4ec315b78c..2a4a6e6ee1 100644 --- a/src/mesa/drivers/dri/r600/r600_texstate.c +++ b/src/mesa/drivers/dri/r600/r600_texstate.c @@ -917,18 +917,7 @@ void r600SetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_fo return; } - radeon_update_renderbuffers(pDRICtx, dPriv); - /* back & depth buffer are useless free them right away */ - rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } + radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE); rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c index 67e0ee7746..e84f524525 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.c +++ b/src/mesa/drivers/dri/r600/r700_assembler.c @@ -32,12 +32,49 @@ #include "main/mtypes.h" #include "main/imports.h" +#include "shader/prog_parameter.h" #include "radeon_debug.h" #include "r600_context.h" #include "r700_assembler.h" +#define USE_CF_FOR_CONTINUE_BREAK 1 +#define USE_CF_FOR_POP_AFTER 1 + +struct prog_instruction noise1_insts[12] = { + {OPCODE_BGNSUB , {{13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {13, 0, 15, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_MOV , {{0, 0, 0, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {0, 0, 2, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_MOV , {{8, 0, 0, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {0, 0, 4, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_MOV , {{8, 0, 585, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {0, 0, 8, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_SGT , {{0, 0, 585, 0, 0, 0}, {8, 0, 1170, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {0, 1, 1, 0, 8, 1672, 0}, 1, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_IF , {{13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {13, 0, 15, 0, 7, 0, 0}, 0, 0, 0, 1, 0, 0, 0, 15, 0, 0, 0}, + {OPCODE_MOV , {{0, 0, 1755, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {0, 0, 1, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_RET , {{13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {13, 0, 15, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_ENDIF , {{13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {13, 0, 15, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_MOV , {{0, 0, 1170, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {0, 0, 1, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_RET , {{13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {13, 0, 15, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0}, + {OPCODE_ENDSUB , {{13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}, {13, 0, 1672, 0, 0, 0}}, {13, 0, 15, 0, 8, 1672, 0}, 0, 0, 0, 1, 0, 0, 0, -1, 0, 0, 0} +}; +float noise1_const[2][4] = { + {0.300000f, 0.900000f, 0.500000f, 0.300000f} +}; + +COMPILED_SUB noise1_presub = { + &(noise1_insts[0]), + 12, + 2, + 1, + 0, + &(noise1_const[0]), + SWIZZLE_X, + SWIZZLE_X, + SWIZZLE_X, + SWIZZLE_X, + {0,0,0}, + 0 +}; + BITS addrmode_PVSDST(PVSDST * pPVSDST) { return pPVSDST->addrmode0 | ((BITS)pPVSDST->addrmode1 << 1); @@ -327,22 +364,27 @@ GLuint GetSurfaceFormat(GLenum eType, GLuint nChannels, GLuint * pClient_size) return(format); } -unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm) +unsigned int r700GetNumOperands(GLuint opcode, GLuint nIsOp3) { - if(pAsm->D.dst.op3) + if(nIsOp3 > 0) { return 3; } - switch (pAsm->D.dst.opcode) + switch (opcode) { case SQ_OP2_INST_ADD: + case SQ_OP2_INST_KILLE: case SQ_OP2_INST_KILLGT: + case SQ_OP2_INST_KILLGE: + case SQ_OP2_INST_KILLNE: case SQ_OP2_INST_MUL: case SQ_OP2_INST_MAX: case SQ_OP2_INST_MIN: //case SQ_OP2_INST_MAX_DX10: //case SQ_OP2_INST_MIN_DX10: + case SQ_OP2_INST_SETE: + case SQ_OP2_INST_SETNE: case SQ_OP2_INST_SETGT: case SQ_OP2_INST_SETGE: case SQ_OP2_INST_PRED_SETE: @@ -358,6 +400,7 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm) case SQ_OP2_INST_MOVA_FLOOR: case SQ_OP2_INST_FRACT: case SQ_OP2_INST_FLOOR: + case SQ_OP2_INST_TRUNC: case SQ_OP2_INST_EXP_IEEE: case SQ_OP2_INST_LOG_CLAMPED: case SQ_OP2_INST_LOG_IEEE: @@ -369,7 +412,7 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm) return 1; default: radeon_error( - "Need instruction operand number for %x.\n", pAsm->D.dst.opcode); + "Need instruction operand number for %x.\n", opcode); }; return 3; @@ -383,98 +426,120 @@ int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700 pAsm->pR700Shader = pShader; pAsm->currentShaderType = spt; - pAsm->cf_last_export_ptr = NULL; + pAsm->cf_last_export_ptr = NULL; + + pAsm->cf_current_export_clause_ptr = NULL; + pAsm->cf_current_alu_clause_ptr = NULL; + pAsm->cf_current_tex_clause_ptr = NULL; + pAsm->cf_current_vtx_clause_ptr = NULL; + pAsm->cf_current_cf_clause_ptr = NULL; - pAsm->cf_current_export_clause_ptr = NULL; - pAsm->cf_current_alu_clause_ptr = NULL; - pAsm->cf_current_tex_clause_ptr = NULL; - pAsm->cf_current_vtx_clause_ptr = NULL; - pAsm->cf_current_cf_clause_ptr = NULL; + // No clause has been created yet + pAsm->cf_current_clause_type = CF_EMPTY_CLAUSE; - // No clause has been created yet - pAsm->cf_current_clause_type = CF_EMPTY_CLAUSE; + pAsm->number_of_colorandz_exports = 0; + pAsm->number_of_exports = 0; + pAsm->number_of_export_opcodes = 0; - pAsm->number_of_colorandz_exports = 0; - pAsm->number_of_exports = 0; - pAsm->number_of_export_opcodes = 0; + pAsm->alu_x_opcode = 0; + pAsm->D2.bits = 0; - pAsm->D.bits = 0; - pAsm->S[0].bits = 0; - pAsm->S[1].bits = 0; - pAsm->S[2].bits = 0; + pAsm->D.bits = 0; + pAsm->S[0].bits = 0; + pAsm->S[1].bits = 0; + pAsm->S[2].bits = 0; - pAsm->uLastPosUpdate = 0; + pAsm->uLastPosUpdate = 0; - *(BITS *) &pAsm->fp_stOutFmt0 = 0; + *(BITS *) &pAsm->fp_stOutFmt0 = 0; - pAsm->uIIns = 0; - pAsm->uOIns = 0; - pAsm->number_used_registers = 0; - pAsm->uUsedConsts = 256; + pAsm->uIIns = 0; + pAsm->uOIns = 0; + pAsm->number_used_registers = 0; + pAsm->uUsedConsts = 256; - // Fragment programs - pAsm->uBoolConsts = 0; - pAsm->uIntConsts = 0; - pAsm->uInsts = 0; - pAsm->uConsts = 0; + // Fragment programs + pAsm->uBoolConsts = 0; + pAsm->uIntConsts = 0; + pAsm->uInsts = 0; + pAsm->uConsts = 0; - pAsm->FCSP = 0; - pAsm->fc_stack[0].type = FC_NONE; + pAsm->FCSP = 0; + pAsm->fc_stack[0].type = FC_NONE; - pAsm->branch_depth = 0; - pAsm->max_branch_depth = 0; + pAsm->aArgSubst[0] = + pAsm->aArgSubst[1] = + pAsm->aArgSubst[2] = + pAsm->aArgSubst[3] = (-1); - pAsm->aArgSubst[0] = - pAsm->aArgSubst[1] = - pAsm->aArgSubst[2] = - pAsm->aArgSubst[3] = (-1); + pAsm->uOutputs = 0; - pAsm->uOutputs = 0; + for (i=0; i<NUMBER_OF_OUTPUT_COLORS; i++) + { + pAsm->color_export_register_number[i] = (-1); + } - for (i=0; i<NUMBER_OF_OUTPUT_COLORS; i++) - { - pAsm->color_export_register_number[i] = (-1); - } + pAsm->depth_export_register_number = (-1); + pAsm->stencil_export_register_number = (-1); + pAsm->coverage_to_mask_export_register_number = (-1); + pAsm->mask_export_register_number = (-1); - pAsm->depth_export_register_number = (-1); - pAsm->stencil_export_register_number = (-1); - pAsm->coverage_to_mask_export_register_number = (-1); - pAsm->mask_export_register_number = (-1); + pAsm->starting_export_register_number = 0; + pAsm->starting_vfetch_register_number = 0; + pAsm->starting_temp_register_number = 0; + pAsm->uFirstHelpReg = 0; - pAsm->starting_export_register_number = 0; - pAsm->starting_vfetch_register_number = 0; - pAsm->starting_temp_register_number = 0; - pAsm->uFirstHelpReg = 0; + pAsm->input_position_is_used = GL_FALSE; + pAsm->input_normal_is_used = GL_FALSE; + for (i=0; i<NUMBER_OF_INPUT_COLORS; i++) + { + pAsm->input_color_is_used[ i ] = GL_FALSE; + } - pAsm->input_position_is_used = GL_FALSE; - pAsm->input_normal_is_used = GL_FALSE; + for (i=0; i<NUMBER_OF_TEXTURE_UNITS; i++) + { + pAsm->input_texture_unit_is_used[ i ] = GL_FALSE; + } + for (i=0; i<VERT_ATTRIB_MAX; i++) + { + pAsm->vfetch_instruction_ptr_array[ i ] = NULL; + } - for (i=0; i<NUMBER_OF_INPUT_COLORS; i++) - { - pAsm->input_color_is_used[ i ] = GL_FALSE; - } + pAsm->number_of_inputs = 0; - for (i=0; i<NUMBER_OF_TEXTURE_UNITS; i++) - { - pAsm->input_texture_unit_is_used[ i ] = GL_FALSE; - } + pAsm->is_tex = GL_FALSE; + pAsm->need_tex_barrier = GL_FALSE; - for (i=0; i<VERT_ATTRIB_MAX; i++) - { - pAsm->vfetch_instruction_ptr_array[ i ] = NULL; - } + pAsm->subs = NULL; + pAsm->unSubArraySize = 0; + pAsm->unSubArrayPointer = 0; + pAsm->callers = NULL; + pAsm->unCallerArraySize = 0; + pAsm->unCallerArrayPointer = 0; + + pAsm->CALLSP = 0; + pAsm->CALLSTACK[0].FCSP_BeforeEntry = 0; + pAsm->CALLSTACK[0].plstCFInstructions_local + = &(pAsm->pR700Shader->lstCFInstructions); + + pAsm->CALLSTACK[0].max = 0; + pAsm->CALLSTACK[0].current = 0; + + SetActiveCFlist(pAsm->pR700Shader, pAsm->CALLSTACK[0].plstCFInstructions_local); - pAsm->number_of_inputs = 0; + pAsm->unCFflags = 0; - pAsm->is_tex = GL_FALSE; - pAsm->need_tex_barrier = GL_FALSE; + pAsm->presubs = NULL; + pAsm->unPresubArraySize = 0; + pAsm->unNumPresub = 0; + pAsm->unCurNumILInsts = 0; - return 0; + return 0; } GLboolean IsTex(gl_inst_opcode Opcode) @@ -592,6 +657,31 @@ int check_current_clause(r700_AssemblerBase* pAsm, return GL_TRUE; } +GLboolean add_cf_instruction(r700_AssemblerBase* pAsm) +{ + if(GL_FALSE == check_current_clause(pAsm, CF_OTHER_CLAUSE)) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr = + (R700ControlFlowGenericClause*) CALLOC_STRUCT(R700ControlFlowGenericClause); + + if (pAsm->cf_current_cf_clause_ptr != NULL) + { + Init_R700ControlFlowGenericClause(pAsm->cf_current_cf_clause_ptr); + AddCFInstruction( pAsm->pR700Shader, + (R700ControlFlowInstruction *)pAsm->cf_current_cf_clause_ptr ); + } + else + { + radeon_error("Could not allocate a new VFetch CF instruction.\n"); + return GL_FALSE; + } + + return GL_TRUE; +} + GLboolean add_vfetch_instruction(r700_AssemblerBase* pAsm, R700VertexInstruction* vertex_instruction_ptr) { @@ -987,7 +1077,8 @@ GLboolean checkop2(r700_AssemblerBase* pAsm) checkop_init(pAsm); - if( (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) || + if( (pILInst->SrcReg[0].File == PROGRAM_UNIFORM) || + (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) || (pILInst->SrcReg[0].File == PROGRAM_LOCAL_PARAM) || (pILInst->SrcReg[0].File == PROGRAM_ENV_PARAM) || (pILInst->SrcReg[0].File == PROGRAM_STATE_VAR) ) @@ -998,7 +1089,8 @@ GLboolean checkop2(r700_AssemblerBase* pAsm) { bSrcConst[0] = GL_FALSE; } - if( (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) || + if( (pILInst->SrcReg[1].File == PROGRAM_UNIFORM) || + (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) || (pILInst->SrcReg[1].File == PROGRAM_LOCAL_PARAM) || (pILInst->SrcReg[1].File == PROGRAM_ENV_PARAM) || (pILInst->SrcReg[1].File == PROGRAM_STATE_VAR) ) @@ -1031,7 +1123,8 @@ GLboolean checkop3(r700_AssemblerBase* pAsm) checkop_init(pAsm); - if( (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) || + if( (pILInst->SrcReg[0].File == PROGRAM_UNIFORM) || + (pILInst->SrcReg[0].File == PROGRAM_CONSTANT) || (pILInst->SrcReg[0].File == PROGRAM_LOCAL_PARAM) || (pILInst->SrcReg[0].File == PROGRAM_ENV_PARAM) || (pILInst->SrcReg[0].File == PROGRAM_STATE_VAR) ) @@ -1042,7 +1135,8 @@ GLboolean checkop3(r700_AssemblerBase* pAsm) { bSrcConst[0] = GL_FALSE; } - if( (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) || + if( (pILInst->SrcReg[1].File == PROGRAM_UNIFORM) || + (pILInst->SrcReg[1].File == PROGRAM_CONSTANT) || (pILInst->SrcReg[1].File == PROGRAM_LOCAL_PARAM) || (pILInst->SrcReg[1].File == PROGRAM_ENV_PARAM) || (pILInst->SrcReg[1].File == PROGRAM_STATE_VAR) ) @@ -1053,7 +1147,8 @@ GLboolean checkop3(r700_AssemblerBase* pAsm) { bSrcConst[1] = GL_FALSE; } - if( (pILInst->SrcReg[2].File == PROGRAM_CONSTANT) || + if( (pILInst->SrcReg[2].File == PROGRAM_UNIFORM) || + (pILInst->SrcReg[2].File == PROGRAM_CONSTANT) || (pILInst->SrcReg[2].File == PROGRAM_LOCAL_PARAM) || (pILInst->SrcReg[2].File == PROGRAM_ENV_PARAM) || (pILInst->SrcReg[2].File == PROGRAM_STATE_VAR) ) @@ -1153,6 +1248,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm, case PROGRAM_LOCAL_PARAM: case PROGRAM_ENV_PARAM: case PROGRAM_STATE_VAR: + case PROGRAM_UNIFORM: if (1 == pILInst->SrcReg[src].RelAddr) { setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_RELATIVE_A0); @@ -1166,7 +1262,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm, pAsm->S[fld].src.reg = pILInst->SrcReg[src].Index; break; case PROGRAM_INPUT: - setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_ABSOLUTE); + setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_ABSOLUTE); pAsm->S[fld].src.rtype = SRC_REG_INPUT; switch (pAsm->currentShaderType) { @@ -1179,7 +1275,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm, } break; default: - radeon_error("Invalid source argument type\n"); + radeon_error("Invalid source argument type : %d \n", pILInst->SrcReg[src].File); return GL_FALSE; } } @@ -1235,6 +1331,15 @@ GLboolean assemble_dst(r700_AssemblerBase *pAsm) pAsm->D.dst.writez = (pILInst->DstReg.WriteMask >> 2) & 0x1; pAsm->D.dst.writew = (pILInst->DstReg.WriteMask >> 3) & 0x1; + if(pILInst->SaturateMode == SATURATE_ZERO_ONE) + { + pAsm->D2.dst2.SaturateMode = 1; + } + else + { + pAsm->D2.dst2.SaturateMode = 0; + } + return GL_TRUE; } @@ -1294,6 +1399,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm) else { switch (pILInst->SrcReg[0].File) { + case PROGRAM_UNIFORM: case PROGRAM_CONSTANT: case PROGRAM_LOCAL_PARAM: case PROGRAM_ENV_PARAM: @@ -1315,7 +1421,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm) case FRAG_ATTRIB_TEX0: case FRAG_ATTRIB_TEX1: case FRAG_ATTRIB_TEX2: - case FRAG_ATTRIB_TEX3: + case FRAG_ATTRIB_TEX3: case FRAG_ATTRIB_TEX4: case FRAG_ATTRIB_TEX5: case FRAG_ATTRIB_TEX6: @@ -1331,10 +1437,17 @@ GLboolean tex_src(r700_AssemblerBase *pAsm) case FRAG_ATTRIB_PNTC: fprintf(stderr, "FRAG_ATTRIB_PNTC unsupported\n"); break; - case FRAG_ATTRIB_VAR0: - fprintf(stderr, "FRAG_ATTRIB_VAR0 unsupported\n"); - break; } + + if( (pILInst->SrcReg[0].Index >= FRAG_ATTRIB_VAR0) || + (pILInst->SrcReg[0].Index < FRAG_ATTRIB_MAX) ) + { + bValidTexCoord = GL_TRUE; + pAsm->S[0].src.reg = + pAsm->uiFP_AttributeMap[pILInst->SrcReg[0].Index]; + pAsm->S[0].src.rtype = SRC_REG_INPUT; + } + break; } } @@ -1517,6 +1630,10 @@ GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr, { src_sel = pSource->reg + CFILE_REGISTER_OFFSET; } + else if (pSource->rtype == SRC_REC_LITERAL) + { + src_sel = SQ_ALU_SRC_LITERAL; + } else { radeon_error("Source (%d) register type (%d) not one of TEMP, INPUT, or CONSTANT.\n", @@ -1606,7 +1723,8 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm, return GL_FALSE; } - if ( pAsm->cf_current_alu_clause_ptr == NULL || + if ( pAsm->alu_x_opcode != 0 || + pAsm->cf_current_alu_clause_ptr == NULL || ( (pAsm->cf_current_alu_clause_ptr != NULL) && (pAsm->cf_current_alu_clause_ptr->m_Word1.f.count >= (GetCFMaxInstructions(pAsm->cf_current_alu_clause_ptr->m_ShaderInstType)-contiguous_slots_needed-1) ) ) ) @@ -1636,9 +1754,17 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm, pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr0 = 0x0; pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr1 = 0x0; - //cf_current_alu_clause_ptr->m_Word1.f.count = number_of_scalar_operations - 1; pAsm->cf_current_alu_clause_ptr->m_Word1.f.count = 0x0; - pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ALU; + + if(pAsm->alu_x_opcode != 0) + { + pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = pAsm->alu_x_opcode; + pAsm->alu_x_opcode = 0; + } + else + { + pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ALU; + } pAsm->cf_current_alu_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; @@ -1646,7 +1772,7 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm, } else { - pAsm->cf_current_alu_clause_ptr->m_Word1.f.count++; + pAsm->cf_current_alu_clause_ptr->m_Word1.f.count += (GetInstructionSize(alu_instruction_ptr->m_ShaderInstType) / 2); } // If this clause constains any instruction that is forward dependent on a TEX instruction, @@ -1923,7 +2049,7 @@ GLboolean check_scalar(r700_AssemblerBase* pAsm, GLuint swizzle_key; - GLuint number_of_operands = r700GetNumOperands(pAsm); + GLuint number_of_operands = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3); for (src=0; src<number_of_operands; src++) { @@ -2012,7 +2138,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm, GLuint swizzle_key; - GLuint number_of_operands = r700GetNumOperands(pAsm); + GLuint number_of_operands = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3); for (src=0; src<number_of_operands; src++) { @@ -2045,7 +2171,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm, if( is_gpr(sel) ) { if( GL_FALSE == cycle_for_vector_bank_swizzle(bank_swizzle, src, &cycle) ) - { + { return GL_FALSE; } @@ -2057,7 +2183,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm, else { if( GL_FALSE == reserve_gpr(pAsm, sel, chan, cycle) ) - { + { return GL_FALSE; } } @@ -2069,7 +2195,7 @@ GLboolean check_vector(r700_AssemblerBase* pAsm, if( is_cfile(sel) ) { if( GL_FALSE == reserve_cfile(pAsm, sel, chan) ) - { + { return GL_FALSE; } } @@ -2081,6 +2207,10 @@ GLboolean check_vector(r700_AssemblerBase* pAsm, GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) { + R700ALUInstruction * alu_instruction_ptr; + R700ALUInstructionHalfLiteral * alu_instruction_ptr_hl; + R700ALUInstructionFullLiteral * alu_instruction_ptr_fl; + GLuint number_of_scalar_operations; GLboolean is_single_scalar_operation; GLuint scalar_channel_index; @@ -2089,7 +2219,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) int current_source_index; GLuint contiguous_slots_needed; - GLuint uNumSrc = r700GetNumOperands(pAsm); + GLuint uNumSrc = r700GetNumOperands(pAsm->D.dst.opcode, pAsm->D.dst.op3); //GLuint channel_swizzle, j; //GLuint chan_counter[4] = {0, 0, 0, 0}; //PVSSRC * pSource[3]; @@ -2146,23 +2276,44 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) contiguous_slots_needed = 0; - if(GL_TRUE == is_reduction_opcode(&(pAsm->D)) ) + if(!is_single_scalar_operation) { contiguous_slots_needed = 4; } + contiguous_slots_needed += pAsm->D2.dst2.literal_slots; + initialize(pAsm); for (scalar_channel_index=0; scalar_channel_index < number_of_scalar_operations; scalar_channel_index++) { - R700ALUInstruction* alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction); - if (alu_instruction_ptr == NULL) - { - return GL_FALSE; - } - Init_R700ALUInstruction(alu_instruction_ptr); + if(scalar_channel_index == (number_of_scalar_operations-1)) + { + switch(pAsm->D2.dst2.literal_slots) + { + case 0: + alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction); + Init_R700ALUInstruction(alu_instruction_ptr); + break; + case 1: + alu_instruction_ptr_hl = (R700ALUInstructionHalfLiteral*) CALLOC_STRUCT(R700ALUInstructionHalfLiteral); + Init_R700ALUInstructionHalfLiteral(alu_instruction_ptr_hl, pAsm->C[0].f, pAsm->C[1].f); + alu_instruction_ptr = (R700ALUInstruction*)alu_instruction_ptr_hl; + break; + case 2: + alu_instruction_ptr_fl = (R700ALUInstructionFullLiteral*) CALLOC_STRUCT(R700ALUInstructionFullLiteral); + Init_R700ALUInstructionFullLiteral(alu_instruction_ptr_fl,pAsm->C[0].f, pAsm->C[1].f, pAsm->C[2].f, pAsm->C[3].f); + alu_instruction_ptr = (R700ALUInstruction*)alu_instruction_ptr_fl; + break; + }; + } + else + { + alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction); + Init_R700ALUInstruction(alu_instruction_ptr); + } //src 0 current_source_index = 0; @@ -2172,7 +2323,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) current_source_index, pcurrent_source, scalar_channel_index) ) - { + { return GL_FALSE; } @@ -2186,13 +2337,13 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) current_source_index, pcurrent_source, scalar_channel_index) ) - { + { return GL_FALSE; } } //other bits - alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_AR_X; + alu_instruction_ptr->m_Word0.f.index_mode = pAsm->D2.dst2.index_mode; if( (is_single_scalar_operation == GL_TRUE) || (GL_TRUE == bSplitInst) ) @@ -2204,9 +2355,17 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) alu_instruction_ptr->m_Word0.f.last = (scalar_channel_index == 3) ? 1 : 0; } - alu_instruction_ptr->m_Word0.f.pred_sel = 0x0; - alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x0; - alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0; + alu_instruction_ptr->m_Word0.f.pred_sel = (pAsm->D.dst.pred_inv > 0) ? 1 : 0; + if(1 == pAsm->D.dst.predicated) + { + alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x1; + alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x1; + } + else + { + alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x0; + alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0; + } // dst if( (pAsm->D.dst.rtype == DST_REG_TEMPORARY) || @@ -2215,7 +2374,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) alu_instruction_ptr->m_Word1.f.dst_gpr = pAsm->D.dst.reg; } else - { + { radeon_error("Only temp destination registers supported for ALU dest regs.\n"); return GL_FALSE; } @@ -2245,7 +2404,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) alu_instruction_ptr->m_Word1.f.dst_chan = scalar_channel_index; - alu_instruction_ptr->m_Word1.f.clamp = pAsm->pILInst[pAsm->uiCurInst].SaturateMode; + alu_instruction_ptr->m_Word1.f.clamp = pAsm->D2.dst2.SaturateMode; if (pAsm->D.dst.op3) { @@ -2272,8 +2431,8 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) { alu_instruction_ptr->m_Word1_OP2.f6.alu_inst = pAsm->D.dst.opcode; - alu_instruction_ptr->m_Word1_OP2.f6.src0_abs = 0x0; - alu_instruction_ptr->m_Word1_OP2.f6.src1_abs = 0x0; + alu_instruction_ptr->m_Word1_OP2.f6.src0_abs = pAsm->S[0].src.abs; + alu_instruction_ptr->m_Word1_OP2.f6.src1_abs = pAsm->S[1].src.abs; //alu_instruction_ptr->m_Word1_OP2.f6.update_execute_mask = 0x0; //alu_instruction_ptr->m_Word1_OP2.f6.update_pred = 0x0; @@ -2301,8 +2460,8 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) { alu_instruction_ptr->m_Word1_OP2.f.alu_inst = pAsm->D.dst.opcode; - alu_instruction_ptr->m_Word1_OP2.f.src0_abs = 0x0; - alu_instruction_ptr->m_Word1_OP2.f.src1_abs = 0x0; + alu_instruction_ptr->m_Word1_OP2.f.src0_abs = pAsm->S[0].src.abs; + alu_instruction_ptr->m_Word1_OP2.f.src1_abs = pAsm->S[1].src.abs; //alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0; //alu_instruction_ptr->m_Word1_OP2.f.update_pred = 0x0; @@ -2329,7 +2488,7 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) } if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, contiguous_slots_needed) ) - { + { return GL_FALSE; } @@ -2340,19 +2499,19 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm) if (is_single_scalar_operation) { if(GL_FALSE == check_scalar(pAsm, alu_instruction_ptr) ) - { + { return GL_FALSE; } } else { if(GL_FALSE == check_vector(pAsm, alu_instruction_ptr) ) - { - return 1; + { + return GL_FALSE; } } - contiguous_slots_needed = 0; + contiguous_slots_needed -= 1; } return GL_TRUE; @@ -2403,11 +2562,14 @@ GLboolean next_ins(r700_AssemblerBase *pAsm) //reset for next inst. pAsm->D.bits = 0; + pAsm->D2.bits = 0; pAsm->S[0].bits = 0; pAsm->S[1].bits = 0; pAsm->S[2].bits = 0; pAsm->is_tex = GL_FALSE; pAsm->need_tex_barrier = GL_FALSE; + pAsm->D2.bits = 0; + pAsm->C[0].bits = pAsm->C[1].bits = pAsm->C[2].bits = pAsm->C[3].bits = 0; return GL_TRUE; } @@ -2640,9 +2802,44 @@ GLboolean assemble_CMP(r700_AssemblerBase *pAsm) return GL_TRUE; } -GLboolean assemble_COS(r700_AssemblerBase *pAsm) +GLboolean assemble_TRIG(r700_AssemblerBase *pAsm, BITS opcode) { - return assemble_math_function(pAsm, SQ_OP2_INST_COS); + int tmp; + checkop1(pAsm); + + tmp = gethelpr(pAsm); + + pAsm->D.dst.opcode = SQ_OP2_INST_MUL; + setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); + pAsm->D.dst.rtype = DST_REG_TEMPORARY; + pAsm->D.dst.reg = tmp; + pAsm->D.dst.writex = 1; + + assemble_src(pAsm, 0, -1); + + pAsm->S[1].src.rtype = SRC_REC_LITERAL; + setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_X); + pAsm->D2.dst2.literal_slots = 1; + pAsm->C[0].f = 1/(3.1415926535 * 2); + pAsm->C[1].f = 0.0F; + next_ins(pAsm); + + pAsm->D.dst.opcode = opcode; + pAsm->D.dst.math = 1; + + assemble_dst(pAsm); + + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[0].src.reg = tmp; + setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X); + noneg_PVSSRC(&(pAsm->S[0].src)); + + next_ins(pAsm); + + //TODO - replicate if more channels set in WriteMask + return GL_TRUE; + } GLboolean assemble_DOT(r700_AssemblerBase *pAsm) @@ -2910,13 +3107,15 @@ GLboolean assemble_FRC(r700_AssemblerBase *pAsm) return GL_TRUE; } -GLboolean assemble_KIL(r700_AssemblerBase *pAsm) -{ - /* TODO: doc says KILL has to be last(end) ALU clause */ - - checkop1(pAsm); +GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode) +{ + struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]); - pAsm->D.dst.opcode = SQ_OP2_INST_KILLGT; + if(pILInst->Opcode == OPCODE_KIL) + checkop1(pAsm); + + pAsm->D.dst.opcode = opcode; + //pAsm->D.dst.math = 1; setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); pAsm->D.dst.rtype = DST_REG_TEMPORARY; @@ -2929,21 +3128,34 @@ GLboolean assemble_KIL(r700_AssemblerBase *pAsm) setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; pAsm->S[0].src.reg = 0; - setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_0); noneg_PVSSRC(&(pAsm->S[0].src)); - if ( GL_FALSE == assemble_src(pAsm, 0, 1) ) + if(pILInst->Opcode == OPCODE_KIL_NV) { - return GL_FALSE; + setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); + pAsm->S[1].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[1].src.reg = 0; + setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_1); + neg_PVSSRC(&(pAsm->S[1].src)); } - + else + { + if( GL_FALSE == assemble_src(pAsm, 0, 1) ) + { + return GL_FALSE; + } + + } + if ( GL_FALSE == next_ins(pAsm) ) { return GL_FALSE; } + /* Doc says KILL has to be last(end) ALU clause */ pAsm->pR700Shader->killIsUsed = GL_TRUE; + pAsm->alu_x_opcode = SQ_CF_INST_ALU; return GL_TRUE; } @@ -3007,6 +3219,7 @@ GLboolean assemble_LRP(r700_AssemblerBase *pAsm) { return GL_FALSE; } + if( GL_FALSE == assemble_src(pAsm, 2, -1) ) { return GL_FALSE; @@ -3742,77 +3955,137 @@ GLboolean assemble_RSQ(r700_AssemblerBase *pAsm) return assemble_math_function(pAsm, SQ_OP2_INST_RECIPSQRT_IEEE); } -GLboolean assemble_SIN(r700_AssemblerBase *pAsm) -{ - return assemble_math_function(pAsm, SQ_OP2_INST_SIN); -} - GLboolean assemble_SCS(r700_AssemblerBase *pAsm) { BITS tmp; - checkop1(pAsm); + checkop1(pAsm); - tmp = gethelpr(pAsm); + tmp = gethelpr(pAsm); + /* tmp.x = src /2*PI */ + pAsm->D.dst.opcode = SQ_OP2_INST_MUL; + setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); + pAsm->D.dst.rtype = DST_REG_TEMPORARY; + pAsm->D.dst.reg = tmp; + pAsm->D.dst.writex = 1; - // COS tmp.x, a.x - pAsm->D.dst.opcode = SQ_OP2_INST_COS; - pAsm->D.dst.math = 1; + assemble_src(pAsm, 0, -1); - setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); - pAsm->D.dst.rtype = DST_REG_TEMPORARY; - pAsm->D.dst.reg = tmp; - pAsm->D.dst.writex = 1; + pAsm->S[1].src.rtype = SRC_REC_LITERAL; + setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_X); + pAsm->D2.dst2.literal_slots = 1; + pAsm->C[0].f = 1/(3.1415926535 * 2); + pAsm->C[1].f = 0.0F; - if( GL_FALSE == assemble_src(pAsm, 0, -1) ) - { - return GL_FALSE; - } + next_ins(pAsm); - if ( GL_FALSE == next_ins(pAsm) ) - { - return GL_FALSE; - } + // COS dst.x, a.x + pAsm->D.dst.opcode = SQ_OP2_INST_COS; + pAsm->D.dst.math = 1; - // SIN tmp.y, a.x - pAsm->D.dst.opcode = SQ_OP2_INST_SIN; - pAsm->D.dst.math = 1; + assemble_dst(pAsm); + /* mask y */ + pAsm->D.dst.writey = 0; - setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); - pAsm->D.dst.rtype = DST_REG_TEMPORARY; - pAsm->D.dst.reg = tmp; - pAsm->D.dst.writey = 1; + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[0].src.reg = tmp; + setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X); + noneg_PVSSRC(&(pAsm->S[0].src)); - if( GL_FALSE == assemble_src(pAsm, 0, -1) ) - { - return GL_FALSE; - } + if ( GL_FALSE == next_ins(pAsm) ) + { + return GL_FALSE; + } - if( GL_FALSE == next_ins(pAsm) ) - { - return GL_FALSE; - } + // SIN dst.y, a.x + pAsm->D.dst.opcode = SQ_OP2_INST_SIN; + pAsm->D.dst.math = 1; - // MOV dst.mask, tmp - pAsm->D.dst.opcode = SQ_OP2_INST_MOV; + assemble_dst(pAsm); + /* mask x */ + pAsm->D.dst.writex = 0; - if( GL_FALSE == assemble_dst(pAsm) ) - { - return GL_FALSE; - } + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[0].src.reg = tmp; + setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_X); + noneg_PVSSRC(&(pAsm->S[0].src)); - setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); - pAsm->S[0].src.rtype = DST_REG_TEMPORARY; - pAsm->S[0].src.reg = tmp; + if( GL_FALSE == next_ins(pAsm) ) + { + return GL_FALSE; + } - noswizzle_PVSSRC(&(pAsm->S[0].src)); - pAsm->S[0].src.swizzlez = SQ_SEL_0; - pAsm->S[0].src.swizzlew = SQ_SEL_0; + return GL_TRUE; +} - if ( GL_FALSE == next_ins(pAsm) ) - { - return GL_FALSE; - } +GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode) +{ + if( GL_FALSE == checkop2(pAsm) ) + { + return GL_FALSE; + } + + pAsm->D.dst.opcode = opcode; + //pAsm->D.dst.math = 1; + + if( GL_FALSE == assemble_dst(pAsm) ) + { + return GL_FALSE; + } + + if( GL_FALSE == assemble_src(pAsm, 0, -1) ) + { + return GL_FALSE; + } + + if( GL_FALSE == assemble_src(pAsm, 1, -1) ) + { + return GL_FALSE; + } + + if( GL_FALSE == next_ins(pAsm) ) + { + return GL_FALSE; + } + + return GL_TRUE; +} + +GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode) +{ + struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]); + + pAsm->D.dst.opcode = opcode; + pAsm->D.dst.math = 1; + pAsm->D.dst.predicated = 1; + + setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); + pAsm->D.dst.rtype = DST_REG_TEMPORARY; + pAsm->D.dst.reg = pAsm->uHelpReg; + pAsm->D.dst.writex = 1; + pAsm->D.dst.writey = pAsm->D.dst.writez = pAsm->D.dst.writew = 0; + + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[0].src.reg = pAsm->last_cond_register + pAsm->starting_temp_register_number; + pAsm->S[0].src.swizzlex = pILInst->DstReg.CondSwizzle & 0x7; + noneg_PVSSRC(&(pAsm->S[0].src)); + + pAsm->S[1].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[1].src.reg = pAsm->uHelpReg; + setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); + noneg_PVSSRC(&(pAsm->S[1].src)); + pAsm->S[1].src.swizzlex = SQ_SEL_0; + pAsm->S[1].src.swizzley = SQ_SEL_0; + pAsm->S[1].src.swizzlez = SQ_SEL_0; + pAsm->S[1].src.swizzlew = SQ_SEL_0; + + if( GL_FALSE == next_ins(pAsm) ) + { + return GL_FALSE; + } return GL_TRUE; } @@ -3895,6 +4168,7 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) switch (pAsm->pILInst[pAsm->uiCurInst].SrcReg[0].File) { + case PROGRAM_UNIFORM: case PROGRAM_CONSTANT: case PROGRAM_LOCAL_PARAM: case PROGRAM_ENV_PARAM: @@ -3992,24 +4266,6 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) return GL_FALSE; } - /* tmp1.z = ABS(tmp1.z) dont have abs support in assembler currently - * have to do explicit instruction - */ - pAsm->D.dst.opcode = SQ_OP2_INST_MAX; - setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); - pAsm->D.dst.rtype = DST_REG_TEMPORARY; - pAsm->D.dst.reg = tmp1; - pAsm->D.dst.writez = 1; - - setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); - pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; - pAsm->S[0].src.reg = tmp1; - noswizzle_PVSSRC(&(pAsm->S[0].src)); - pAsm->S[1].bits = pAsm->S[0].bits; - flipneg_PVSSRC(&(pAsm->S[1].src)); - - next_ins(pAsm); - /* tmp1.z = RCP_e(|tmp1.z|) */ pAsm->D.dst.opcode = SQ_OP2_INST_RECIP_IEEE; pAsm->D.dst.math = 1; @@ -4022,13 +4278,13 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; pAsm->S[0].src.reg = tmp1; pAsm->S[0].src.swizzlex = SQ_SEL_Z; + pAsm->S[0].src.abs = 1; next_ins(pAsm); /* MULADD R0.x, R0.x, PS1, (0x3FC00000, 1.5f).x * MULADD R0.y, R0.y, PS1, (0x3FC00000, 1.5f).x * muladd has no writemask, have to use another temp - * also no support for imm constants, so add 1 here */ pAsm->D.dst.opcode = SQ_OP3_INST_MULADD; pAsm->D.dst.op3 = 1; @@ -4045,30 +4301,12 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) pAsm->S[1].src.reg = tmp1; setswizzle_PVSSRC(&(pAsm->S[1].src), SQ_SEL_Z); setaddrmode_PVSSRC(&(pAsm->S[2].src), ADDR_ABSOLUTE); - pAsm->S[2].src.rtype = SRC_REG_TEMPORARY; + /* immediate c 1.5 */ + pAsm->D2.dst2.literal_slots = 1; + pAsm->C[0].f = 1.5F; + pAsm->S[2].src.rtype = SRC_REC_LITERAL; pAsm->S[2].src.reg = tmp1; - setswizzle_PVSSRC(&(pAsm->S[2].src), SQ_SEL_1); - - next_ins(pAsm); - - /* ADD the remaining .5 */ - pAsm->D.dst.opcode = SQ_OP2_INST_ADD; - setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); - pAsm->D.dst.rtype = DST_REG_TEMPORARY; - pAsm->D.dst.reg = tmp2; - pAsm->D.dst.writex = 1; - pAsm->D.dst.writey = 1; - pAsm->D.dst.writez = 0; - pAsm->D.dst.writew = 0; - - setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); - pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; - pAsm->S[0].src.reg = tmp2; - noswizzle_PVSSRC(&(pAsm->S[0].src)); - setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); - pAsm->S[1].src.rtype = SRC_REG_TEMPORARY; - pAsm->S[1].src.reg = 252; // SQ_ALU_SRC_0_5 - noswizzle_PVSSRC(&(pAsm->S[1].src)); + setswizzle_PVSSRC(&(pAsm->S[2].src), SQ_SEL_X); next_ins(pAsm); @@ -4104,11 +4342,14 @@ GLboolean assemble_TEX(r700_AssemblerBase *pAsm) pAsm->is_tex = GL_TRUE; if ( GL_TRUE == need_barrier ) + + pAsm->is_tex = GL_TRUE; + if ( GL_TRUE == need_barrier ) { pAsm->need_tex_barrier = GL_TRUE; } // Set src1 to tex unit id - pAsm->S[1].src.reg = pAsm->pILInst[pAsm->uiCurInst].TexSrcUnit; + pAsm->S[1].src.reg = pAsm->SamplerUnits[pAsm->pILInst[pAsm->uiCurInst].TexSrcUnit]; pAsm->S[1].src.rtype = SRC_REG_TEMPORARY; //No sw info from mesa compiler, so hard code here. @@ -4265,27 +4506,909 @@ GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm) return GL_TRUE; } -GLboolean assemble_IF(r700_AssemblerBase *pAsm) +static inline void decreaseCurrent(r700_AssemblerBase *pAsm, GLuint uReason) +{ + switch (uReason) + { + case FC_PUSH_VPM: + pAsm->CALLSTACK[pAsm->CALLSP].current--; + break; + case FC_PUSH_WQM: + pAsm->CALLSTACK[pAsm->CALLSP].current -= 4; + break; + case FC_LOOP: + pAsm->CALLSTACK[pAsm->CALLSP].current -= 4; + break; + case FC_REP: + /* TODO : for 16 vp asic, should -= 2; */ + pAsm->CALLSTACK[pAsm->CALLSP].current -= 1; + break; + }; +} + +static inline void checkStackDepth(r700_AssemblerBase *pAsm, GLuint uReason, GLboolean bCheckMaxOnly) +{ + if(GL_TRUE == bCheckMaxOnly) + { + switch (uReason) + { + case FC_PUSH_VPM: + if((pAsm->CALLSTACK[pAsm->CALLSP].current + 1) + > pAsm->CALLSTACK[pAsm->CALLSP].max) + { + pAsm->CALLSTACK[pAsm->CALLSP].max = + pAsm->CALLSTACK[pAsm->CALLSP].current + 1; + } + break; + case FC_PUSH_WQM: + if((pAsm->CALLSTACK[pAsm->CALLSP].current + 4) + > pAsm->CALLSTACK[pAsm->CALLSP].max) + { + pAsm->CALLSTACK[pAsm->CALLSP].max = + pAsm->CALLSTACK[pAsm->CALLSP].current + 4; + } + break; + } + return; + } + + switch (uReason) + { + case FC_PUSH_VPM: + pAsm->CALLSTACK[pAsm->CALLSP].current++; + break; + case FC_PUSH_WQM: + pAsm->CALLSTACK[pAsm->CALLSP].current += 4; + break; + case FC_LOOP: + pAsm->CALLSTACK[pAsm->CALLSP].current += 4; + break; + case FC_REP: + /* TODO : for 16 vp asic, should += 2; */ + pAsm->CALLSTACK[pAsm->CALLSP].current += 1; + break; + }; + + if(pAsm->CALLSTACK[pAsm->CALLSP].current + > pAsm->CALLSTACK[pAsm->CALLSP].max) + { + pAsm->CALLSTACK[pAsm->CALLSP].max = + pAsm->CALLSTACK[pAsm->CALLSP].current; + } +} + +GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset) +{ + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + offset; + + return GL_TRUE; +} + +GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops) { + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = pops; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + + return GL_TRUE; +} + +GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse) +{ + pAsm->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; + + assemble_LOGIC_PRED(pAsm, SQ_OP2_INST_PRED_SETNE); + + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + if(GL_TRUE != bHasElse) + { + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + } + else + { + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0; + } + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_JUMP; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->FCSP++; + pAsm->fc_stack[pAsm->FCSP].type = FC_IF; + pAsm->fc_stack[pAsm->FCSP].mid = NULL; + pAsm->fc_stack[pAsm->FCSP].midLen= 0; + pAsm->fc_stack[pAsm->FCSP].first = pAsm->cf_current_cf_clause_ptr; + +#ifndef USE_CF_FOR_POP_AFTER + if(GL_TRUE != bHasElse) + { + pAsm->alu_x_opcode = SQ_CF_INST_ALU_POP_AFTER; + } +#endif /* USE_CF_FOR_POP_AFTER */ + + checkStackDepth(pAsm, FC_PUSH_VPM, GL_FALSE); + + return GL_TRUE; +} + +GLboolean assemble_ELSE(r700_AssemblerBase *pAsm) +{ + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; /// + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ELSE; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->fc_stack[pAsm->FCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( (void *)pAsm->fc_stack[pAsm->FCSP].mid, + 0, + sizeof(R700ControlFlowGenericClause *) ); + pAsm->fc_stack[pAsm->FCSP].mid[0] = pAsm->cf_current_cf_clause_ptr; + //pAsm->fc_stack[pAsm->FCSP].unNumMid = 1; + +#ifndef USE_CF_FOR_POP_AFTER + pAsm->alu_x_opcode = SQ_CF_INST_ALU_POP_AFTER; +#endif /* USE_CF_FOR_POP_AFTER */ + + pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode - 1; + return GL_TRUE; } GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm) { +#ifdef USE_CF_FOR_POP_AFTER + pops(pAsm, 1); +#endif /* USE_CF_FOR_POP_AFTER */ + + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + + if(NULL == pAsm->fc_stack[pAsm->FCSP].mid) + { + /* no else in between */ + pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode; + } + else + { + pAsm->fc_stack[pAsm->FCSP].mid[0]->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode; + } + + if(NULL != pAsm->fc_stack[pAsm->FCSP].mid) + { + FREE(pAsm->fc_stack[pAsm->FCSP].mid); + } + + if(pAsm->fc_stack[pAsm->FCSP].type != FC_IF) + { + radeon_error("if/endif in shader code are not paired. \n"); + return GL_FALSE; + } + + pAsm->FCSP--; + + decreaseCurrent(pAsm, FC_PUSH_VPM); + + return GL_TRUE; +} + +GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm) +{ + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_START_NO_AL; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->FCSP++; + pAsm->fc_stack[pAsm->FCSP].type = FC_LOOP; + pAsm->fc_stack[pAsm->FCSP].mid = NULL; + pAsm->fc_stack[pAsm->FCSP].unNumMid = 0; + pAsm->fc_stack[pAsm->FCSP].midLen = 0; + pAsm->fc_stack[pAsm->FCSP].first = pAsm->cf_current_cf_clause_ptr; + + checkStackDepth(pAsm, FC_LOOP, GL_FALSE); + + return GL_TRUE; +} + +GLboolean assemble_BRK(r700_AssemblerBase *pAsm) +{ +#ifdef USE_CF_FOR_CONTINUE_BREAK + + pAsm->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; + + assemble_LOGIC_PRED(pAsm, SQ_OP2_INST_PRED_SETNE); + + unsigned int unFCSP; + for(unFCSP=pAsm->FCSP; unFCSP>0; unFCSP--) + { + if(FC_LOOP == pAsm->fc_stack[unFCSP].type) + { + break; + } + } + if(0 == FC_LOOP) + { + radeon_error("Break is not inside loop/endloop pair.\n"); + return GL_FALSE; + } + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( + (void *)pAsm->fc_stack[unFCSP].mid, + sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid, + sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) ); + pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr; + pAsm->fc_stack[unFCSP].unNumMid++; + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + + checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE); + +#endif //USE_CF_FOR_CONTINUE_BREAK + return GL_TRUE; +} + +GLboolean assemble_CONT(r700_AssemblerBase *pAsm) +{ +#ifdef USE_CF_FOR_CONTINUE_BREAK + pAsm->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; + + assemble_LOGIC_PRED(pAsm, SQ_OP2_INST_PRED_SETNE); + + unsigned int unFCSP; + for(unFCSP=pAsm->FCSP; unFCSP>0; unFCSP--) + { + if(FC_LOOP == pAsm->fc_stack[unFCSP].type) + { + break; + } + } + if(0 == FC_LOOP) + { + radeon_error("Continue is not inside loop/endloop pair.\n"); + return GL_FALSE; + } + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_CONTINUE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( + (void *)pAsm->fc_stack[unFCSP].mid, + sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid, + sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) ); + pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr; + pAsm->fc_stack[unFCSP].unNumMid++; + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_POP; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + + checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE); + +#endif /* USE_CF_FOR_CONTINUE_BREAK */ + + return GL_TRUE; +} + +GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm) +{ + GLuint i; + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_END; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->fc_stack[pAsm->FCSP].first->m_uIndex + 1; + pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + +#ifdef USE_CF_FOR_CONTINUE_BREAK + for(i=0; i<pAsm->fc_stack[pAsm->FCSP].unNumMid; i++) + { + pAsm->fc_stack[pAsm->FCSP].mid[i]->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex; + } + if(NULL != pAsm->fc_stack[pAsm->FCSP].mid) + { + FREE(pAsm->fc_stack[pAsm->FCSP].mid); + } +#endif + + if(pAsm->fc_stack[pAsm->FCSP].type != FC_LOOP) + { + radeon_error("loop/endloop in shader code are not paired. \n"); + return GL_FALSE; + } + + GLuint unFCSP; + GLuint unIF = 0; + if((pAsm->unCFflags & HAS_CURRENT_LOOPRET) > 0) + { + for(unFCSP=(pAsm->FCSP-1); unFCSP>pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry; unFCSP--) + { + if(FC_LOOP == pAsm->fc_stack[unFCSP].type) + { + breakLoopOnFlag(pAsm, unFCSP); + break; + } + else if(FC_IF == pAsm->fc_stack[unFCSP].type) + { + unIF++; + } + } + if(unFCSP <= pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry) + { +#ifdef USE_CF_FOR_POP_AFTER + returnOnFlag(pAsm, unIF); +#else + returnOnFlag(pAsm, 0); +#endif /* USE_CF_FOR_POP_AFTER */ + pAsm->unCFflags &= ~HAS_CURRENT_LOOPRET; + } + } + + pAsm->FCSP--; + + decreaseCurrent(pAsm, FC_LOOP); + + return GL_TRUE; +} + +void add_return_inst(r700_AssemblerBase *pAsm) +{ + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + //pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_RETURN; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; +} + +GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex, GLuint uiIL_Shift) +{ + /* Put in sub */ + if( (pAsm->unSubArrayPointer + 1) > pAsm->unSubArraySize ) + { + pAsm->subs = (SUB_OFFSET*)_mesa_realloc( (void *)pAsm->subs, + sizeof(SUB_OFFSET) * pAsm->unSubArraySize, + sizeof(SUB_OFFSET) * (pAsm->unSubArraySize + 10) ); + if(NULL == pAsm->subs) + { + return GL_FALSE; + } + pAsm->unSubArraySize += 10; + } + + pAsm->subs[pAsm->unSubArrayPointer].subIL_Offset = nILindex + uiIL_Shift; + pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.pHead=NULL; + pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.pTail=NULL; + pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.uNumOfNode=0; + + pAsm->CALLSP++; + pAsm->CALLSTACK[pAsm->CALLSP].subDescIndex = pAsm->unSubArrayPointer; + pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry = pAsm->FCSP; + pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local + = &(pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local); + pAsm->CALLSTACK[pAsm->CALLSP].max = 0; + pAsm->CALLSTACK[pAsm->CALLSP].current = 0; + SetActiveCFlist(pAsm->pR700Shader, + pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local); + + pAsm->unSubArrayPointer++; + + /* start sub */ + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + + pAsm->FCSP++; + pAsm->fc_stack[pAsm->FCSP].type = FC_REP; + + checkStackDepth(pAsm, FC_REP, GL_FALSE); + + return GL_TRUE; +} + +GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm) +{ + if(pAsm->fc_stack[pAsm->FCSP].type != FC_REP) + { + radeon_error("BGNSUB/ENDSUB in shader code are not paired. \n"); + return GL_FALSE; + } + + /* copy max to sub structure */ + pAsm->subs[pAsm->CALLSTACK[pAsm->CALLSP].subDescIndex].unStackDepthMax + = pAsm->CALLSTACK[pAsm->CALLSP].max; + + decreaseCurrent(pAsm, FC_REP); + + pAsm->CALLSP--; + SetActiveCFlist(pAsm->pR700Shader, + pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local); + + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + + pAsm->FCSP--; + + return GL_TRUE; +} + +GLboolean assemble_RET(r700_AssemblerBase *pAsm) +{ + GLuint unIF = 0; + + if(pAsm->CALLSP > 0) + { /* in sub */ + GLuint unFCSP; + for(unFCSP=pAsm->FCSP; unFCSP>pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry; unFCSP--) + { + if(FC_LOOP == pAsm->fc_stack[unFCSP].type) + { + setRetInLoopFlag(pAsm, SQ_SEL_1); + breakLoopOnFlag(pAsm, unFCSP); + pAsm->unCFflags |= LOOPRET_FLAGS; + + return GL_TRUE; + } + else if(FC_IF == pAsm->fc_stack[unFCSP].type) + { + unIF++; + } + } + } + +#ifdef USE_CF_FOR_POP_AFTER + if(unIF > 0) + { + pops(pAsm, unIF); + } +#endif /* USE_CF_FOR_POP_AFTER */ + + add_return_inst(pAsm); + + return GL_TRUE; +} + +GLboolean assemble_CAL(r700_AssemblerBase *pAsm, + GLint nILindex, + GLuint uiIL_Shift, + GLuint uiNumberInsts, + struct prog_instruction *pILInst, + PRESUB_DESC * pPresubDesc) +{ + GLint uiIL_Offset; + + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.call_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_CALL; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + /* Put in caller */ + if( (pAsm->unCallerArrayPointer + 1) > pAsm->unCallerArraySize ) + { + pAsm->callers = (CALLER_POINTER*)_mesa_realloc( (void *)pAsm->callers, + sizeof(CALLER_POINTER) * pAsm->unCallerArraySize, + sizeof(CALLER_POINTER) * (pAsm->unCallerArraySize + 10) ); + if(NULL == pAsm->callers) + { + return GL_FALSE; + } + pAsm->unCallerArraySize += 10; + } + + uiIL_Offset = nILindex + uiIL_Shift; + pAsm->callers[pAsm->unCallerArrayPointer].subIL_Offset = uiIL_Offset; + pAsm->callers[pAsm->unCallerArrayPointer].cf_ptr = pAsm->cf_current_cf_clause_ptr; + + pAsm->callers[pAsm->unCallerArrayPointer].finale_cf_ptr = NULL; + pAsm->callers[pAsm->unCallerArrayPointer].prelude_cf_ptr = NULL; + + pAsm->unCallerArrayPointer++; + + int j; + GLuint max; + GLuint unSubID; + GLboolean bRet; + for(j=0; j<pAsm->unSubArrayPointer; j++) + { + if(uiIL_Offset == pAsm->subs[j].subIL_Offset) + { /* compiled before */ + + max = pAsm->subs[j].unStackDepthMax + + pAsm->CALLSTACK[pAsm->CALLSP].current; + if(max > pAsm->CALLSTACK[pAsm->CALLSP].max) + { + pAsm->CALLSTACK[pAsm->CALLSP].max = max; + } + + pAsm->callers[pAsm->unCallerArrayPointer - 1].subDescIndex = j; + return GL_TRUE; + } + } + + pAsm->callers[pAsm->unCallerArrayPointer - 1].subDescIndex = pAsm->unSubArrayPointer; + unSubID = pAsm->unSubArrayPointer; + + bRet = AssembleInstr(nILindex, uiIL_Shift, uiNumberInsts, pILInst, pAsm); + + if(GL_TRUE == bRet) + { + max = pAsm->subs[unSubID].unStackDepthMax + + pAsm->CALLSTACK[pAsm->CALLSP].current; + if(max > pAsm->CALLSTACK[pAsm->CALLSP].max) + { + pAsm->CALLSTACK[pAsm->CALLSP].max = max; + } + + pAsm->subs[unSubID].pPresubDesc = pPresubDesc; + } + + return bRet; +} + +GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue) +{ + GLfloat fLiteral[2] = {0.1, 0.0}; + + pAsm->D.dst.opcode = SQ_OP2_INST_MOV; + pAsm->D.dst.op3 = 0; + pAsm->D.dst.rtype = DST_REG_TEMPORARY; + pAsm->D.dst.reg = pAsm->flag_reg_index; + pAsm->D.dst.writex = 1; + pAsm->D.dst.writey = 0; + pAsm->D.dst.writez = 0; + pAsm->D.dst.writew = 0; + pAsm->D2.dst2.literal_slots = 1; + pAsm->D2.dst2.SaturateMode = SATURATE_OFF; + pAsm->D.dst.predicated = 0; + /* in reloc where dislink flag init inst, only one slot alu inst is handled. */ + pAsm->D.dst.math = 1; /* TODO : not math really, but one channel op, more generic alu assembler needed */ + pAsm->D2.dst2.index_mode = SQ_INDEX_LOOP; /* Check this ! */ +#if 0 + pAsm->S[0].src.rtype = SRC_REC_LITERAL; + //pAsm->S[0].src.reg = 0; + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + noneg_PVSSRC(&(pAsm->S[0].src)); + pAsm->S[0].src.swizzlex = SQ_SEL_X; + pAsm->S[0].src.swizzley = SQ_SEL_Y; + pAsm->S[0].src.swizzlez = SQ_SEL_Z; + pAsm->S[0].src.swizzlew = SQ_SEL_W; + + if( GL_FALSE == next_ins_literal(pAsm, &(fLiteral[0])) ) + { + return GL_FALSE; + } +#else + pAsm->S[0].src.rtype = DST_REG_TEMPORARY; + pAsm->S[0].src.reg = 0; + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + noneg_PVSSRC(&(pAsm->S[0].src)); + pAsm->S[0].src.swizzlex = flagValue; + pAsm->S[0].src.swizzley = flagValue; + pAsm->S[0].src.swizzlez = flagValue; + pAsm->S[0].src.swizzlew = flagValue; + + if( GL_FALSE == next_ins(pAsm) ) + { + return GL_FALSE; + } +#endif + + return GL_TRUE; +} + +GLboolean testFlag(r700_AssemblerBase *pAsm) +{ + GLfloat fLiteral[2] = {0.1, 0.0}; + + //Test flag + GLuint tmp = gethelpr(pAsm); + pAsm->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; + + pAsm->D.dst.opcode = SQ_OP2_INST_PRED_SETE; + pAsm->D.dst.math = 1; + pAsm->D.dst.rtype = DST_REG_TEMPORARY; + pAsm->D.dst.reg = tmp; + pAsm->D.dst.writex = 1; + pAsm->D.dst.writey = 0; + pAsm->D.dst.writez = 0; + pAsm->D.dst.writew = 0; + pAsm->D2.dst2.literal_slots = 1; + pAsm->D2.dst2.SaturateMode = SATURATE_OFF; + pAsm->D.dst.predicated = 1; + pAsm->D2.dst2.index_mode = SQ_INDEX_LOOP; /* Check this ! */ + + pAsm->S[0].src.rtype = DST_REG_TEMPORARY; + pAsm->S[0].src.reg = pAsm->flag_reg_index; + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + noneg_PVSSRC(&(pAsm->S[0].src)); + pAsm->S[0].src.swizzlex = SQ_SEL_X; + pAsm->S[0].src.swizzley = SQ_SEL_Y; + pAsm->S[0].src.swizzlez = SQ_SEL_Z; + pAsm->S[0].src.swizzlew = SQ_SEL_W; +#if 0 + pAsm->S[1].src.rtype = SRC_REC_LITERAL; + //pAsm->S[1].src.reg = 0; + setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); + noneg_PVSSRC(&(pAsm->S[1].src)); + pAsm->S[1].src.swizzlex = SQ_SEL_X; + pAsm->S[1].src.swizzley = SQ_SEL_Y; + pAsm->S[1].src.swizzlez = SQ_SEL_Z; + pAsm->S[1].src.swizzlew = SQ_SEL_W; + + if( GL_FALSE == next_ins_literal(pAsm, &(fLiteral[0])) ) + { + return GL_FALSE; + } +#else + pAsm->S[1].src.rtype = DST_REG_TEMPORARY; + pAsm->S[1].src.reg = 0; + setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); + noneg_PVSSRC(&(pAsm->S[1].src)); + pAsm->S[1].src.swizzlex = SQ_SEL_1; + pAsm->S[1].src.swizzley = SQ_SEL_1; + pAsm->S[1].src.swizzlez = SQ_SEL_1; + pAsm->S[1].src.swizzlew = SQ_SEL_1; + + if( GL_FALSE == next_ins(pAsm) ) + { + return GL_FALSE; + } +#endif + + checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE); + + return GL_TRUE; +} + +GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF) +{ + testFlag(pAsm); + jumpToOffest(pAsm, 1, 4); + setRetInLoopFlag(pAsm, SQ_SEL_0); + pops(pAsm, unIF + 1); + add_return_inst(pAsm); + return GL_TRUE; } -GLboolean AssembleInstr(GLuint uiNumberInsts, +GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP) +{ + testFlag(pAsm); + + //break + if(GL_FALSE == add_cf_instruction(pAsm) ) + { + return GL_FALSE; + } + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond = SQ_CF_COND_ACTIVE; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_LOOP_BREAK; + pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; + + pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier = 0x1; + + pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( + (void *)pAsm->fc_stack[unFCSP].mid, + sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid, + sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) ); + pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr; + pAsm->fc_stack[unFCSP].unNumMid++; + + pops(pAsm, 1); + + return GL_TRUE; +} + +GLboolean AssembleInstr(GLuint uiFirstInst, + GLuint uiIL_Shift, + GLuint uiNumberInsts, struct prog_instruction *pILInst, r700_AssemblerBase *pR700AsmCode) { GLuint i; pR700AsmCode->pILInst = pILInst; - for(i=0; i<uiNumberInsts; i++) + for(i=uiFirstInst; i<uiNumberInsts; i++) { pR700AsmCode->uiCurInst = i; +#ifndef USE_CF_FOR_CONTINUE_BREAK + if(OPCODE_BRK == pILInst[i+1].Opcode) + { + switch(pILInst[i].Opcode) + { + case OPCODE_SLE: + pILInst[i].Opcode = OPCODE_SGT; + break; + case OPCODE_SLT: + pILInst[i].Opcode = OPCODE_SGE; + break; + case OPCODE_SGE: + pILInst[i].Opcode = OPCODE_SLT; + break; + case OPCODE_SGT: + pILInst[i].Opcode = OPCODE_SLE; + break; + case OPCODE_SEQ: + pILInst[i].Opcode = OPCODE_SNE; + break; + case OPCODE_SNE: + pILInst[i].Opcode = OPCODE_SEQ; + break; + default: + break; + } + } +#endif + if(pILInst[i].CondUpdate == 1) + { + /* remember dest register used for cond evaluation */ + /* XXX also handle PROGRAM_OUTPUT registers here? */ + pR700AsmCode->last_cond_register = pILInst[i].DstReg.Index; + } + switch (pILInst[i].Opcode) { case OPCODE_ABS: @@ -4313,7 +5436,7 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, return GL_FALSE; break; case OPCODE_COS: - if ( GL_FALSE == assemble_COS(pR700AsmCode) ) + if ( GL_FALSE == assemble_TRIG(pR700AsmCode, SQ_OP2_INST_COS) ) return GL_FALSE; break; @@ -4342,7 +5465,8 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, if ( GL_FALSE == assemble_FLR(pR700AsmCode) ) return GL_FALSE; break; - //case OP_FLR_INT: + //case OP_FLR_INT: ; + // if ( GL_FALSE == assemble_FLR_INT() ) // return GL_FALSE; // break; @@ -4353,7 +5477,8 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, break; case OPCODE_KIL: - if ( GL_FALSE == assemble_KIL(pR700AsmCode) ) + case OPCODE_KIL_NV: + if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGT) ) return GL_FALSE; break; case OPCODE_LG2: @@ -4393,6 +5518,26 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, case OPCODE_MUL: if ( GL_FALSE == assemble_MUL(pR700AsmCode) ) return GL_FALSE; + break; + + case OPCODE_NOISE1: + { + callPreSub(pR700AsmCode, + GLSL_NOISE1, + &noise1_presub, + pILInst->DstReg.Index + pR700AsmCode->starting_temp_register_number, + 1); + radeon_error("noise1: not yet supported shader instruction\n"); + }; + break; + case OPCODE_NOISE2: + radeon_error("noise2: not yet supported shader instruction\n"); + break; + case OPCODE_NOISE3: + radeon_error("noise3: not yet supported shader instruction\n"); + break; + case OPCODE_NOISE4: + radeon_error("noise4: not yet supported shader instruction\n"); break; case OPCODE_POW: @@ -4408,22 +5553,78 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, return GL_FALSE; break; case OPCODE_SIN: - if ( GL_FALSE == assemble_SIN(pR700AsmCode) ) + if ( GL_FALSE == assemble_TRIG(pR700AsmCode, SQ_OP2_INST_SIN) ) return GL_FALSE; break; case OPCODE_SCS: if ( GL_FALSE == assemble_SCS(pR700AsmCode) ) return GL_FALSE; - break; + break; + + case OPCODE_SEQ: + if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETE) ) + { + return GL_FALSE; + } + break; + + case OPCODE_SGT: + if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGT) ) + { + return GL_FALSE; + } + break; case OPCODE_SGE: if ( GL_FALSE == assemble_SGE(pR700AsmCode) ) + { return GL_FALSE; - break; + } + break; + + /* NO LT, LE, TODO : use GE => LE, GT => LT : reverse 2 src order would be simpliest. Or use SQ_CF_COND_FALSE for SQ_CF_COND_ACTIVE.*/ case OPCODE_SLT: - if ( GL_FALSE == assemble_SLT(pR700AsmCode) ) + { + struct prog_src_register SrcRegSave[2]; + SrcRegSave[0] = pILInst[i].SrcReg[0]; + SrcRegSave[1] = pILInst[i].SrcReg[1]; + pILInst[i].SrcReg[0] = SrcRegSave[1]; + pILInst[i].SrcReg[1] = SrcRegSave[0]; + if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGT) ) + { + pILInst[i].SrcReg[0] = SrcRegSave[0]; + pILInst[i].SrcReg[1] = SrcRegSave[1]; + return GL_FALSE; + } + pILInst[i].SrcReg[0] = SrcRegSave[0]; + pILInst[i].SrcReg[1] = SrcRegSave[1]; + } + break; + + case OPCODE_SLE: + { + struct prog_src_register SrcRegSave[2]; + SrcRegSave[0] = pILInst[i].SrcReg[0]; + SrcRegSave[1] = pILInst[i].SrcReg[1]; + pILInst[i].SrcReg[0] = SrcRegSave[1]; + pILInst[i].SrcReg[1] = SrcRegSave[0]; + if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGE) ) + { + pILInst[i].SrcReg[0] = SrcRegSave[0]; + pILInst[i].SrcReg[1] = SrcRegSave[1]; + return GL_FALSE; + } + pILInst[i].SrcReg[0] = SrcRegSave[0]; + pILInst[i].SrcReg[1] = SrcRegSave[1]; + } + break; + + case OPCODE_SNE: + if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETNE) ) + { return GL_FALSE; - break; + } + break; //case OP_STP: // if ( GL_FALSE == assemble_STP(pR700AsmCode) ) @@ -4457,30 +5658,104 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, return GL_FALSE; break; + case OPCODE_TRUNC: + if ( GL_FALSE == assemble_math_function(pR700AsmCode, SQ_OP2_INST_TRUNC) ) + return GL_FALSE; + break; + case OPCODE_XPD: if ( GL_FALSE == assemble_XPD(pR700AsmCode) ) return GL_FALSE; break; case OPCODE_IF : - if ( GL_FALSE == assemble_IF(pR700AsmCode) ) - return GL_FALSE; + { + GLboolean bHasElse = GL_FALSE; + + if(pILInst[pILInst[i].BranchTarget - 1].Opcode == OPCODE_ELSE) + { + bHasElse = GL_TRUE; + } + + if ( GL_FALSE == assemble_IF(pR700AsmCode, bHasElse) ) + { + return GL_FALSE; + } + } break; + case OPCODE_ELSE : - radeon_error("Not yet implemented instruction OPCODE_ELSE \n"); - //if ( GL_FALSE == assemble_BAD("ELSE") ) + if ( GL_FALSE == assemble_ELSE(pR700AsmCode) ) return GL_FALSE; break; + case OPCODE_ENDIF: if ( GL_FALSE == assemble_ENDIF(pR700AsmCode) ) return GL_FALSE; break; + case OPCODE_BGNLOOP: + if( GL_FALSE == assemble_BGNLOOP(pR700AsmCode) ) + { + return GL_FALSE; + } + break; + + case OPCODE_BRK: + if( GL_FALSE == assemble_BRK(pR700AsmCode) ) + { + return GL_FALSE; + } + break; + + case OPCODE_CONT: + if( GL_FALSE == assemble_CONT(pR700AsmCode) ) + { + return GL_FALSE; + } + break; + + case OPCODE_ENDLOOP: + if( GL_FALSE == assemble_ENDLOOP(pR700AsmCode) ) + { + return GL_FALSE; + } + break; + + case OPCODE_BGNSUB: + if( GL_FALSE == assemble_BGNSUB(pR700AsmCode, i, uiIL_Shift) ) + { + return GL_FALSE; + } + break; + + case OPCODE_RET: + if( GL_FALSE == assemble_RET(pR700AsmCode) ) + { + return GL_FALSE; + } + break; + + case OPCODE_CAL: + if( GL_FALSE == assemble_CAL(pR700AsmCode, + pILInst[i].BranchTarget, + uiIL_Shift, + uiNumberInsts, + pILInst, + NULL) ) + { + return GL_FALSE; + } + break; + //case OPCODE_EXPORT: // if ( GL_FALSE == assemble_EXPORT() ) // return GL_FALSE; // break; + case OPCODE_ENDSUB: + return assemble_ENDSUB(pR700AsmCode); + case OPCODE_END: //pR700AsmCode->uiCurInst = i; //This is to remaind that if in later exoort there is depth/stencil @@ -4497,6 +5772,417 @@ GLboolean AssembleInstr(GLuint uiNumberInsts, return GL_TRUE; } +GLboolean InitShaderProgram(r700_AssemblerBase * pAsm) +{ + setRetInLoopFlag(pAsm, SQ_SEL_0); + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + return GL_TRUE; +} + +GLboolean RelocProgram(r700_AssemblerBase * pAsm, struct gl_program * pILProg) +{ + GLuint i; + GLuint unCFoffset; + TypedShaderList * plstCFmain; + TypedShaderList * plstCFsub; + + R700ShaderInstruction * pInst; + R700ControlFlowGenericClause * pCFInst; + + R700ControlFlowALUClause * pCF_ALU; + R700ALUInstruction * pALU; + GLuint unConstOffset = 0; + GLuint unRegOffset; + GLuint unMinRegIndex; + + plstCFmain = pAsm->CALLSTACK[0].plstCFInstructions_local; + + /* remove flags init if they are not used */ + if((pAsm->unCFflags & HAS_LOOPRET) == 0) + { + R700ControlFlowALUClause * pCF_ALU; + pInst = plstCFmain->pHead; + while(pInst) + { + if(SIT_CF_ALU == pInst->m_ShaderInstType) + { + pCF_ALU = (R700ControlFlowALUClause *)pInst; + if(0 == pCF_ALU->m_Word1.f.count) + { + pCF_ALU->m_Word1.f.cf_inst = SQ_CF_INST_NOP; + } + else + { + R700ALUInstruction * pALU = pCF_ALU->m_pLinkedALUInstruction; + + pALU->m_pLinkedALUClause = NULL; + pALU = (R700ALUInstruction *)(pALU->pNextInst); + pALU->m_pLinkedALUClause = pCF_ALU; + pCF_ALU->m_pLinkedALUInstruction = pALU; + + pCF_ALU->m_Word1.f.count--; + } + break; + } + pInst = pInst->pNextInst; + }; + } + + if(pAsm->CALLSTACK[0].max > 0) + { + pAsm->pR700Shader->uStackSize = ((pAsm->CALLSTACK[0].max + 3)>>2) + 2; + } + + if(0 == pAsm->unSubArrayPointer) + { + return GL_TRUE; + } + + unCFoffset = plstCFmain->uNumOfNode; + + if(NULL != pILProg->Parameters) + { + unConstOffset = pILProg->Parameters->NumParameters; + } + + /* Reloc subs */ + for(i=0; i<pAsm->unSubArrayPointer; i++) + { + pAsm->subs[i].unCFoffset = unCFoffset; + plstCFsub = &(pAsm->subs[i].lstCFInstructions_local); + + pInst = plstCFsub->pHead; + + /* reloc instructions */ + while(pInst) + { + if(SIT_CF_GENERIC == pInst->m_ShaderInstType) + { + pCFInst = (R700ControlFlowGenericClause *)pInst; + + switch (pCFInst->m_Word1.f.cf_inst) + { + case SQ_CF_INST_POP: + case SQ_CF_INST_JUMP: + case SQ_CF_INST_ELSE: + case SQ_CF_INST_LOOP_END: + case SQ_CF_INST_LOOP_START: + case SQ_CF_INST_LOOP_START_NO_AL: + case SQ_CF_INST_LOOP_CONTINUE: + case SQ_CF_INST_LOOP_BREAK: + pCFInst->m_Word0.f.addr += unCFoffset; + break; + default: + break; + } + } + + pInst->m_uIndex += unCFoffset; + + pInst = pInst->pNextInst; + }; + + if(NULL != pAsm->subs[i].pPresubDesc) + { + GLuint uNumSrc; + + unMinRegIndex = pAsm->subs[i].pPresubDesc->pCompiledSub->MinRegIndex; + unRegOffset = pAsm->subs[i].pPresubDesc->maxStartReg; + unConstOffset += pAsm->subs[i].pPresubDesc->unConstantsStart; + + pInst = plstCFsub->pHead; + while(pInst) + { + if(SIT_CF_ALU == pInst->m_ShaderInstType) + { + pCF_ALU = (R700ControlFlowALUClause *)pInst; + + pALU = pCF_ALU->m_pLinkedALUInstruction; + for(int j=0; j<=pCF_ALU->m_Word1.f.count; j++) + { + pALU->m_Word1.f.dst_gpr = pALU->m_Word1.f.dst_gpr + unRegOffset - unMinRegIndex; + + if(pALU->m_Word0.f.src0_sel < SQ_ALU_SRC_GPR_SIZE) + { + pALU->m_Word0.f.src0_sel = pALU->m_Word0.f.src0_sel + unRegOffset - unMinRegIndex; + } + else if(pALU->m_Word0.f.src0_sel >= SQ_ALU_SRC_CFILE_BASE) + { + pALU->m_Word0.f.src0_sel += unConstOffset; + } + + if( ((pALU->m_Word1.val >> SQ_ALU_WORD1_OP3_ALU_INST_SHIFT) & 0x0000001F) + >= SQ_OP3_INST_MUL_LIT ) + { /* op3 : 3 srcs */ + if(pALU->m_Word1_OP3.f.src2_sel < SQ_ALU_SRC_GPR_SIZE) + { + pALU->m_Word1_OP3.f.src2_sel = pALU->m_Word1_OP3.f.src2_sel + unRegOffset - unMinRegIndex; + } + else if(pALU->m_Word1_OP3.f.src2_sel >= SQ_ALU_SRC_CFILE_BASE) + { + pALU->m_Word1_OP3.f.src2_sel += unConstOffset; + } + if(pALU->m_Word0.f.src1_sel < SQ_ALU_SRC_GPR_SIZE) + { + pALU->m_Word0.f.src1_sel = pALU->m_Word0.f.src1_sel + unRegOffset - unMinRegIndex; + } + else if(pALU->m_Word0.f.src1_sel >= SQ_ALU_SRC_CFILE_BASE) + { + pALU->m_Word0.f.src1_sel += unConstOffset; + } + } + else + { + if(pAsm->bR6xx) + { + uNumSrc = r700GetNumOperands(pALU->m_Word1_OP2.f6.alu_inst, 0); + } + else + { + uNumSrc = r700GetNumOperands(pALU->m_Word1_OP2.f.alu_inst, 0); + } + if(2 == uNumSrc) + { /* 2 srcs */ + if(pALU->m_Word0.f.src1_sel < SQ_ALU_SRC_GPR_SIZE) + { + pALU->m_Word0.f.src1_sel = pALU->m_Word0.f.src1_sel + unRegOffset - unMinRegIndex; + } + else if(pALU->m_Word0.f.src1_sel >= SQ_ALU_SRC_CFILE_BASE) + { + pALU->m_Word0.f.src1_sel += unConstOffset; + } + } + } + pALU = (R700ALUInstruction*)(pALU->pNextInst); + } + } + pInst = pInst->pNextInst; + }; + } + + /* Put sub into main */ + plstCFmain->pTail->pNextInst = plstCFsub->pHead; + plstCFmain->pTail = plstCFsub->pTail; + plstCFmain->uNumOfNode += plstCFsub->uNumOfNode; + + unCFoffset += plstCFsub->uNumOfNode; + } + + /* reloc callers */ + for(i=0; i<pAsm->unCallerArrayPointer; i++) + { + pAsm->callers[i].cf_ptr->m_Word0.f.addr + = pAsm->subs[pAsm->callers[i].subDescIndex].unCFoffset; + + if(NULL != pAsm->subs[pAsm->callers[i].subDescIndex].pPresubDesc) + { + unMinRegIndex = pAsm->subs[pAsm->callers[i].subDescIndex].pPresubDesc->pCompiledSub->MinRegIndex; + unRegOffset = pAsm->subs[pAsm->callers[i].subDescIndex].pPresubDesc->maxStartReg; + + if(NULL != pAsm->callers[i].prelude_cf_ptr) + { + pCF_ALU = (R700ControlFlowALUClause * )(pAsm->callers[i].prelude_cf_ptr); + pALU = pCF_ALU->m_pLinkedALUInstruction; + for(int j=0; j<=pCF_ALU->m_Word1.f.count; j++) + { + pALU->m_Word1.f.dst_gpr = pALU->m_Word1.f.dst_gpr + unRegOffset - unMinRegIndex; + pALU = (R700ALUInstruction*)(pALU->pNextInst); + } + } + if(NULL != pAsm->callers[i].finale_cf_ptr) + { + pCF_ALU = (R700ControlFlowALUClause * )(pAsm->callers[i].finale_cf_ptr); + pALU = pCF_ALU->m_pLinkedALUInstruction; + for(int j=0; j<=pCF_ALU->m_Word1.f.count; j++) + { + pALU->m_Word0.f.src0_sel = pALU->m_Word0.f.src0_sel + unRegOffset - unMinRegIndex; + pALU = (R700ALUInstruction*)(pALU->pNextInst); + } + } + } + } + + return GL_TRUE; +} + +GLboolean callPreSub(r700_AssemblerBase* pAsm, + LOADABLE_SCRIPT_SIGNITURE scriptSigniture, + COMPILED_SUB * pCompiledSub, + GLshort uOutReg, + GLshort uNumValidSrc) +{ + /* save assemble context */ + GLuint starting_temp_register_number_save; + GLuint number_used_registers_save; + GLuint uFirstHelpReg_save; + GLuint uHelpReg_save; + GLuint uiCurInst_save; + struct prog_instruction *pILInst_save; + PRESUB_DESC * pPresubDesc; + GLboolean bRet; + int i; + + R700ControlFlowGenericClause* prelude_cf_ptr = NULL; + + /* copy srcs to presub inputs */ + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + for(i=0; i<uNumValidSrc; i++) + { + pAsm->D.dst.opcode = SQ_OP2_INST_MOV; + setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE); + pAsm->D.dst.rtype = DST_REG_TEMPORARY; + pAsm->D.dst.reg = pCompiledSub->srcRegIndex[i]; + pAsm->D.dst.writex = 1; + pAsm->D.dst.writey = 1; + pAsm->D.dst.writez = 1; + pAsm->D.dst.writew = 1; + + if( GL_FALSE == assemble_src(pAsm, i, 0) ) + { + return GL_FALSE; + } + + next_ins(pAsm); + } + if(uNumValidSrc > 0) + { + prelude_cf_ptr = pAsm->cf_current_alu_clause_ptr; + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + } + + /* browse thro existing presubs. */ + for(i=0; i<pAsm->unNumPresub; i++) + { + if(pAsm->presubs[i].sptSigniture == scriptSigniture) + { + break; + } + } + + if(i == pAsm->unNumPresub) + { /* not loaded yet */ + /* save assemble context */ + number_used_registers_save = pAsm->number_used_registers; + uFirstHelpReg_save = pAsm->uFirstHelpReg; + uHelpReg_save = pAsm->uHelpReg; + starting_temp_register_number_save = pAsm->starting_temp_register_number; + pILInst_save = pAsm->pILInst; + uiCurInst_save = pAsm->uiCurInst; + + /* alloc in presub */ + if( (pAsm->unNumPresub + 1) > pAsm->unPresubArraySize ) + { + pAsm->presubs = (PRESUB_DESC*)_mesa_realloc( (void *)pAsm->presubs, + sizeof(PRESUB_DESC) * pAsm->unPresubArraySize, + sizeof(PRESUB_DESC) * (pAsm->unPresubArraySize + 4) ); + if(NULL == pAsm->presubs) + { + radeon_error("No memeory to allocate built in shader function description structures. \n"); + return GL_FALSE; + } + pAsm->unPresubArraySize += 4; + } + + pPresubDesc = &(pAsm->presubs[i]); + pPresubDesc->sptSigniture = scriptSigniture; + + /* constants offsets need to be final resolved at reloc. */ + if(0 == pAsm->unNumPresub) + { + pPresubDesc->unConstantsStart = 0; + } + else + { + pPresubDesc->unConstantsStart = pAsm->presubs[i-1].unConstantsStart + + pAsm->presubs[i-1].pCompiledSub->NumParameters; + } + + pPresubDesc->pCompiledSub = pCompiledSub; + + pPresubDesc->subIL_Shift = pAsm->unCurNumILInsts; + pPresubDesc->maxStartReg = uFirstHelpReg_save; + pAsm->unCurNumILInsts += pCompiledSub->NumInstructions; + + pAsm->unNumPresub++; + + /* setup new assemble context */ + pAsm->starting_temp_register_number = 0; + pAsm->number_used_registers = pCompiledSub->NumTemporaries; + pAsm->uFirstHelpReg = pAsm->number_used_registers; + pAsm->uHelpReg = pAsm->uFirstHelpReg; + + bRet = assemble_CAL(pAsm, + 0, + pPresubDesc->subIL_Shift, + pCompiledSub->NumInstructions, + pCompiledSub->Instructions, + pPresubDesc); + + + pPresubDesc->number_used_registers = pAsm->number_used_registers; + + /* restore assemble context */ + pAsm->number_used_registers = number_used_registers_save; + pAsm->uFirstHelpReg = uFirstHelpReg_save; + pAsm->uHelpReg = uHelpReg_save; + pAsm->starting_temp_register_number = starting_temp_register_number_save; + pAsm->pILInst = pILInst_save; + pAsm->uiCurInst = uiCurInst_save; + } + else + { /* was loaded */ + pPresubDesc = &(pAsm->presubs[i]); + + bRet = assemble_CAL(pAsm, + 0, + pPresubDesc->subIL_Shift, + pCompiledSub->NumInstructions, + pCompiledSub->Instructions, + pPresubDesc); + } + + if(GL_FALSE == bRet) + { + radeon_error("Shader presub assemble failed. \n"); + } + else + { + /* copy presub output to real dst */ + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + pAsm->D.dst.opcode = SQ_OP2_INST_MOV; + + if( GL_FALSE == assemble_dst(pAsm) ) + { + return GL_FALSE; + } + + setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); + pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; + pAsm->S[0].src.reg = pCompiledSub->dstRegIndex; + pAsm->S[0].src.swizzlex = pCompiledSub->outputSwizzleX; + pAsm->S[0].src.swizzley = pCompiledSub->outputSwizzleY; + pAsm->S[0].src.swizzlez = pCompiledSub->outputSwizzleZ; + pAsm->S[0].src.swizzlew = pCompiledSub->outputSwizzleW; + + next_ins(pAsm); + + pAsm->callers[pAsm->unCallerArrayPointer - 1].finale_cf_ptr = pAsm->cf_current_alu_clause_ptr; + pAsm->callers[pAsm->unCallerArrayPointer - 1].prelude_cf_ptr = prelude_cf_ptr; + pAsm->alu_x_opcode = SQ_CF_INST_ALU; + } + + if( (pPresubDesc->number_used_registers + pAsm->uFirstHelpReg) > pAsm->number_used_registers ) + { + pAsm->number_used_registers = pPresubDesc->number_used_registers + pAsm->uFirstHelpReg; + } + if(pAsm->uFirstHelpReg > pPresubDesc->maxStartReg) + { + pPresubDesc->maxStartReg = pAsm->uFirstHelpReg; + } + + return bRet; +} + GLboolean Process_Export(r700_AssemblerBase* pAsm, GLuint type, GLuint export_starting_index, @@ -4791,6 +6477,25 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, export_starting_index++; } } + + for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++) + { + unBit = 1 << i; + if(OutputsWritten & unBit) + { + if( GL_FALSE == Process_Export(pR700AsmCode, + SQ_EXPORT_PARAM, + export_starting_index, + 1, + pR700AsmCode->ucVP_OutputMap[i], + GL_FALSE) ) + { + return GL_FALSE; + } + + export_starting_index++; + } + } // At least one param should be exported if (export_count) @@ -4825,6 +6530,21 @@ GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode) { FREE(pR700AsmCode->pucOutMask); FREE(pR700AsmCode->pInstDeps); + + if(NULL != pR700AsmCode->subs) + { + FREE(pR700AsmCode->subs); + } + if(NULL != pR700AsmCode->callers) + { + FREE(pR700AsmCode->callers); + } + + if(NULL != pR700AsmCode->presubs) + { + FREE(pR700AsmCode->presubs); + } + return GL_TRUE; } diff --git a/src/mesa/drivers/dri/r600/r700_assembler.h b/src/mesa/drivers/dri/r600/r700_assembler.h index c66db502a1..6ef945dfda 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.h +++ b/src/mesa/drivers/dri/r600/r700_assembler.h @@ -34,6 +34,45 @@ #include "r700_shaderinst.h" #include "r700_shader.h" +typedef enum LOADABLE_SCRIPT_SIGNITURE +{ + GLSL_NOISE1 = 0x10000001, + GLSL_NOISE2 = 0x10000002, + GLSL_NOISE3 = 0x10000003, + GLSL_NOISE4 = 0x10000004 +}LOADABLE_SCRIPT_SIGNITURE; + +typedef struct COMPILED_SUB +{ + struct prog_instruction *Instructions; + GLuint NumInstructions; + GLuint NumTemporaries; + GLuint NumParameters; + GLuint MinRegIndex; + GLfloat (*ParameterValues)[4]; + GLbyte outputSwizzleX; + GLbyte outputSwizzleY; + GLbyte outputSwizzleZ; + GLbyte outputSwizzleW; + GLshort srcRegIndex[3]; + GLushort dstRegIndex; +}COMPILED_SUB; + +typedef struct PRESUB_DESCtag +{ + LOADABLE_SCRIPT_SIGNITURE sptSigniture; + GLint subIL_Shift; + struct prog_src_register InReg[3]; + struct prog_dst_register OutReg; + + GLushort maxStartReg; + GLushort number_used_registers; + + GLuint unConstantsStart; + + COMPILED_SUB * pCompiledSub; +} PRESUB_DESC; + typedef enum SHADER_PIPE_TYPE { SPT_VP = 0, @@ -72,7 +111,8 @@ typedef enum SrcRegisterType SRC_REG_INPUT = 1, SRC_REG_CONSTANT = 2, SRC_REG_ALT_TEMPORARY = 3, - NUMBER_OF_SRC_REG_TYPE = 4 + SRC_REC_LITERAL = 4, + NUMBER_OF_SRC_REG_TYPE = 5 } SrcRegisterType; typedef enum DstRegisterType @@ -111,16 +151,24 @@ typedef struct PVSDSTtag BITS addrmode1:1; //32 } PVSDST; +typedef struct PVSINSTtag +{ + BITS literal_slots :2; + BITS SaturateMode :2; + BITS index_mode :3; +} PVSINST; + typedef struct PVSSRCtag { - BITS rtype:4; + BITS rtype:3; BITS addrmode0:1; - BITS reg:10; //15 (8) + BITS reg:10; //14 (8) BITS swizzlex:3; BITS swizzley:3; BITS swizzlez:3; - BITS swizzlew:3; //27 + BITS swizzlew:3; //26 + BITS abs:1; BITS negx:1; BITS negy:1; BITS negz:1; @@ -148,6 +196,7 @@ typedef union PVSDWORDtag { BITS bits; PVSDST dst; + PVSINST dst2; PVSSRC src; PVSMATH math; float f; @@ -251,6 +300,8 @@ enum FC_IF = 1, FC_LOOP = 2, FC_REP = 3, + FC_PUSH_VPM = 4, + FC_PUSH_WQM = 5, COND_NONE = 0, COND_BOOL = 1, @@ -263,22 +314,56 @@ enum typedef struct FC_LEVEL { - unsigned int first; ///< first fc instruction on level (if, rep, loop) - unsigned int* mid; ///< middle instructions - else or all breaks on this level - unsigned int midLen; - unsigned int type; - unsigned int cond; - unsigned int inv; - unsigned int bpush; ///< 1 if first instruction does branch stack push - int id; ///< id of bool or int variable + R700ControlFlowGenericClause * first; + R700ControlFlowGenericClause ** mid; + unsigned int unNumMid; + unsigned int midLen; + unsigned int type; + unsigned int cond; + unsigned int inv; + int id; ///< id of bool or int variable } FC_LEVEL; typedef struct VTX_FETCH_METHOD { - GLboolean bEnableMini; - GLuint mega_fetch_remainder; + GLboolean bEnableMini; + GLuint mega_fetch_remainder; } VTX_FETCH_METHOD; +typedef struct SUB_OFFSET +{ + GLint subIL_Offset; + GLuint unCFoffset; + GLuint unStackDepthMax; + PRESUB_DESC * pPresubDesc; + TypedShaderList lstCFInstructions_local; +} SUB_OFFSET; + +typedef struct CALLER_POINTER +{ + GLint subIL_Offset; + GLint subDescIndex; + R700ControlFlowGenericClause* cf_ptr; + + R700ControlFlowGenericClause* prelude_cf_ptr; + R700ControlFlowGenericClause* finale_cf_ptr; +} CALLER_POINTER; + +#define SQ_MAX_CALL_DEPTH 0x00000020 + +typedef struct CALL_LEVEL +{ + unsigned int FCSP_BeforeEntry; + GLint subDescIndex; + GLushort current; + GLushort max; + TypedShaderList * plstCFInstructions_local; +} CALL_LEVEL; + +#define HAS_CURRENT_LOOPRET 0x1L +#define HAS_LOOPRET 0x2L +#define LOOPRET_FLAGS HAS_LOOPRET | HAS_CURRENT_LOOPRET + typedef struct r700_AssemblerBase { R700ControlFlowSXClause* cf_last_export_ptr; @@ -294,14 +379,19 @@ typedef struct r700_AssemblerBase // No clause has been created yet CF_CLAUSE_TYPE cf_current_clause_type; + BITS alu_x_opcode; + GLuint number_of_exports; GLuint number_of_colorandz_exports; GLuint number_of_export_opcodes; PVSDWORD D; + PVSDWORD D2; PVSDWORD S[3]; + PVSDWORD C[4]; unsigned int uLastPosUpdate; + unsigned int last_cond_register; OUT_FRAGMENT_FMT_0 fp_stOutFmt0; @@ -310,6 +400,8 @@ typedef struct r700_AssemblerBase unsigned int number_used_registers; unsigned int uUsedConsts; + unsigned int flag_reg_index; + // Fragment programs unsigned int uiFP_AttributeMap[FRAG_ATTRIB_MAX]; unsigned int uiFP_OutputMap[FRAG_RESULT_MAX]; @@ -330,9 +422,6 @@ typedef struct r700_AssemblerBase unsigned int FCSP; FC_LEVEL fc_stack[32]; - unsigned int branch_depth; - unsigned int max_branch_depth; - //----------------------------------------------------------------------------------- // ArgSubst used in Assemble_Source() function //----------------------------------------------------------------------------------- @@ -373,11 +462,29 @@ typedef struct r700_AssemblerBase SHADER_PIPE_TYPE currentShaderType; struct prog_instruction * pILInst; GLuint uiCurInst; + GLubyte SamplerUnits[MAX_SAMPLERS]; GLboolean bR6xx; /* helper to decide which type of instruction to assemble */ GLboolean is_tex; /* we inserted helper intructions and need barrier on next TEX ins */ GLboolean need_tex_barrier; + + SUB_OFFSET * subs; + GLuint unSubArraySize; + GLuint unSubArrayPointer; + CALLER_POINTER * callers; + GLuint unCallerArraySize; + GLuint unCallerArrayPointer; + unsigned int CALLSP; + CALL_LEVEL CALLSTACK[SQ_MAX_CALL_DEPTH]; + + GLuint unCFflags; + + PRESUB_DESC * presubs; + GLuint unPresubArraySize; + GLuint unNumPresub; + GLuint unCurNumILInsts; + } r700_AssemblerBase; //Internal use @@ -399,7 +506,7 @@ BITS is_depth_component_exported(OUT_FRAGMENT_FMT_0* pFPOutFmt) ; GLboolean is_reduction_opcode(PVSDWORD * dest); GLuint GetSurfaceFormat(GLenum eType, GLuint nChannels, GLuint * pClient_size); -unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm); +unsigned int r700GetNumOperands(GLuint opcode, GLuint nIsOp3); GLboolean IsTex(gl_inst_opcode Opcode); GLboolean IsAlu(gl_inst_opcode Opcode); @@ -446,6 +553,10 @@ GLboolean assemble_alu_src(R700ALUInstruction* alu_instruction_ptr, GLboolean add_alu_instruction(r700_AssemblerBase* pAsm, R700ALUInstruction* alu_instruction_ptr, GLuint contiguous_slots_needed); + +GLboolean add_cf_instruction(r700_AssemblerBase* pAsm); +void add_return_inst(r700_AssemblerBase *pAsm); + void get_src_properties(R700ALUInstruction* alu_instruction_ptr, int source_index, BITS* psrc_sel, @@ -467,13 +578,20 @@ GLboolean check_vector(r700_AssemblerBase* pAsm, R700ALUInstruction* alu_instruction_ptr); GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm); GLboolean next_ins(r700_AssemblerBase *pAsm); + +GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops); +GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset); +GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue); +GLboolean testFlag(r700_AssemblerBase *pAsm); +GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP); +GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF); + GLboolean assemble_math_function(r700_AssemblerBase* pAsm, BITS opcode); GLboolean assemble_ABS(r700_AssemblerBase *pAsm); GLboolean assemble_ADD(r700_AssemblerBase *pAsm); GLboolean assemble_ARL(r700_AssemblerBase *pAsm); GLboolean assemble_BAD(char *opcode_str); GLboolean assemble_CMP(r700_AssemblerBase *pAsm); -GLboolean assemble_COS(r700_AssemblerBase *pAsm); GLboolean assemble_DOT(r700_AssemblerBase *pAsm); GLboolean assemble_DST(r700_AssemblerBase *pAsm); GLboolean assemble_EX2(r700_AssemblerBase *pAsm); @@ -481,7 +599,7 @@ GLboolean assemble_EXP(r700_AssemblerBase *pAsm); GLboolean assemble_FLR(r700_AssemblerBase *pAsm); GLboolean assemble_FLR_INT(r700_AssemblerBase *pAsm); GLboolean assemble_FRC(r700_AssemblerBase *pAsm); -GLboolean assemble_KIL(r700_AssemblerBase *pAsm); +GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode); GLboolean assemble_LG2(r700_AssemblerBase *pAsm); GLboolean assemble_LRP(r700_AssemblerBase *pAsm); GLboolean assemble_LOG(r700_AssemblerBase *pAsm); @@ -494,17 +612,37 @@ GLboolean assemble_MUL(r700_AssemblerBase *pAsm); GLboolean assemble_POW(r700_AssemblerBase *pAsm); GLboolean assemble_RCP(r700_AssemblerBase *pAsm); GLboolean assemble_RSQ(r700_AssemblerBase *pAsm); -GLboolean assemble_SIN(r700_AssemblerBase *pAsm); GLboolean assemble_SCS(r700_AssemblerBase *pAsm); GLboolean assemble_SGE(r700_AssemblerBase *pAsm); + +GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode); +GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode); +GLboolean assemble_TRIG(r700_AssemblerBase *pAsm, BITS opcode); + GLboolean assemble_SLT(r700_AssemblerBase *pAsm); GLboolean assemble_STP(r700_AssemblerBase *pAsm); GLboolean assemble_TEX(r700_AssemblerBase *pAsm); GLboolean assemble_XPD(r700_AssemblerBase *pAsm); GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm); -GLboolean assemble_IF(r700_AssemblerBase *pAsm); +GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse); +GLboolean assemble_ELSE(r700_AssemblerBase *pAsm); GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm); +GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm); +GLboolean assemble_BRK(r700_AssemblerBase *pAsm); +GLboolean assemble_COND(r700_AssemblerBase *pAsm); +GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm); + +GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex, GLuint uiIL_Shift); +GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm); +GLboolean assemble_RET(r700_AssemblerBase *pAsm); +GLboolean assemble_CAL(r700_AssemblerBase *pAsm, + GLint nILindex, + GLuint uiIL_Offest, + GLuint uiNumberInsts, + struct prog_instruction *pILInst, + PRESUB_DESC * pPresubDesc); + GLboolean Process_Export(r700_AssemblerBase* pAsm, GLuint type, GLuint export_starting_index, @@ -514,14 +652,25 @@ GLboolean Process_Export(r700_AssemblerBase* pAsm, GLboolean Move_Depth_Exports_To_Correct_Channels(r700_AssemblerBase *pAsm, BITS depth_channel_select); +GLboolean callPreSub(r700_AssemblerBase* pAsm, + LOADABLE_SCRIPT_SIGNITURE scriptSigniture, + /* struct prog_instruction ** pILInstParent, */ + COMPILED_SUB * pCompiledSub, + GLshort uOutReg, + GLshort uNumValidSrc); //Interface -GLboolean AssembleInstr(GLuint uiNumberInsts, +GLboolean AssembleInstr(GLuint uiFirstInst, + GLuint uiIL_Shift, + GLuint uiNumberInsts, struct prog_instruction *pILInst, r700_AssemblerBase *pR700AsmCode); GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten); GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten); +GLboolean RelocProgram(r700_AssemblerBase * pAsm, struct gl_program * pILProg); +GLboolean InitShaderProgram(r700_AssemblerBase * pAsm); + int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700_Shader* pShader); GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode); diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index 02c56b98d9..ee2a0a4c8a 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -446,68 +446,77 @@ static void r700SendRenderTargetState(GLcontext *ctx, struct radeon_state_atom * static void r700SendPSState(GLcontext *ctx, struct radeon_state_atom *atom) { - context_t *context = R700_CONTEXT(ctx); - R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); - struct radeon_bo * pbo; - BATCH_LOCALS(&context->radeon); - radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); + context_t *context = R700_CONTEXT(ctx); + R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); + struct radeon_bo * pbo; + BATCH_LOCALS(&context->radeon); + radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); - pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context)); + pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context)); - if (!pbo) - return; + if (!pbo) + return; - r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); + r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); - BEGIN_BATCH_NO_AUTOSTATE(3 + 2); - R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1); - R600_OUT_BATCH(r700->ps.SQ_PGM_START_PS.u32All); - R600_OUT_BATCH_RELOC(r700->ps.SQ_PGM_START_PS.u32All, - pbo, - r700->ps.SQ_PGM_START_PS.u32All, - RADEON_GEM_DOMAIN_GTT, 0, 0); - END_BATCH(); + BEGIN_BATCH_NO_AUTOSTATE(3 + 2); + R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1); + R600_OUT_BATCH(r700->ps.SQ_PGM_START_PS.u32All); + R600_OUT_BATCH_RELOC(r700->ps.SQ_PGM_START_PS.u32All, + pbo, + r700->ps.SQ_PGM_START_PS.u32All, + RADEON_GEM_DOMAIN_GTT, 0, 0); + END_BATCH(); - BEGIN_BATCH_NO_AUTOSTATE(9); - R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_PS, r700->ps.SQ_PGM_RESOURCES_PS.u32All); - R600_OUT_BATCH_REGVAL(SQ_PGM_EXPORTS_PS, r700->ps.SQ_PGM_EXPORTS_PS.u32All); - R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_PS, r700->ps.SQ_PGM_CF_OFFSET_PS.u32All); - END_BATCH(); + BEGIN_BATCH_NO_AUTOSTATE(9); + R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_PS, r700->ps.SQ_PGM_RESOURCES_PS.u32All); + R600_OUT_BATCH_REGVAL(SQ_PGM_EXPORTS_PS, r700->ps.SQ_PGM_EXPORTS_PS.u32All); + R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_PS, r700->ps.SQ_PGM_CF_OFFSET_PS.u32All); + END_BATCH(); - COMMIT_BATCH(); + BEGIN_BATCH_NO_AUTOSTATE(3); + R600_OUT_BATCH_REGVAL(SQ_LOOP_CONST_0, 0x01000FFF); + END_BATCH(); + + COMMIT_BATCH(); } static void r700SendVSState(GLcontext *ctx, struct radeon_state_atom *atom) { - context_t *context = R700_CONTEXT(ctx); - R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); - struct radeon_bo * pbo; - BATCH_LOCALS(&context->radeon); - radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); + context_t *context = R700_CONTEXT(ctx); + R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); + struct radeon_bo * pbo; + BATCH_LOCALS(&context->radeon); + radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); - pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context)); + pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context)); - if (!pbo) - return; + if (!pbo) + return; - r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); + r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); - BEGIN_BATCH_NO_AUTOSTATE(3 + 2); - R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1); - R600_OUT_BATCH(r700->vs.SQ_PGM_START_VS.u32All); - R600_OUT_BATCH_RELOC(r700->vs.SQ_PGM_START_VS.u32All, - pbo, - r700->vs.SQ_PGM_START_VS.u32All, - RADEON_GEM_DOMAIN_GTT, 0, 0); - END_BATCH(); + BEGIN_BATCH_NO_AUTOSTATE(3 + 2); + R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1); + R600_OUT_BATCH(r700->vs.SQ_PGM_START_VS.u32All); + R600_OUT_BATCH_RELOC(r700->vs.SQ_PGM_START_VS.u32All, + pbo, + r700->vs.SQ_PGM_START_VS.u32All, + RADEON_GEM_DOMAIN_GTT, 0, 0); + END_BATCH(); - BEGIN_BATCH_NO_AUTOSTATE(6); - R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_VS, r700->vs.SQ_PGM_RESOURCES_VS.u32All); - R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_VS, r700->vs.SQ_PGM_CF_OFFSET_VS.u32All); - END_BATCH(); + BEGIN_BATCH_NO_AUTOSTATE(6); + R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_VS, r700->vs.SQ_PGM_RESOURCES_VS.u32All); + R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_VS, r700->vs.SQ_PGM_CF_OFFSET_VS.u32All); + END_BATCH(); - COMMIT_BATCH(); + BEGIN_BATCH_NO_AUTOSTATE(3); + R600_OUT_BATCH_REGVAL((SQ_LOOP_CONST_0 + 32*4), 0x0100000F); + //R600_OUT_BATCH_REGVAL((SQ_LOOP_CONST_0 + (SQ_LOOP_CONST_vs<2)), 0x0100000F); + END_BATCH(); + + COMMIT_BATCH(); } static void r700SendFSState(GLcontext *ctx, struct radeon_state_atom *atom) @@ -1309,8 +1318,8 @@ void r600InitAtoms(context_t *context) ALLOC_STATE(spi, always, (59 + R700_MAX_SHADER_EXPORTS), r700SendSPIState); ALLOC_STATE(vpt, always, 16, r700SendViewportState); ALLOC_STATE(fs, always, 18, r700SendFSState); - ALLOC_STATE(vs, always, 18, r700SendVSState); - ALLOC_STATE(ps, always, 21, r700SendPSState); + ALLOC_STATE(vs, always, 21, r700SendVSState); + ALLOC_STATE(ps, always, 24, r700SendPSState); ALLOC_STATE(vs_consts, vs_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendVSConsts); ALLOC_STATE(ps_consts, ps_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendPSConsts); ALLOC_STATE(vtx, vtx, (6 + (VERT_ATTRIB_MAX * 18)), r700SendVTXState); diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c index ccafd433bf..d15f013710 100644 --- a/src/mesa/drivers/dri/r600/r700_fragprog.c +++ b/src/mesa/drivers/dri/r600/r700_fragprog.c @@ -44,12 +44,18 @@ //TODO : Validate FP input with VP output. void Map_Fragment_Program(r700_AssemblerBase *pAsm, - struct gl_fragment_program *mesa_fp) + struct gl_fragment_program *mesa_fp, + GLcontext *ctx) { unsigned int unBit; unsigned int i; GLuint ui; + /* match fp inputs with vp exports. */ + struct r700_vertex_program_cont *vpc = + (struct r700_vertex_program_cont *)ctx->VertexProgram._Current; + GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten; + pAsm->number_used_registers = 0; //Input mapping : mesa_fp->Base.InputsRead set the flag, set in @@ -61,32 +67,93 @@ void Map_Fragment_Program(r700_AssemblerBase *pAsm, pAsm->uiFP_AttributeMap[FRAG_ATTRIB_WPOS] = pAsm->number_used_registers++; } - unBit = 1 << FRAG_ATTRIB_COL0; - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << VERT_RESULT_COL0; + if(OutputsWritten & unBit) { pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0] = pAsm->number_used_registers++; } - unBit = 1 << FRAG_ATTRIB_COL1; - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << VERT_RESULT_COL1; + if(OutputsWritten & unBit) { pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++; } - unBit = 1 << FRAG_ATTRIB_FOGC; - if(mesa_fp->Base.InputsRead & unBit) - { - pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++; - } + unBit = 1 << VERT_RESULT_FOGC; + if(OutputsWritten & unBit) + { + pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++; + } for(i=0; i<8; i++) { - unBit = 1 << (FRAG_ATTRIB_TEX0 + i); - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << (VERT_RESULT_TEX0 + i); + if(OutputsWritten & unBit) { pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i] = pAsm->number_used_registers++; } } + +/* order has been taken care of */ +#if 1 + for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++) + { + unBit = 1 << i; + if(OutputsWritten & unBit) + { + pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0] = pAsm->number_used_registers++; + } + } +#else + if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 ) + { + struct r700_vertex_program_cont *vpc = + (struct r700_vertex_program_cont *)ctx->VertexProgram._Current; + struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying; + struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying; + struct gl_program_parameter * pVsParam; + struct gl_program_parameter * pPsParam; + GLuint j, k; + GLuint unMaxVarying = 0; + + for(i=0; i<VsVarying->NumParameters; i++) + { + pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0; + } + + for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++) + { + unBit = 1 << i; + if(mesa_fp->Base.InputsRead & unBit) + { + j = i - FRAG_ATTRIB_VAR0; + pPsParam = PsVarying->Parameters + j; + + for(k=0; k<VsVarying->NumParameters; k++) + { + pVsParam = VsVarying->Parameters + k; + + if( strcmp(pPsParam->Name, pVsParam->Name) == 0) + { + pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k; + if(k > unMaxVarying) + { + unMaxVarying = k; + } + break; + } + } + } + } + + pAsm->number_used_registers += unMaxVarying + 1; + } +#endif + unBit = 1 << FRAG_ATTRIB_FACE; + if(mesa_fp->Base.InputsRead & unBit) + { + pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE] = pAsm->number_used_registers++; + } /* Map temporary registers (GPRs) */ pAsm->starting_temp_register_number = pAsm->number_used_registers; @@ -127,6 +194,8 @@ void Map_Fragment_Program(r700_AssemblerBase *pAsm, pAsm->pucOutMask[ui] = 0x0; } + pAsm->flag_reg_index = pAsm->number_used_registers++; + pAsm->uFirstHelpReg = pAsm->number_used_registers; } @@ -233,22 +302,35 @@ GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp, } GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp, - struct gl_fragment_program *mesa_fp) + struct gl_fragment_program *mesa_fp, + GLcontext *ctx) { GLuint number_of_colors_exported; GLboolean z_enabled = GL_FALSE; GLuint unBit; + int i; //Init_Program Init_r700_AssemblerBase( SPT_FP, &(fp->r700AsmCode), &(fp->r700Shader) ); - Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp); + Map_Fragment_Program(&(fp->r700AsmCode), mesa_fp, ctx); if( GL_FALSE == Find_Instruction_Dependencies_fp(fp, mesa_fp) ) { return GL_FALSE; } + + InitShaderProgram(&(fp->r700AsmCode)); - if( GL_FALSE == AssembleInstr(mesa_fp->Base.NumInstructions, + for(i=0; i < MAX_SAMPLERS; i++) + { + fp->r700AsmCode.SamplerUnits[i] = fp->mesa_program.Base.SamplerUnits[i]; + } + + fp->r700AsmCode.unCurNumILInsts = mesa_fp->Base.NumInstructions; + + if( GL_FALSE == AssembleInstr(0, + 0, + mesa_fp->Base.NumInstructions, &(mesa_fp->Base.Instructions[0]), &(fp->r700AsmCode)) ) { @@ -260,6 +342,11 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp, return GL_FALSE; } + if( GL_FALSE == RelocProgram(&(fp->r700AsmCode), &(mesa_fp->Base)) ) + { + return GL_FALSE; + } + fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0 : (fp->r700AsmCode.number_used_registers - 1); @@ -300,7 +387,7 @@ void r700SelectFragmentShader(GLcontext *ctx) } if (GL_FALSE == fp->translated) - r700TranslateFragmentShader(fp, &(fp->mesa_program)); + r700TranslateFragmentShader(fp, &(fp->mesa_program), ctx); } void * r700GetActiveFpShaderBo(GLcontext * ctx) @@ -378,6 +465,20 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) CLEARbit(r700->SPI_INPUT_Z.u32All, PROVIDE_Z_TO_SPI_bit); } + if (mesa_fp->Base.InputsRead & (1 << FRAG_ATTRIB_FACE)) + { + ui += 1; + SETfield(r700->SPI_PS_IN_CONTROL_0.u32All, ui, NUM_INTERP_shift, NUM_INTERP_mask); + SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit); + SETbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ALL_BITS_bit); + SETfield(r700->SPI_PS_IN_CONTROL_1.u32All, pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE], FRONT_FACE_ADDR_shift, FRONT_FACE_ADDR_mask); + } + else + { + CLEARbit(r700->SPI_PS_IN_CONTROL_1.u32All, FRONT_FACE_ENA_bit); + } + + ui = (unNumOfReg < ui) ? ui : unNumOfReg; SETfield(r700->ps.SQ_PGM_RESOURCES_PS.u32All, ui, NUM_GPRS_shift, NUM_GPRS_mask); @@ -394,6 +495,9 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) EXPORT_MODE_shift, EXPORT_MODE_mask); // emit ps input map + struct r700_vertex_program_cont *vpc = + (struct r700_vertex_program_cont *)ctx->VertexProgram._Current; + GLbitfield OutputsWritten = vpc->mesa_program.Base.OutputsWritten; unBit = 1 << FRAG_ATTRIB_WPOS; if(mesa_fp->Base.InputsRead & unBit) { @@ -407,8 +511,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); } - unBit = 1 << FRAG_ATTRIB_COL0; - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << VERT_RESULT_COL0; + if(OutputsWritten & unBit) { ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL0]; SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); @@ -420,8 +524,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); } - unBit = 1 << FRAG_ATTRIB_COL1; - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << VERT_RESULT_COL1; + if(OutputsWritten & unBit) { ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1]; SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); @@ -433,8 +537,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); } - unBit = 1 << FRAG_ATTRIB_FOGC; - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << VERT_RESULT_FOGC; + if(OutputsWritten & unBit) { ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC]; SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); @@ -448,8 +552,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) for(i=0; i<8; i++) { - unBit = 1 << (FRAG_ATTRIB_TEX0 + i); - if(mesa_fp->Base.InputsRead & unBit) + unBit = 1 << (VERT_RESULT_TEX0 + i); + if(OutputsWritten & unBit) { ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_TEX0 + i]; SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); @@ -459,6 +563,35 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) } } + unBit = 1 << FRAG_ATTRIB_FACE; + if(mesa_fp->Base.InputsRead & unBit) + { + ui = pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FACE]; + SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); + SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui, + SEMANTIC_shift, SEMANTIC_mask); + if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit) + SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); + else + CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); + } + + for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++) + { + unBit = 1 << i; + if(OutputsWritten & unBit) + { + ui = pAsm->uiFP_AttributeMap[i-VERT_RESULT_VAR0+FRAG_ATTRIB_VAR0]; + SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); + SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui, + SEMANTIC_shift, SEMANTIC_mask); + if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit) + SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); + else + CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); + } + } + exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift); if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1)) { @@ -469,7 +602,8 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) /* sent out shader constants. */ paramList = fp->mesa_program.Base.Parameters; - if(NULL != paramList) { + if(NULL != paramList) + { _mesa_load_state_parameters(ctx, paramList); if (paramList->NumParameters > R700_MAX_DX9_CONSTS) @@ -482,14 +616,33 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx) unNumParamData = paramList->NumParameters; for(ui=0; ui<unNumParamData; ui++) { - r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0]; - r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1]; - r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2]; - r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3]; + r700->ps.consts[ui][0].f32All = paramList->ParameterValues[ui][0]; + r700->ps.consts[ui][1].f32All = paramList->ParameterValues[ui][1]; + r700->ps.consts[ui][2].f32All = paramList->ParameterValues[ui][2]; + r700->ps.consts[ui][3].f32All = paramList->ParameterValues[ui][3]; } } else r700->ps.num_consts = 0; + COMPILED_SUB * pCompiledSub; + GLuint uj; + GLuint unConstOffset = r700->ps.num_consts; + for(ui=0; ui<pAsm->unNumPresub; ui++) + { + pCompiledSub = pAsm->presubs[ui].pCompiledSub; + + r700->ps.num_consts += pCompiledSub->NumParameters; + + for(uj=0; uj<pCompiledSub->NumParameters; uj++) + { + r700->ps.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0]; + r700->ps.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1]; + r700->ps.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2]; + r700->ps.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3]; + } + unConstOffset += pCompiledSub->NumParameters; + } + return GL_TRUE; } diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.h b/src/mesa/drivers/dri/r600/r700_fragprog.h index cbb108d212..e562bfa478 100644 --- a/src/mesa/drivers/dri/r600/r700_fragprog.h +++ b/src/mesa/drivers/dri/r600/r700_fragprog.h @@ -49,12 +49,14 @@ struct r700_fragment_program /* Internal */ void Map_Fragment_Program(r700_AssemblerBase *pAsm, - struct gl_fragment_program *mesa_fp); + struct gl_fragment_program *mesa_fp, + GLcontext *ctx); GLboolean Find_Instruction_Dependencies_fp(struct r700_fragment_program *fp, struct gl_fragment_program *mesa_fp); GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp, - struct gl_fragment_program *mesa_vp); + struct gl_fragment_program *mesa_vp, + GLcontext *ctx); /* Interface */ extern void r700SelectFragmentShader(GLcontext *ctx); diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c index 47f89c91f8..eab27cbd84 100644 --- a/src/mesa/drivers/dri/r600/r700_render.c +++ b/src/mesa/drivers/dri/r600/r700_render.c @@ -526,6 +526,9 @@ static void r700ConvertAttrib(GLcontext *ctx, int count, radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset, sizeof(GLfloat) * input->Size * count, 32); + + radeon_bo_map(attr->bo, 1); + dst_ptr = (GLfloat *)ADD_POINTERS(attr->bo->ptr, attr->bo_offset); assert(src_ptr != NULL); @@ -559,6 +562,8 @@ static void r700ConvertAttrib(GLcontext *ctx, int count, break; } + radeon_bo_unmap(attr->bo); + if (mapped_named_bo) { ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj); @@ -577,6 +582,8 @@ static void r700AlignDataToDword(GLcontext *ctx, radeonAllocDmaRegion(&context->radeon, &attr->bo, &attr->bo_offset, size, 32); + radeon_bo_map(attr->bo, 1); + if (!input->BufferObj->Pointer) { ctx->Driver.MapBuffer(ctx, GL_ARRAY_BUFFER, GL_READ_ONLY_ARB, input->BufferObj); @@ -596,6 +603,7 @@ static void r700AlignDataToDword(GLcontext *ctx, } } + radeon_bo_unmap(attr->bo); if (mapped_named_bo) { ctx->Driver.UnmapBuffer(ctx, GL_ARRAY_BUFFER, input->BufferObj); @@ -664,14 +672,18 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input radeonAllocDmaRegion(&context->radeon, &context->stream_desc[index].bo, &context->stream_desc[index].bo_offset, size, 32); + + radeon_bo_map(context->stream_desc[index].bo, 1); assert(context->stream_desc[index].bo->ptr != NULL); + + dst = (uint32_t *)ADD_POINTERS(context->stream_desc[index].bo->ptr, context->stream_desc[index].bo_offset); switch (context->stream_desc[index].dwords) { case 1: - radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count); + radeonEmitVec4(dst, input[i]->Ptr, input[i]->StrideB, local_count); break; case 2: radeonEmitVec8(dst, input[i]->Ptr, input[i]->StrideB, local_count); @@ -686,6 +698,7 @@ static void r700SetupStreams(GLcontext *ctx, const struct gl_client_array *input assert(0); break; } + radeon_bo_unmap(context->stream_desc[index].bo); } } @@ -757,6 +770,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo, &context->ind_buf.bo_offset, size, 4); + radeon_bo_map(context->ind_buf.bo, 1); assert(context->ind_buf.bo->ptr != NULL); out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset); @@ -770,6 +784,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer *out++ = in[i]; } + radeon_bo_unmap(context->ind_buf.bo); #if MESA_BIG_ENDIAN } else @@ -780,6 +795,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo, &context->ind_buf.bo_offset, size, 4); + radeon_bo_map(context->ind_buf.bo, 1); assert(context->ind_buf.bo->ptr != NULL); out = (GLuint *)ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset); @@ -792,6 +808,7 @@ static void r700FixupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer { *out++ = in[i]; } + radeon_bo_unmap(context->ind_buf.bo); #endif } @@ -837,11 +854,13 @@ static void r700SetupIndexBuffer(GLcontext *ctx, const struct _mesa_index_buffer radeonAllocDmaRegion(&context->radeon, &context->ind_buf.bo, &context->ind_buf.bo_offset, size, 4); + radeon_bo_map(context->ind_buf.bo, 1); assert(context->ind_buf.bo->ptr != NULL); dst_ptr = ADD_POINTERS(context->ind_buf.bo->ptr, context->ind_buf.bo_offset); _mesa_memcpy(dst_ptr, src_ptr, size); + radeon_bo_unmap(context->ind_buf.bo); context->ind_buf.is_32bit = (mesa_ind_buf->type == GL_UNSIGNED_INT); context->ind_buf.count = mesa_ind_buf->count; diff --git a/src/mesa/drivers/dri/r600/r700_shader.c b/src/mesa/drivers/dri/r600/r700_shader.c index 955ea4e4e1..2eed1acc2f 100644 --- a/src/mesa/drivers/dri/r600/r700_shader.c +++ b/src/mesa/drivers/dri/r600/r700_shader.c @@ -159,13 +159,18 @@ void Init_R700_Shader(R700_Shader * pShader) pShader->lstVTXInstructions.uNumOfNode=0; } +void SetActiveCFlist(R700_Shader *pShader, TypedShaderList * plstCF) +{ + pShader->plstCFInstructions_active = plstCF; +} + void AddCFInstruction(R700_Shader *pShader, R700ControlFlowInstruction *pCFInst) { R700ControlFlowSXClause* pSXClause; R700ControlFlowSMXClause* pSMXClause; - pCFInst->m_uIndex = pShader->lstCFInstructions.uNumOfNode; - AddInstToList(&(pShader->lstCFInstructions), + pCFInst->m_uIndex = pShader->plstCFInstructions_active->uNumOfNode; + AddInstToList(pShader->plstCFInstructions_active, (R700ShaderInstruction*)pCFInst); pShader->uShaderBinaryDWORDSize += GetInstructionSize(pCFInst->m_ShaderInstType); diff --git a/src/mesa/drivers/dri/r600/r700_shader.h b/src/mesa/drivers/dri/r600/r700_shader.h index c6a058617e..0599ffd901 100644 --- a/src/mesa/drivers/dri/r600/r700_shader.h +++ b/src/mesa/drivers/dri/r600/r700_shader.h @@ -109,6 +109,7 @@ typedef struct R700_Shader GLuint uStackSize; GLuint uMaxCallDepth; + TypedShaderList * plstCFInstructions_active; TypedShaderList lstCFInstructions; TypedShaderList lstALUInstructions; TypedShaderList lstTEXInstructions; @@ -132,13 +133,13 @@ void TakeInstOutFromList(TypedShaderList * plstCFInstructions, R700ShaderInstruc void ResolveLinks(R700_Shader *pShader); void Assemble(R700_Shader *pShader); - //Interface void Init_R700_Shader(R700_Shader * pShader); void AddCFInstruction(R700_Shader *pShader, R700ControlFlowInstruction *pCFInst); void AddVTXInstruction(R700_Shader *pShader, R700VertexInstruction *pVTXInst); void AddTEXInstruction(R700_Shader *pShader, R700TextureInstruction *pTEXInst); void AddALUInstruction(R700_Shader *pShader, R700ALUInstruction *pALUInst); +void SetActiveCFlist(R700_Shader *pShader, TypedShaderList * plstCF); void LoadProgram(R700_Shader *pShader); void UpdateShaderRegisters(R700_Shader *pShader); diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c index ffc6068bd8..90fac078ff 100644 --- a/src/mesa/drivers/dri/r600/r700_vertprog.c +++ b/src/mesa/drivers/dri/r600/r700_vertprog.c @@ -111,6 +111,15 @@ unsigned int Map_Vertex_Output(r700_AssemblerBase *pAsm, } } + for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++) + { + unBit = 1 << i; + if(mesa_vp->Base.OutputsWritten & unBit) + { + pAsm->ucVP_OutputMap[i] = unTotal++; + } + } + return (unTotal - unStart); } @@ -235,6 +244,8 @@ void Map_Vertex_Program(GLcontext *ctx, pAsm->number_used_registers += mesa_vp->Base.NumTemporaries; } + pAsm->flag_reg_index = pAsm->number_used_registers++; + pAsm->uFirstHelpReg = pAsm->number_used_registers; } @@ -324,7 +335,18 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx, return NULL; } - if(GL_FALSE == AssembleInstr(vp->mesa_program->Base.NumInstructions, + InitShaderProgram(&(vp->r700AsmCode)); + + for(i=0; i < MAX_SAMPLERS; i++) + { + vp->r700AsmCode.SamplerUnits[i] = vp->mesa_program->Base.SamplerUnits[i]; + } + + vp->r700AsmCode.unCurNumILInsts = vp->mesa_program->Base.NumInstructions; + + if(GL_FALSE == AssembleInstr(0, + 0, + vp->mesa_program->Base.NumInstructions, &(vp->mesa_program->Base.Instructions[0]), &(vp->r700AsmCode)) ) { @@ -336,6 +358,11 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx, return NULL; } + if( GL_FALSE == RelocProgram(&(vp->r700AsmCode), &(vp->mesa_program->Base)) ) + { + return GL_FALSE; + } + vp->r700Shader.nRegs = (vp->r700AsmCode.number_used_registers == 0) ? 0 : (vp->r700AsmCode.number_used_registers - 1); @@ -612,6 +639,12 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx) paramList = vp->mesa_program->Base.Parameters; if(NULL != paramList) { + /* vp->mesa_program was cloned, not updated by glsl shader api. */ + /* _mesa_reference_program has already checked glsl shProg is ok and set ctx->VertexProgem._Current */ + /* so, use ctx->VertexProgem._Current */ + struct gl_program_parameter_list *paramListOrginal = + paramListOrginal = ctx->VertexProgram._Current->Base.Parameters; + _mesa_load_state_parameters(ctx, paramList); if (paramList->NumParameters > R700_MAX_DX9_CONSTS) @@ -624,13 +657,42 @@ GLboolean r700SetupVertexProgram(GLcontext * ctx) unNumParamData = paramList->NumParameters; for(ui=0; ui<unNumParamData; ui++) { - r700->vs.consts[ui][0].f32All = paramList->ParameterValues[ui][0]; - r700->vs.consts[ui][1].f32All = paramList->ParameterValues[ui][1]; - r700->vs.consts[ui][2].f32All = paramList->ParameterValues[ui][2]; - r700->vs.consts[ui][3].f32All = paramList->ParameterValues[ui][3]; + if(paramList->Parameters[ui].Type == PROGRAM_UNIFORM) + { + r700->vs.consts[ui][0].f32All = paramListOrginal->ParameterValues[ui][0]; + r700->vs.consts[ui][1].f32All = paramListOrginal->ParameterValues[ui][1]; + r700->vs.consts[ui][2].f32All = paramListOrginal->ParameterValues[ui][2]; + r700->vs.consts[ui][3].f32All = paramListOrginal->ParameterValues[ui][3]; + } + else + { + r700->vs.consts[ui][0].f32All = paramList->ParameterValues[ui][0]; + r700->vs.consts[ui][1].f32All = paramList->ParameterValues[ui][1]; + r700->vs.consts[ui][2].f32All = paramList->ParameterValues[ui][2]; + r700->vs.consts[ui][3].f32All = paramList->ParameterValues[ui][3]; + } } } else r700->vs.num_consts = 0; + COMPILED_SUB * pCompiledSub; + GLuint uj; + GLuint unConstOffset = r700->vs.num_consts; + for(ui=0; ui<vp->r700AsmCode.unNumPresub; ui++) + { + pCompiledSub = vp->r700AsmCode.presubs[ui].pCompiledSub; + + r700->vs.num_consts += pCompiledSub->NumParameters; + + for(uj=0; uj<pCompiledSub->NumParameters; uj++) + { + r700->vs.consts[uj + unConstOffset][0].f32All = pCompiledSub->ParameterValues[uj][0]; + r700->vs.consts[uj + unConstOffset][1].f32All = pCompiledSub->ParameterValues[uj][1]; + r700->vs.consts[uj + unConstOffset][2].f32All = pCompiledSub->ParameterValues[uj][2]; + r700->vs.consts[uj + unConstOffset][3].f32All = pCompiledSub->ParameterValues[uj][3]; + } + unConstOffset += pCompiledSub->NumParameters; + } + return GL_TRUE; } diff --git a/src/mesa/drivers/dri/radeon/radeon_common.c b/src/mesa/drivers/dri/radeon/radeon_common.c index 9b64c21685..51fa618937 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common.c +++ b/src/mesa/drivers/dri/radeon/radeon_common.c @@ -817,7 +817,7 @@ void radeonDrawBuffer( GLcontext *ctx, GLenum mode ) */ if (!was_front_buffer_rendering && radeon->is_front_buffer_rendering) { radeon_update_renderbuffers(radeon->dri.context, - radeon->dri.context->driDrawablePriv); + radeon->dri.context->driDrawablePriv, GL_FALSE); } } @@ -834,7 +834,7 @@ void radeonReadBuffer( GLcontext *ctx, GLenum mode ) if (!was_front_buffer_reading && rmesa->is_front_buffer_reading) { radeon_update_renderbuffers(rmesa->dri.context, - rmesa->dri.context->driReadablePriv); + rmesa->dri.context->driReadablePriv, GL_FALSE); } } /* nothing, until we implement h/w glRead/CopyPixels or CopyTexImage */ @@ -885,9 +885,9 @@ void radeon_viewport(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei he if (radeon->is_front_buffer_rendering) { ctx->Driver.Flush(ctx); } - radeon_update_renderbuffers(driContext, driContext->driDrawablePriv); + radeon_update_renderbuffers(driContext, driContext->driDrawablePriv, GL_FALSE); if (driContext->driDrawablePriv != driContext->driReadablePriv) - radeon_update_renderbuffers(driContext, driContext->driReadablePriv); + radeon_update_renderbuffers(driContext, driContext->driReadablePriv, GL_FALSE); } old_viewport = ctx->Driver.Viewport; diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 71f70d724b..5c68bf5df6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -499,7 +499,8 @@ radeon_bits_per_pixel(const struct radeon_renderbuffer *rb) } void -radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) +radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable, + GLboolean front_only) { unsigned int attachments[10]; __DRIbuffer *buffers = NULL; @@ -525,7 +526,7 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) struct radeon_renderbuffer *stencil_rb; i = 0; - if ((radeon->is_front_buffer_rendering || + if ((front_only || radeon->is_front_buffer_rendering || radeon->is_front_buffer_reading || !draw->color_rb[1]) && draw->color_rb[0]) { @@ -533,23 +534,25 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) attachments[i++] = radeon_bits_per_pixel(draw->color_rb[0]); } - if (draw->color_rb[1]) { - attachments[i++] = __DRI_BUFFER_BACK_LEFT; - attachments[i++] = radeon_bits_per_pixel(draw->color_rb[1]); - } + if (!front_only) { + if (draw->color_rb[1]) { + attachments[i++] = __DRI_BUFFER_BACK_LEFT; + attachments[i++] = radeon_bits_per_pixel(draw->color_rb[1]); + } - depth_rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH); - stencil_rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL); - - if ((depth_rb != NULL) && (stencil_rb != NULL)) { - attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL; - attachments[i++] = radeon_bits_per_pixel(depth_rb); - } else if (depth_rb != NULL) { - attachments[i++] = __DRI_BUFFER_DEPTH; - attachments[i++] = radeon_bits_per_pixel(depth_rb); - } else if (stencil_rb != NULL) { - attachments[i++] = __DRI_BUFFER_STENCIL; - attachments[i++] = radeon_bits_per_pixel(stencil_rb); + depth_rb = radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH); + stencil_rb = radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL); + + if ((depth_rb != NULL) && (stencil_rb != NULL)) { + attachments[i++] = __DRI_BUFFER_DEPTH_STENCIL; + attachments[i++] = radeon_bits_per_pixel(depth_rb); + } else if (depth_rb != NULL) { + attachments[i++] = __DRI_BUFFER_DEPTH; + attachments[i++] = radeon_bits_per_pixel(depth_rb); + } else if (stencil_rb != NULL) { + attachments[i++] = __DRI_BUFFER_STENCIL; + attachments[i++] = radeon_bits_per_pixel(stencil_rb); + } } buffers = (*screen->dri2.loader->getBuffersWithFormat)(drawable, @@ -562,12 +565,14 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable) i = 0; if (draw->color_rb[0]) attachments[i++] = __DRI_BUFFER_FRONT_LEFT; - if (draw->color_rb[1]) - attachments[i++] = __DRI_BUFFER_BACK_LEFT; - if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH)) - attachments[i++] = __DRI_BUFFER_DEPTH; - if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL)) - attachments[i++] = __DRI_BUFFER_STENCIL; + if (!front_only) { + if (draw->color_rb[1]) + attachments[i++] = __DRI_BUFFER_BACK_LEFT; + if (radeon_get_renderbuffer(&draw->base, BUFFER_DEPTH)) + attachments[i++] = __DRI_BUFFER_DEPTH; + if (radeon_get_renderbuffer(&draw->base, BUFFER_STENCIL)) + attachments[i++] = __DRI_BUFFER_STENCIL; + } buffers = (*screen->dri2.loader->getBuffers)(drawable, &drawable->w, @@ -735,9 +740,9 @@ GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, readfb = driReadPriv->driverPrivate; if (driContextPriv->driScreenPriv->dri2.enabled) { - radeon_update_renderbuffers(driContextPriv, driDrawPriv); + radeon_update_renderbuffers(driContextPriv, driDrawPriv, GL_FALSE); if (driDrawPriv != driReadPriv) - radeon_update_renderbuffers(driContextPriv, driReadPriv); + radeon_update_renderbuffers(driContextPriv, driReadPriv, GL_FALSE); _mesa_reference_renderbuffer(&radeon->state.color.rb, &(radeon_get_renderbuffer(&drfb->base, BUFFER_BACK_LEFT)->base)); _mesa_reference_renderbuffer(&radeon->state.depth.rb, diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index ded81fff29..49a9ec5610 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -328,6 +328,7 @@ struct radeon_swtcl_info { GLuint vertex_attr_count; GLuint emit_prediction; + struct radeon_bo *bo; }; #define RADEON_MAX_AOS_ARRAYS 16 @@ -588,7 +589,8 @@ GLboolean radeonInitContext(radeonContextPtr radeon, void radeonCleanupContext(radeonContextPtr radeon); GLboolean radeonUnbindContext(__DRIcontextPrivate * driContextPriv); -void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable); +void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable, + GLboolean front_only); GLboolean radeonMakeCurrent(__DRIcontextPrivate * driContextPriv, __DRIdrawablePrivate * driDrawPriv, __DRIdrawablePrivate * driReadPriv); diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c index c9a32c808b..b8c65f4ce6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_dma.c +++ b/src/mesa/drivers/dri/radeon/radeon_dma.c @@ -151,6 +151,7 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos, aos->components = size; aos->count = count; + radeon_bo_map(aos->bo, 1); out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); switch (size) { case 1: radeonEmitVec4(out, data, stride, count); break; @@ -161,6 +162,7 @@ void rcommon_emit_vector(GLcontext * ctx, struct radeon_aos *aos, assert(0); break; } + radeon_bo_unmap(aos->bo); } void radeon_init_dma(radeonContextPtr rmesa) @@ -183,10 +185,6 @@ void radeonRefillCurrentDmaRegion(radeonContextPtr rmesa, int size) __FUNCTION__, size, rmesa->dma.minimum_size); - /* unmap old reserved bo */ - if (!is_empty_list(&rmesa->dma.reserved)) - radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo); - if (is_empty_list(&rmesa->dma.free) || last_elem(&rmesa->dma.free)->bo->size < size) { dma_bo = CALLOC_STRUCT(radeon_dma_bo); @@ -224,8 +222,6 @@ again_alloc: /* Cmd buff have been flushed in radeon_revalidate_bos */ goto again_alloc; } - - radeon_bo_map(first_elem(&rmesa->dma.reserved)->bo, 1); } /* Allocates a region from rmesa->dma.current. If there isn't enough @@ -282,7 +278,6 @@ void radeonFreeDmaRegions(radeonContextPtr rmesa) foreach_s(dma_bo, temp, &rmesa->dma.reserved) { remove_from_list(dma_bo); - radeon_bo_unmap(dma_bo->bo); radeon_bo_unref(dma_bo->bo); FREE(dma_bo); } @@ -362,9 +357,6 @@ void radeonReleaseDmaRegions(radeonContextPtr rmesa) insert_at_tail(&rmesa->dma.free, dma_bo); } - /* unmap the last dma region */ - if (!is_empty_list(&rmesa->dma.reserved)) - radeon_bo_unmap(first_elem(&rmesa->dma.reserved)->bo); /* move reserved to wait list */ foreach_s(dma_bo, temp, &rmesa->dma.reserved) { /* free objects that are too small to be used because of large request */ @@ -398,11 +390,12 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx ) radeonContextPtr rmesa = RADEON_CONTEXT(ctx); struct radeon_dma *dma = &rmesa->dma; - if (RADEON_DEBUG & RADEON_IOCTL) fprintf(stderr, "%s\n", __FUNCTION__); dma->flush = NULL; + radeon_bo_unmap(rmesa->swtcl.bo); + if (!is_empty_list(&dma->reserved)) { GLuint current_offset = dma->current_used; @@ -417,6 +410,8 @@ void rcommon_flush_last_swtcl_prim( GLcontext *ctx ) } rmesa->swtcl.numverts = 0; } + radeon_bo_unref(rmesa->swtcl.bo); + rmesa->swtcl.bo = NULL; } /* Alloc space in the current dma region. */ @@ -427,6 +422,7 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) void *head; if (RADEON_DEBUG & RADEON_IOCTL) fprintf(stderr, "%s\n", __FUNCTION__); + if(is_empty_list(&rmesa->dma.reserved) ||rmesa->dma.current_vertexptr + bytes > first_elem(&rmesa->dma.reserved)->bo->size) { if (rmesa->dma.flush) { @@ -450,7 +446,13 @@ rcommonAllocDmaLowVerts( radeonContextPtr rmesa, int nverts, int vsize ) rmesa->swtcl.numverts * rmesa->swtcl.vertex_size * 4 == rmesa->dma.current_vertexptr ); - head = (first_elem(&rmesa->dma.reserved)->bo->ptr + rmesa->dma.current_vertexptr); + if (!rmesa->swtcl.bo) { + rmesa->swtcl.bo = first_elem(&rmesa->dma.reserved)->bo; + radeon_bo_ref(rmesa->swtcl.bo); + radeon_bo_map(rmesa->swtcl.bo, 1); + } + + head = (rmesa->swtcl.bo->ptr + rmesa->dma.current_vertexptr); rmesa->dma.current_vertexptr += bytes; rmesa->swtcl.numverts += nverts; return head; diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c index 08e1c5d00d..d810e6080e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c +++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c @@ -76,12 +76,14 @@ static void emit_vecfog(GLcontext *ctx, struct radeon_aos *aos, /* Emit the data */ + radeon_bo_map(aos->bo, 1); out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); for (i = 0; i < count; i++) { out[0] = radeonComputeFogBlendFactor( ctx, *(GLfloat *)data ); out++; data += stride; } + radeon_bo_unmap(aos->bo); } static void emit_s0_vec(uint32_t *out, GLvoid *data, int stride, int count) @@ -151,6 +153,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos, /* Emit the data */ + radeon_bo_map(aos->bo, 1); out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); switch (size) { case 1: @@ -170,6 +173,7 @@ static void emit_tex_vector(GLcontext *ctx, struct radeon_aos *aos, exit(1); break; } + radeon_bo_unmap(aos->bo); } @@ -196,12 +200,12 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (!rmesa->tcl.obj.buf) rcommon_emit_vector( ctx, &(rmesa->tcl.aos[nr]), - (char *)VB->ObjPtr->data, - VB->ObjPtr->size, - VB->ObjPtr->stride, + (char *)VB->AttribPtr[_TNL_ATTRIB_POS]->data, + VB->AttribPtr[_TNL_ATTRIB_POS]->size, + VB->AttribPtr[_TNL_ATTRIB_POS]->stride, count); - switch( VB->ObjPtr->size ) { + switch( VB->AttribPtr[_TNL_ATTRIB_POS]->size ) { case 4: vfmt |= RADEON_CP_VC_FRMT_W0; case 3: vfmt |= RADEON_CP_VC_FRMT_Z; case 2: vfmt |= RADEON_CP_VC_FRMT_XY; @@ -216,9 +220,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (!rmesa->tcl.norm.buf) rcommon_emit_vector( ctx, &(rmesa->tcl.aos[nr]), - (char *)VB->NormalPtr->data, + (char *)VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data, 3, - VB->NormalPtr->stride, + VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride, count); vfmt |= RADEON_CP_VC_FRMT_N0; @@ -227,9 +231,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (inputs & VERT_BIT_COLOR0) { int emitsize; - if (VB->ColorPtr[0]->size == 4 && - (VB->ColorPtr[0]->stride != 0 || - VB->ColorPtr[0]->data[0][3] != 1.0)) { + if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size == 4 && + (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0 || + VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data[0][3] != 1.0)) { vfmt |= RADEON_CP_VC_FRMT_FPCOLOR | RADEON_CP_VC_FRMT_FPALPHA; emitsize = 4; } @@ -242,9 +246,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (!rmesa->tcl.rgba.buf) rcommon_emit_vector( ctx, &(rmesa->tcl.aos[nr]), - (char *)VB->ColorPtr[0]->data, + (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data, emitsize, - VB->ColorPtr[0]->stride, + VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride, count); nr++; @@ -256,9 +260,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) rcommon_emit_vector( ctx, &(rmesa->tcl.aos[nr]), - (char *)VB->SecondaryColorPtr[0]->data, + (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data, 3, - VB->SecondaryColorPtr[0]->stride, + VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride, count); } @@ -273,8 +277,8 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (!rmesa->tcl.fog.buf) emit_vecfog( ctx, &(rmesa->tcl.aos[nr]), - (char *)VB->FogCoordPtr->data, - VB->FogCoordPtr->stride, + (char *)VB->AttribPtr[_TNL_ATTRIB_FOG]->data, + VB->AttribPtr[_TNL_ATTRIB_FOG]->stride, count); vfmt |= RADEON_CP_VC_FRMT_FPFOG; @@ -290,24 +294,24 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (!rmesa->tcl.tex[unit].buf) emit_tex_vector( ctx, &(rmesa->tcl.aos[nr]), - (char *)VB->TexCoordPtr[unit]->data, - VB->TexCoordPtr[unit]->size, - VB->TexCoordPtr[unit]->stride, + (char *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->data, + VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size, + VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->stride, count ); nr++; vfmt |= RADEON_ST_BIT(unit); /* assume we need the 3rd coord if texgen is active for r/q OR at least 3 coords are submitted. This may not be 100% correct */ - if (VB->TexCoordPtr[unit]->size >= 3) { + if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) { vtx |= RADEON_Q_BIT(unit); vfmt |= RADEON_Q_BIT(unit); } if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) ) vtx |= RADEON_Q_BIT(unit); - else if ((VB->TexCoordPtr[unit]->size >= 3) && + else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) && ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) { - GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3); + GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3); if (((rmesa->NeedTexMatrix >> unit) & 1) && (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1))) radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ; diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h index 515783135d..d764ccb982 100644 --- a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h +++ b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h @@ -56,18 +56,18 @@ static void TAG(emit)( GLcontext *ctx, radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s\n", __FUNCTION__); - coord = (GLuint (*)[4])VB->ObjPtr->data; - coord_stride = VB->ObjPtr->stride; + coord = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_POS]->data; + coord_stride = VB->AttribPtr[_TNL_ATTRIB_POS]->stride; if (DO_TEX2) { - if (VB->TexCoordPtr[2]) { + if (VB->AttribPtr[_TNL_ATTRIB_TEX2]) { const GLuint t2 = GET_TEXSOURCE(2); - tc2 = (GLuint (*)[4])VB->TexCoordPtr[t2]->data; - tc2_stride = VB->TexCoordPtr[t2]->stride; - if (DO_PTEX && VB->TexCoordPtr[t2]->size < 3) { + tc2 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; + tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride; + if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 3) { fill_tex |= (1<<2); } - else if (DO_PTEX && VB->TexCoordPtr[t2]->size < 4) { + else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 4) { rqcoordsnoswap |= (1<<2); } } else { @@ -77,14 +77,14 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_TEX1) { - if (VB->TexCoordPtr[1]) { + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) { const GLuint t1 = GET_TEXSOURCE(1); - tc1 = (GLuint (*)[4])VB->TexCoordPtr[t1]->data; - tc1_stride = VB->TexCoordPtr[t1]->stride; - if (DO_PTEX && VB->TexCoordPtr[t1]->size < 3) { + tc1 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; + tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride; + if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 3) { fill_tex |= (1<<1); } - else if (DO_PTEX && VB->TexCoordPtr[t1]->size < 4) { + else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 4) { rqcoordsnoswap |= (1<<1); } } else { @@ -94,14 +94,14 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_TEX0) { - if (VB->TexCoordPtr[0]) { + if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { const GLuint t0 = GET_TEXSOURCE(0); - tc0_stride = VB->TexCoordPtr[t0]->stride; - tc0 = (GLuint (*)[4])VB->TexCoordPtr[t0]->data; - if (DO_PTEX && VB->TexCoordPtr[t0]->size < 3) { + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; + tc0 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data; + if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 3) { fill_tex |= (1<<0); } - else if (DO_PTEX && VB->TexCoordPtr[t0]->size < 4) { + else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 4) { rqcoordsnoswap |= (1<<0); } } else { @@ -112,9 +112,9 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_NORM) { - if (VB->NormalPtr) { - norm_stride = VB->NormalPtr->stride; - norm = (GLuint (*)[4])VB->NormalPtr->data; + if (VB->AttribPtr[_TNL_ATTRIB_NORMAL]) { + norm_stride = VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride; + norm = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data; } else { norm_stride = 0; norm = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_NORMAL]; @@ -122,9 +122,9 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_RGBA) { - if (VB->ColorPtr[0]) { - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; + if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]) { + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; } else { col = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR0]; col_stride = 0; @@ -132,9 +132,9 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_SPEC_OR_FOG) { - if (VB->SecondaryColorPtr[0]) { - spec = VB->SecondaryColorPtr[0]->data; - spec_stride = VB->SecondaryColorPtr[0]->stride; + if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { + spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; + spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride; } else { spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1]; spec_stride = 0; @@ -142,9 +142,9 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_SPEC_OR_FOG) { - if (VB->FogCoordPtr) { - fog = VB->FogCoordPtr->data; - fog_stride = VB->FogCoordPtr->stride; + if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { + fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; + fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride; } else { fog = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_FOG]; fog_stride = 0; diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c index 78ec119302..98f96ff2a7 100644 --- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c +++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c @@ -326,7 +326,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) if (1) { req |= RADEON_CP_VC_FRMT_Z; - if (VB->ObjPtr->size == 4) { + if (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 4) { req |= RADEON_CP_VC_FRMT_W0; } } @@ -348,15 +348,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) req |= RADEON_ST_BIT(unit); /* assume we need the 3rd coord if texgen is active for r/q OR at least 3 coords are submitted. This may not be 100% correct */ - if (VB->TexCoordPtr[unit]->size >= 3) { + if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) { req |= RADEON_Q_BIT(unit); vtx |= RADEON_Q_BIT(unit); } if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) ) vtx |= RADEON_Q_BIT(unit); - else if ((VB->TexCoordPtr[unit]->size >= 3) && + else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) && ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) { - GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3); + GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3); if (((rmesa->NeedTexMatrix >> unit) & 1) && (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1))) radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ; @@ -390,19 +390,19 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) * this, add more vertex code (for obj-2, obj-3) or preferably move * to maos. */ - if (VB->ObjPtr->size < 3 || - (VB->ObjPtr->size == 3 && + if (VB->AttribPtr[_TNL_ATTRIB_POS]->size < 3 || + (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 3 && (setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0))) { _math_trans_4f( rmesa->tcl.ObjClean.data, - VB->ObjPtr->data, - VB->ObjPtr->stride, + VB->AttribPtr[_TNL_ATTRIB_POS]->data, + VB->AttribPtr[_TNL_ATTRIB_POS]->stride, GL_FLOAT, - VB->ObjPtr->size, + VB->AttribPtr[_TNL_ATTRIB_POS]->size, 0, VB->Count ); - switch (VB->ObjPtr->size) { + switch (VB->AttribPtr[_TNL_ATTRIB_POS]->size) { case 1: _mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 1); case 2: @@ -416,14 +416,14 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs ) break; } - VB->ObjPtr = &rmesa->tcl.ObjClean; + VB->AttribPtr[_TNL_ATTRIB_POS] = &rmesa->tcl.ObjClean; } - + radeon_bo_map(rmesa->radeon.tcl.aos[0].bo, 1); setup_tab[i].emit( ctx, 0, VB->Count, rmesa->radeon.tcl.aos[0].bo->ptr + rmesa->radeon.tcl.aos[0].offset); - + radeon_bo_unmap(rmesa->radeon.tcl.aos[0].bo); // rmesa->radeon.tcl.aos[0].size = setup_tab[i].vertex_size; rmesa->radeon.tcl.aos[0].stride = setup_tab[i].vertex_size; rmesa->tcl.vertex_format = setup_tab[i].vertex_format; diff --git a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c index 91f0db958b..a7f347202a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c +++ b/src/mesa/drivers/dri/radeon/radeon_mipmap_tree.c @@ -68,6 +68,19 @@ static unsigned get_compressed_image_size( return rowStride * ((height + blockHeight - 1) / blockHeight); } +static int find_next_power_of_two(GLuint value) +{ + int i, tmp; + + i = 0; + tmp = value - 1; + while (tmp) { + tmp >>= 1; + i++; + } + return (1 << i); +} + /** * Compute sizes and fill in offset and blit information for the given * image (determined by \p face and \p level). @@ -80,25 +93,28 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree { radeon_mipmap_level *lvl = &mt->levels[level]; uint32_t row_align; + GLuint height; + + height = find_next_power_of_two(lvl->height); /* Find image size in bytes */ if (_mesa_is_format_compressed(mt->mesaFormat)) { lvl->rowstride = get_aligned_compressed_row_stride(mt->mesaFormat, lvl->width, rmesa->texture_compressed_row_align); - lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, lvl->height); + lvl->size = get_compressed_image_size(mt->mesaFormat, lvl->rowstride, height); } else if (mt->target == GL_TEXTURE_RECTANGLE_NV) { row_align = rmesa->texture_rect_row_align - 1; lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align; - lvl->size = lvl->rowstride * lvl->height; + lvl->size = lvl->rowstride * height; } else if (mt->tilebits & RADEON_TXO_MICRO_TILE) { /* tile pattern is 16 bytes x2. mipmaps stay 32 byte aligned, * though the actual offset may be different (if texture is less than * 32 bytes width) to the untiled case */ lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) * 2 + 31) & ~31; - lvl->size = lvl->rowstride * ((lvl->height + 1) / 2) * lvl->depth; + lvl->size = lvl->rowstride * ((height + 1) / 2) * lvl->depth; } else { row_align = rmesa->texture_row_align - 1; lvl->rowstride = (_mesa_format_row_stride(mt->mesaFormat, lvl->width) + row_align) & ~row_align; - lvl->size = lvl->rowstride * lvl->height * lvl->depth; + lvl->size = lvl->rowstride * height * lvl->depth; } assert(lvl->size > 0); @@ -110,7 +126,7 @@ static void compute_tex_image_offset(radeonContextPtr rmesa, radeon_mipmap_tree if (RADEON_DEBUG & RADEON_TEXTURE) fprintf(stderr, "level %d, face %d: rs:%d %dx%d at %d\n", - level, face, lvl->rowstride, lvl->width, lvl->height, lvl->faces[face].offset); + level, face, lvl->rowstride, lvl->width, height, lvl->faces[face].offset); } static GLuint minify(GLuint size, GLuint levels) diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index e61f59eaea..8bf1bfbc57 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -179,7 +179,7 @@ static void radeonSetVertexFormat( GLcontext *ctx ) for (i = 0; i < ctx->Const.MaxTextureUnits; i++) { if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { - GLuint sz = VB->TexCoordPtr[i]->size; + GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size; switch (sz) { case 1: @@ -309,7 +309,7 @@ void r100_swtcl_flush(GLcontext *ctx, uint32_t current_offset) radeonEmitState(&rmesa->radeon); radeonEmitVertexAOS( rmesa, rmesa->radeon.swtcl.vertex_size, - first_elem(&rmesa->radeon.dma.reserved)->bo, + rmesa->radeon.swtcl.bo, current_offset); diff --git a/src/mesa/drivers/dri/radeon/radeon_texstate.c b/src/mesa/drivers/dri/radeon/radeon_texstate.c index 3cbe3b4725..84ddcfd4fd 100644 --- a/src/mesa/drivers/dri/radeon/radeon_texstate.c +++ b/src/mesa/drivers/dri/radeon/radeon_texstate.c @@ -672,24 +672,13 @@ void radeonSetTexBuffer2(__DRIcontext *pDRICtx, GLint target, GLint glx_texture_ return; } - radeon_update_renderbuffers(pDRICtx, dPriv); - /* back & depth buffer are useless free them right away */ - rb = (void*)rfb->base.Attachment[BUFFER_DEPTH].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } - rb = (void*)rfb->base.Attachment[BUFFER_BACK_LEFT].Renderbuffer; - if (rb && rb->bo) { - radeon_bo_unref(rb->bo); - rb->bo = NULL; - } + radeon_update_renderbuffers(pDRICtx, dPriv, GL_TRUE); rb = rfb->color_rb[0]; if (rb->bo == NULL) { /* Failed to BO for the buffer */ return; } - + _mesa_lock_texture(radeon->glCtx, texObj); if (t->bo) { radeon_bo_unref(t->bo); diff --git a/src/mesa/drivers/dri/savage/savagerender.c b/src/mesa/drivers/dri/savage/savagerender.c index 32c74f9467..8221edf387 100644 --- a/src/mesa/drivers/dri/savage/savagerender.c +++ b/src/mesa/drivers/dri/savage/savagerender.c @@ -252,13 +252,13 @@ static GLboolean run_texnorm_stage( GLcontext *ctx, const GLboolean normalizeS = (texObj->WrapS == GL_REPEAT); const GLboolean normalizeT = (reallyEnabled & TEXTURE_2D_BIT) && (texObj->WrapT == GL_REPEAT); - const GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data; - const GLint instride = VB->TexCoordPtr[i]->stride; + const GLfloat *in = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->data; + const GLint instride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->stride; GLfloat (*out)[4] = store->texcoord[i].data; GLint j; if (!ctx->Texture.Unit[i]._ReallyEnabled || - VB->TexCoordPtr[i]->size == 4) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size == 4) /* Never try to normalize homogenous tex coords! */ continue; @@ -297,7 +297,7 @@ static GLboolean run_texnorm_stage( GLcontext *ctx, } if (normalizeS || normalizeT) - VB->AttribPtr[VERT_ATTRIB_TEX0+i] = VB->TexCoordPtr[i] = &store->texcoord[i]; + VB->AttribPtr[_TNL_ATTRIB_TEX0 + i] = &store->texcoord[i]; } } diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c index c04763b40e..e9529d1939 100644 --- a/src/mesa/drivers/dri/savage/savagetris.c +++ b/src/mesa/drivers/dri/savage/savagetris.c @@ -879,13 +879,13 @@ static GLboolean savageCheckPTexHack( GLcontext *ctx ) RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); - if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) { if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX )) return GL_TRUE; /* apply ptex hack */ else FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE); } - if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4) FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE); return GL_FALSE; /* don't apply ptex hack */ @@ -976,13 +976,13 @@ static INLINE GLuint savageChooseVertexFormat_s3d( GLcontext *ctx ) if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { if (imesa->ptexHack) EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_3F_XYW, SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0); - else if (VB->TexCoordPtr[0]->size == 4) + else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) assert (0); /* should be caught by savageCheckPTexHack */ - else if (VB->TexCoordPtr[0]->size >= 2) + else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2) /* The chromium menu emits some 3D tex coords even though no * 3D texture is enabled. Ignore the 3rd coordinate. */ EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 ); - else if (VB->TexCoordPtr[0]->size == 1) { + else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 1) { EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_1F, SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 ); EMIT_PAD( 4 ); } else @@ -1025,9 +1025,9 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx ) if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { if (imesa->ptexHack) NEED_ATTR( SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0); - else if (VB->TexCoordPtr[0]->size == 4) + else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) assert (0); /* should be caught by savageCheckPTexHack */ - else if (VB->TexCoordPtr[0]->size >= 2) + else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2) /* The chromium menu emits some 3D tex coords even though no * 3D texture is enabled. Ignore the 3rd coordinate. */ NEED_ATTR( SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 ); @@ -1035,10 +1035,10 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx ) NEED_ATTR( SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 ); } if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { - if (VB->TexCoordPtr[1]->size == 4) + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4) /* projective textures are not supported by the hardware */ assert (0); /* should be caught by savageCheckPTexHack */ - else if (VB->TexCoordPtr[1]->size >= 2) + else if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size >= 2) NEED_ATTR( SAVAGE_EMIT_ST1, SAVAGE_SKIP_ST1 ); else NEED_ATTR( SAVAGE_EMIT_S1, SAVAGE_SKIP_S1 ); diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c index 76d12d07b3..3cf10007b5 100644 --- a/src/mesa/drivers/dri/sis/sis_tris.c +++ b/src/mesa/drivers/dri/sis/sis_tris.c @@ -903,14 +903,14 @@ static void sisRenderStart( GLcontext *ctx ) /* projective textures are not supported by the hardware */ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { - if (VB->TexCoordPtr[0]->size > 2) + if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size > 2) tex_fallback = GL_TRUE; EMIT_ATTR(_TNL_ATTRIB_TEX0, EMIT_2F); AGPParseSet |= SiS_PS_HAS_UV0; } /* Will only hit tex1 on SiS300 */ if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { - if (VB->TexCoordPtr[1]->size > 2) + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size > 2) tex_fallback = GL_TRUE; EMIT_ATTR(_TNL_ATTRIB_TEX1, EMIT_2F); AGPParseSet |= SiS_PS_HAS_UV1; diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.c b/src/mesa/drivers/dri/tdfx/tdfx_vb.c index 4928802232..c200ba3255 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_vb.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.c @@ -69,11 +69,11 @@ static void interp_extras( GLcontext *ctx, /*fprintf(stderr, "%s\n", __FUNCTION__);*/ - if (VB->ColorPtr[1]) { + if (VB->BackfaceColorPtr) { INTERP_4F( t, - GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], out), - GET_COLOR(VB->ColorPtr[1], in) ); + GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, out), + GET_COLOR(VB->BackfaceColorPtr, in) ); } if (VB->EdgeFlag) { @@ -88,9 +88,9 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src ) { struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], src) ); + if (VB->BackfaceColorPtr) { + COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, src) ); } setup_tab[TDFX_CONTEXT(ctx)->SetupIndex].copy_pv(ctx, dst, src); diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h index 9b780761f4..19baf7d0d2 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h +++ b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h @@ -58,32 +58,32 @@ static void TAG(emit)( GLcontext *ctx, /* fprintf(stderr, "%s\n", __FUNCTION__); */ if (IND & TDFX_TEX0_BIT) { - tc0_stride = VB->TexCoordPtr[tmu0_source]->stride; - tc0 = VB->TexCoordPtr[tmu0_source]->data; + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride; + tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data; u0scale = fxMesa->sScale0; v0scale = fxMesa->tScale0; if (IND & TDFX_PTEX_BIT) - tc0_size = VB->TexCoordPtr[tmu0_source]->size; + tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size; } if (IND & TDFX_TEX1_BIT) { - tc1 = VB->TexCoordPtr[tmu1_source]->data; - tc1_stride = VB->TexCoordPtr[tmu1_source]->stride; + tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data; + tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride; u1scale = fxMesa->sScale1; v1scale = fxMesa->tScale1; if (IND & TDFX_PTEX_BIT) - tc1_size = VB->TexCoordPtr[tmu1_source]->size; + tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size; } if (IND & TDFX_RGBA_BIT) { - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; - col_size = VB->ColorPtr[0]->size; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; + col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; } if (IND & TDFX_FOGC_BIT) { - fog = VB->FogCoordPtr->data; - fog_stride = VB->FogCoordPtr->stride; + fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; + fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride; } { @@ -168,14 +168,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; if (IND & TDFX_TEX1_BIT) { - if (VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; - if (VB->TexCoordPtr[1]->size == 4) + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4) return GL_FALSE; } - if (VB->TexCoordPtr[0]->size == 4) + if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) return GL_FALSE; } diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c index 79e67620c9..ab457d41dc 100644 --- a/src/mesa/drivers/dri/unichrome/via_tris.c +++ b/src/mesa/drivers/dri/unichrome/via_tris.c @@ -832,13 +832,13 @@ static GLboolean viaCheckPTexHack( GLcontext *ctx ) RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); - if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) { + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) { if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX )) ptexHack = GL_TRUE; else fallback = GL_TRUE; } - if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4) + if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4) fallback = GL_TRUE; FALLBACK(VIA_CONTEXT(ctx), VIA_FALLBACK_PROJ_TEXTURE, fallback); diff --git a/src/mesa/drivers/glide/fxvb.c b/src/mesa/drivers/glide/fxvb.c index 1dc5f9891a..cc9ad0e8b8 100644 --- a/src/mesa/drivers/glide/fxvb.c +++ b/src/mesa/drivers/glide/fxvb.c @@ -104,24 +104,24 @@ static void interp_extras( GLcontext *ctx, { struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - /* If stride is zero, ColorPtr[1] is constant across the VB, so + if (VB->BackfaceColorPtr) { + /* If stride is zero, BackfaceColorPtr is constant across the VB, so * there is no point interpolating between two values as they will * be identical. This case is handled in t_dd_tritmp.h */ - if (VB->ColorPtr[1]->stride) { - assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); + if (VB->BackfaceColorPtr->stride) { + assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat)); INTERP_4F( t, - GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], out), - GET_COLOR(VB->ColorPtr[1], in) ); + GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, out), + GET_COLOR(VB->BackfaceColorPtr, in) ); } - if (VB->SecondaryColorPtr[1]) { + if (VB->BackfaceSecondaryColorPtr) { INTERP_3F( t, - GET_COLOR(VB->SecondaryColorPtr[1], dst), - GET_COLOR(VB->SecondaryColorPtr[1], out), - GET_COLOR(VB->SecondaryColorPtr[1], in) ); + GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), + GET_COLOR(VB->BackfaceSecondaryColorPtr, out), + GET_COLOR(VB->BackfaceSecondaryColorPtr, in) ); } } @@ -137,13 +137,13 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src ) { struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], src) ); + if (VB->BackfaceColorPtr) { + COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, src) ); - if (VB->SecondaryColorPtr[1]) { - COPY_3FV( GET_COLOR(VB->SecondaryColorPtr[1], dst), - GET_COLOR(VB->SecondaryColorPtr[1], src) ); + if (VB->BackfaceSecondaryColorPtr) { + COPY_3FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), + GET_COLOR(VB->BackfaceSecondaryColorPtr, src) ); } } diff --git a/src/mesa/drivers/glide/fxvbtmp.h b/src/mesa/drivers/glide/fxvbtmp.h index f7970c78e2..f7893c1573 100644 --- a/src/mesa/drivers/glide/fxvbtmp.h +++ b/src/mesa/drivers/glide/fxvbtmp.h @@ -62,37 +62,37 @@ static void TAG(emit)( GLcontext *ctx, } if (IND & SETUP_TMU0) { - tc0 = VB->TexCoordPtr[tmu0_source]->data; - tc0_stride = VB->TexCoordPtr[tmu0_source]->stride; + tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data; + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride; u0scale = fxMesa->s0scale; v0scale = fxMesa->t0scale; if (IND & SETUP_PTEX) - tc0_size = VB->TexCoordPtr[tmu0_source]->size; + tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size; } if (IND & SETUP_TMU1) { - tc1 = VB->TexCoordPtr[tmu1_source]->data; - tc1_stride = VB->TexCoordPtr[tmu1_source]->stride; + tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data; + tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride; u1scale = fxMesa->s1scale; /* wrong if tmu1_source == 0, possible? */ v1scale = fxMesa->t1scale; if (IND & SETUP_PTEX) - tc1_size = VB->TexCoordPtr[tmu1_source]->size; + tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size; } if (IND & SETUP_RGBA) { - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; - col_size = VB->ColorPtr[0]->size; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; + col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; } if (IND & SETUP_SPEC) { - spec = VB->SecondaryColorPtr[0]->data; - spec_stride = VB->SecondaryColorPtr[0]->stride; + spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; + spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride; } if (IND & SETUP_FOGC) { - fog = VB->FogCoordPtr->data; - fog_stride = VB->FogCoordPtr->stride; + fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; + fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride; } if (start) { @@ -220,14 +220,15 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; if (IND & SETUP_TMU1) { - if (VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; - if (VB->TexCoordPtr[1]->size == 4) + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4) return GL_FALSE; } - if (VB->TexCoordPtr[0] && VB->TexCoordPtr[0]->size == 4) + if (VB->AttribPtr[_TNL_ATTRIB_TEX0] && + VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) return GL_FALSE; } diff --git a/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c b/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c index c99ba0bba5..0b373814fe 100644 --- a/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c +++ b/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c @@ -189,9 +189,9 @@ GLfloat ex,ey,fx,fy,cc; \ /* Get vars for later */ \ VB = &TNL_CONTEXT(ctx)->vb; \ - vbcolor = (GLchan (*)[4])VB->ColorPtr[1]->data; \ - if (VB->SecondaryColorPtr[1]) { \ - vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data; \ + vbcolor = (GLchan (*)[4])VB->BackfaceColorPtr->data; \ + if (VB->BackfaceSecondaryColorPtr) { \ + vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data; \ } else { \ vbspec = NULL; \ } \ @@ -241,33 +241,33 @@ DWORD dwColor; #define GLD_SETUP_3D_VERTEX(v) \ - p4f = VB->ObjPtr->data; \ + p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data; \ pV->Position.x = p4f[##v][0]; \ pV->Position.y = p4f[##v][1]; \ pV->Position.z = p4f[##v][2]; #define GLD_SETUP_SMOOTH_COLOUR_3D(v) \ - p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \ + p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \ pV->Diffuse = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]); #define GLD_SETUP_GET_FLAT_COLOUR_3D(v) \ - p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \ + p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \ dwColor = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]); #define GLD_SETUP_USE_FLAT_COLOUR_3D \ pV->Diffuse = dwColor; #define GLD_SETUP_TEX0_3D(v) \ - if (VB->TexCoordPtr[0]) { \ - tc = VB->TexCoordPtr[0]->data; \ + if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { \ + tc = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data; \ pV->TexUnit0.x = tc[##v][0]; \ pV->TexUnit0.y = tc[##v][1]; \ } #define GLD_SETUP_TEX1_3D(v) \ - if (VB->TexCoordPtr[1]) { \ - tc = VB->TexCoordPtr[1]->data; \ + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) { \ + tc = VB->AttribPtr[_TNL_ATTRIB_TEX1]->data; \ pV->TexUnit1.x = tc[##v][0]; \ pV->TexUnit1.y = tc[##v][1]; \ } diff --git a/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c b/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c index a85620dde8..c39775cad3 100644 --- a/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c +++ b/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c @@ -151,7 +151,7 @@ static GLboolean gld_d3d_render_stage_run( #if 0 // For debugging: Useful to see if an app passes colour data in // an unusual format. - switch (VB->ColorPtr[0]->Type) { + switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) { case GL_FLOAT: ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n"); break; diff --git a/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c b/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c index a5b5462f03..990922580a 100644 --- a/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c +++ b/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c @@ -189,9 +189,9 @@ GLfloat ex,ey,fx,fy,cc; \ /* Get vars for later */ \ VB = &TNL_CONTEXT(ctx)->vb; \ - vbcolor = (GLchan (*)[4])VB->ColorPtr[1]->data; \ - if (VB->SecondaryColorPtr[1]) { \ - vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data; \ + vbcolor = (GLchan (*)[4])VB->BackfaceColorPtr->data; \ + if (VB->BackfaceSecondaryColorPtr) { \ + vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data; \ } else { \ vbspec = NULL; \ } \ @@ -241,33 +241,33 @@ DWORD dwColor; #define GLD_SETUP_3D_VERTEX(v) \ - p4f = VB->ObjPtr->data; \ + p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data; \ pV->Position.x = p4f[##v][0]; \ pV->Position.y = p4f[##v][1]; \ pV->Position.z = p4f[##v][2]; #define GLD_SETUP_SMOOTH_COLOUR_3D(v) \ - p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \ + p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \ pV->Diffuse = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]); #define GLD_SETUP_GET_FLAT_COLOUR_3D(v) \ - p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \ + p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \ dwColor = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]); #define GLD_SETUP_USE_FLAT_COLOUR_3D \ pV->Diffuse = dwColor; #define GLD_SETUP_TEX0_3D(v) \ - if (VB->TexCoordPtr[0]) { \ - tc = VB->TexCoordPtr[0]->data; \ + if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { \ + tc = VB->TnlAttribPtr[_TNL_ATTRIB_TEX0]->data; \ pV->TexUnit0.x = tc[##v][0]; \ pV->TexUnit0.y = tc[##v][1]; \ } #define GLD_SETUP_TEX1_3D(v) \ - if (VB->TexCoordPtr[1]) { \ - tc = VB->TexCoordPtr[1]->data; \ + if (VB->TnlAttribPtr[_TNL_ATTRIB_TEX1]) { \ + tc = VB->TnlAttribPtr[_TNL_ATTRIB_TEX1]->data; \ pV->TexUnit1.x = tc[##v][0]; \ pV->TexUnit1.y = tc[##v][1]; \ } diff --git a/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c b/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c index cafbf4f5c5..265c81fb4a 100644 --- a/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c +++ b/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c @@ -149,7 +149,7 @@ static GLboolean gld_d3d_render_stage_run( #if 0 // For debugging: Useful to see if an app passes colour data in // an unusual format. - switch (VB->ColorPtr[0]->Type) { + switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) { case GL_FLOAT: ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n"); break; diff --git a/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c b/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c index 403a9d5f86..fd4dd4ed75 100644 --- a/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c +++ b/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c @@ -189,9 +189,9 @@ GLfloat ex,ey,fx,fy,cc; \ /* Get vars for later */ \ VB = &TNL_CONTEXT(ctx)->vb; \ - vbcolor = (GLchan (*)[4])VB->ColorPtr[1]->data; \ - if (VB->SecondaryColorPtr[1]) { \ - vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data; \ + vbcolor = (GLchan (*)[4])VB->BackfaceColorPtr->data; \ + if (VB->BackfaceSecondaryColorPtr) { \ + vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data; \ } else { \ vbspec = NULL; \ } \ @@ -241,33 +241,33 @@ DWORD dwColor; #define GLD_SETUP_3D_VERTEX(v) \ - p4f = VB->ObjPtr->data; \ + p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data; \ pV->Position.x = p4f[##v][0]; \ pV->Position.y = p4f[##v][1]; \ pV->Position.z = p4f[##v][2]; #define GLD_SETUP_SMOOTH_COLOUR_3D(v) \ - p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \ + p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; \ pV->Diffuse = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]); #define GLD_SETUP_GET_FLAT_COLOUR_3D(v) \ - p4f = (GLfloat (*)[4])VB->ColorPtr[0]->data; \ + p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR00]->data; \ dwColor = D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]); #define GLD_SETUP_USE_FLAT_COLOUR_3D \ pV->Diffuse = dwColor; #define GLD_SETUP_TEX0_3D(v) \ - if (VB->TexCoordPtr[0]) { \ - tc = VB->TexCoordPtr[0]->data; \ + if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) { \ + tc = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data; \ pV->TexUnit0.x = tc[##v][0]; \ pV->TexUnit0.y = tc[##v][1]; \ } #define GLD_SETUP_TEX1_3D(v) \ - if (VB->TexCoordPtr[1]) { \ - tc = VB->TexCoordPtr[1]->data; \ + if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) { \ + tc = VB->AttribPtr[_TNL_ATTRIB_TEX1]->data; \ pV->TexUnit1.x = tc[##v][0]; \ pV->TexUnit1.y = tc[##v][1]; \ } diff --git a/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c b/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c index 4fa6bcaf1a..91a68b3f2d 100644 --- a/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c +++ b/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c @@ -149,7 +149,7 @@ static GLboolean gld_d3d_render_stage_run( #if 0 // For debugging: Useful to see if an app passes colour data in // an unusual format. - switch (VB->ColorPtr[0]->Type) { + switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) { case GL_FLOAT: ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n"); break; diff --git a/src/mesa/main/config.h b/src/mesa/main/config.h index c5048970cc..2eac1cc2ed 100644 --- a/src/mesa/main/config.h +++ b/src/mesa/main/config.h @@ -243,7 +243,8 @@ /*@{*/ #define MAX_VERTEX_GENERIC_ATTRIBS 16 #define MAX_VERTEX_TEXTURE_IMAGE_UNITS MAX_TEXTURE_IMAGE_UNITS -#define MAX_COMBINED_TEXTURE_IMAGE_UNITS MAX_TEXTURE_IMAGE_UNITS +#define MAX_COMBINED_TEXTURE_IMAGE_UNITS (MAX_VERTEX_TEXTURE_IMAGE_UNITS + \ + MAX_TEXTURE_IMAGE_UNITS) /*@}*/ diff --git a/src/mesa/main/context.c b/src/mesa/main/context.c index 87eae96639..5c20ce017f 100644 --- a/src/mesa/main/context.c +++ b/src/mesa/main/context.c @@ -571,6 +571,7 @@ _mesa_init_constants(GLcontext *ctx) #if FEATURE_ARB_vertex_shader ctx->Const.MaxVertexTextureImageUnits = MAX_VERTEX_TEXTURE_IMAGE_UNITS; + ctx->Const.MaxCombinedTextureImageUnits = MAX_COMBINED_TEXTURE_IMAGE_UNITS; ctx->Const.MaxVarying = MAX_VARYING; #endif diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c index fe2416d894..5cfa898031 100644 --- a/src/mesa/main/ffvertex_prog.c +++ b/src/mesa/main/ffvertex_prog.c @@ -523,7 +523,6 @@ static void emit_dst( struct prog_dst_register *dst, dst->CondMask = COND_TR; /* always pass cond test */ dst->CondSwizzle = SWIZZLE_NOOP; dst->CondSrc = 0; - dst->pad = 0; /* Check that bitfield sizes aren't exceeded */ ASSERT(dst->Index == reg.idx); } diff --git a/src/mesa/main/get.c b/src/mesa/main/get.c index 3f6b03c88a..3d32649bad 100644 --- a/src/mesa/main/get.c +++ b/src/mesa/main/get.c @@ -1877,7 +1877,7 @@ _mesa_GetBooleanv( GLenum pname, GLboolean *params ) break; case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB: CHECK_EXT1(ARB_vertex_shader, "GetBooleanv"); - params[0] = INT_TO_BOOLEAN(MAX_COMBINED_TEXTURE_IMAGE_UNITS); + params[0] = INT_TO_BOOLEAN(ctx->Const.MaxCombinedTextureImageUnits); break; case GL_CURRENT_PROGRAM: CHECK_EXT1(ARB_shader_objects, "GetBooleanv"); @@ -3712,7 +3712,7 @@ _mesa_GetFloatv( GLenum pname, GLfloat *params ) break; case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB: CHECK_EXT1(ARB_vertex_shader, "GetFloatv"); - params[0] = (GLfloat)(MAX_COMBINED_TEXTURE_IMAGE_UNITS); + params[0] = (GLfloat)(ctx->Const.MaxCombinedTextureImageUnits); break; case GL_CURRENT_PROGRAM: CHECK_EXT1(ARB_shader_objects, "GetFloatv"); @@ -5547,7 +5547,7 @@ _mesa_GetIntegerv( GLenum pname, GLint *params ) break; case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB: CHECK_EXT1(ARB_vertex_shader, "GetIntegerv"); - params[0] = MAX_COMBINED_TEXTURE_IMAGE_UNITS; + params[0] = ctx->Const.MaxCombinedTextureImageUnits; break; case GL_CURRENT_PROGRAM: CHECK_EXT1(ARB_shader_objects, "GetIntegerv"); @@ -7383,7 +7383,7 @@ _mesa_GetInteger64v( GLenum pname, GLint64 *params ) break; case GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB: CHECK_EXT1(ARB_vertex_shader, "GetInteger64v"); - params[0] = (GLint64)(MAX_COMBINED_TEXTURE_IMAGE_UNITS); + params[0] = (GLint64)(ctx->Const.MaxCombinedTextureImageUnits); break; case GL_CURRENT_PROGRAM: CHECK_EXT1(ARB_shader_objects, "GetInteger64v"); diff --git a/src/mesa/main/get_gen.py b/src/mesa/main/get_gen.py index 697c4cfd92..01170a42a7 100644 --- a/src/mesa/main/get_gen.py +++ b/src/mesa/main/get_gen.py @@ -1006,7 +1006,7 @@ StateVars = [ ( "GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS_ARB", GLint, ["ctx->Const.MaxVertexTextureImageUnits"], "", ["ARB_vertex_shader"] ), ( "GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS_ARB", GLint, - ["MAX_COMBINED_TEXTURE_IMAGE_UNITS"], "", ["ARB_vertex_shader"] ), + ["ctx->Const.MaxCombinedTextureImageUnits"], "", ["ARB_vertex_shader"] ), # GL_ARB_shader_objects # Actually, this token isn't part of GL_ARB_shader_objects, but is diff --git a/src/mesa/main/imports.c b/src/mesa/main/imports.c index 46ffb929b6..f2ef84f35c 100644 --- a/src/mesa/main/imports.c +++ b/src/mesa/main/imports.c @@ -460,7 +460,7 @@ _mesa_inv_sqrtf(float n) #if 0 /* not used, see below -BP */ float r3, x3, y3; #endif - union { float f; unsigned int i; } u; + fi_type u; unsigned int magic; /* @@ -629,11 +629,15 @@ _mesa_ffsll(int64_t val) unsigned int _mesa_bitcount(unsigned int n) { +#if defined(__GNUC__) + return __builtin_popcount(n); +#else unsigned int bits; for (bits = 0; n > 0; n = n >> 1) { bits += (n & 1); } return bits; +#endif } @@ -645,10 +649,10 @@ _mesa_bitcount(unsigned int n) GLhalfARB _mesa_float_to_half(float val) { - const int flt = *((int *) (void *) &val); - const int flt_m = flt & 0x7fffff; - const int flt_e = (flt >> 23) & 0xff; - const int flt_s = (flt >> 31) & 0x1; + const fi_type fi = {val}; + const int flt_m = fi.i & 0x7fffff; + const int flt_e = (fi.i >> 23) & 0xff; + const int flt_s = (fi.i >> 31) & 0x1; int s, e, m = 0; GLhalfARB result; @@ -735,7 +739,8 @@ _mesa_half_to_float(GLhalfARB val) const int m = val & 0x3ff; const int e = (val >> 10) & 0x1f; const int s = (val >> 15) & 0x1; - int flt_m, flt_e, flt_s, flt; + int flt_m, flt_e, flt_s; + fi_type fi; float result; /* sign bit */ @@ -770,8 +775,8 @@ _mesa_half_to_float(GLhalfARB val) flt_m = m << 13; } - flt = (flt_s << 31) | (flt_e << 23) | flt_m; - result = *((float *) (void *) &flt); + fi.i = (flt_s << 31) | (flt_e << 23) | flt_m; + result = fi.f; return result; } diff --git a/src/mesa/main/macros.h b/src/mesa/main/macros.h index 3d9a1aba98..f0ea463fb9 100644 --- a/src/mesa/main/macros.h +++ b/src/mesa/main/macros.h @@ -202,17 +202,12 @@ do { \ #endif /** - * Copy a 4-element float vector (avoid using FPU registers) - * XXX Could use two 64-bit moves on 64-bit systems + * Copy a 4-element float vector + * memcpy seems to be most efficient */ #define COPY_4FV( DST, SRC ) \ do { \ - const GLuint *_s = (const GLuint *) (SRC); \ - GLuint *_d = (GLuint *) (DST); \ - _d[0] = _s[0]; \ - _d[1] = _s[1]; \ - _d[2] = _s[2]; \ - _d[3] = _s[3]; \ + _mesa_memcpy(DST, SRC, sizeof(GLfloat) * 4); \ } while (0) /** Copy \p SZ elements into a 4-element vector */ diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h index cde2f5fe06..b52c84b491 100644 --- a/src/mesa/main/mtypes.h +++ b/src/mesa/main/mtypes.h @@ -2319,6 +2319,7 @@ struct gl_constants GLuint MaxTextureCoordUnits; GLuint MaxTextureImageUnits; GLuint MaxVertexTextureImageUnits; + GLuint MaxCombinedTextureImageUnits; GLuint MaxTextureUnits; /**< = MIN(CoordUnits, ImageUnits) */ GLfloat MaxTextureMaxAnisotropy; /**< GL_EXT_texture_filter_anisotropic */ GLfloat MaxTextureLodBias; /**< GL_EXT_texture_lod_bias */ diff --git a/src/mesa/main/texgetimage.c b/src/mesa/main/texgetimage.c index 23765d2753..bd7cc8d278 100644 --- a/src/mesa/main/texgetimage.c +++ b/src/mesa/main/texgetimage.c @@ -555,7 +555,8 @@ _mesa_get_compressed_teximage(GLcontext *ctx, GLenum target, GLint level, _mesa_get_format_block_size(texImage->TexFormat, &bw, &bh); for (i = 0; i < (texImage->Height + bh - 1) / bh; i++) { memcpy((GLubyte *)img + i * row_stride, - (GLubyte *)texImage->Data + i * row_stride_stored, row_stride); + (GLubyte *)texImage->Data + i * row_stride_stored, + row_stride); } } diff --git a/src/mesa/main/texobj.c b/src/mesa/main/texobj.c index 237b6eb00d..09fe7b85ba 100644 --- a/src/mesa/main/texobj.c +++ b/src/mesa/main/texobj.c @@ -940,7 +940,8 @@ _mesa_DeleteTextures( GLsizei n, const GLuint *textures) /** * Convert a GL texture target enum such as GL_TEXTURE_2D or GL_TEXTURE_3D * into the corresponding Mesa texture target index. - * Return -1 if target is invalid. + * Note that proxy targets are not valid here. + * \return TEXTURE_x_INDEX or -1 if target is invalid */ static GLint target_enum_to_index(GLenum target) diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h index fa233b9f30..dc55cb7ccc 100644 --- a/src/mesa/main/version.h +++ b/src/mesa/main/version.h @@ -1,6 +1,6 @@ /* * Mesa 3-D graphics library - * Version: 7.7 + * Version: 7.8 * * Copyright (C) 1999-2008 Brian Paul All Rights Reserved. * Copyright (C) 2009 VMware, Inc. All Rights Reserved. @@ -30,9 +30,9 @@ /* Mesa version */ #define MESA_MAJOR 7 -#define MESA_MINOR 7 +#define MESA_MINOR 8 #define MESA_PATCH 0 -#define MESA_VERSION_STRING "7.7-rc2" +#define MESA_VERSION_STRING "7.8-devel" /* To make version comparison easy */ #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c index 192d39aed1..038ce0b4f0 100644 --- a/src/mesa/shader/prog_execute.c +++ b/src/mesa/shader/prog_execute.c @@ -54,8 +54,18 @@ * Set x to positive or negative infinity. */ #if defined(USE_IEEE) || defined(_WIN32) -#define SET_POS_INFINITY(x) ( *((GLuint *) (void *)&x) = 0x7F800000 ) -#define SET_NEG_INFINITY(x) ( *((GLuint *) (void *)&x) = 0xFF800000 ) +#define SET_POS_INFINITY(x) \ + do { \ + fi_type fi; \ + fi.i = 0x7F800000; \ + x = fi.f; \ + } while (0) +#define SET_NEG_INFINITY(x) \ + do { \ + fi_type fi; \ + fi.i = 0xFF800000; \ + x = fi.f; \ + } while (0) #elif defined(VMS) #define SET_POS_INFINITY(x) x = __MAXFLOAT #define SET_NEG_INFINITY(x) x = -__MAXFLOAT @@ -1635,11 +1645,12 @@ _mesa_execute_program(GLcontext * ctx, case OPCODE_UP2H: /* unpack two 16-bit floats */ { GLfloat a[4], result[4]; - const GLuint *rawBits = (const GLuint *) a; + fi_type fi; GLhalfNV hx, hy; fetch_vector1(&inst->SrcReg[0], machine, a); - hx = rawBits[0] & 0xffff; - hy = rawBits[0] >> 16; + fi.f = a[0]; + hx = fi.i & 0xffff; + hy = fi.i >> 16; result[0] = result[2] = _mesa_half_to_float(hx); result[1] = result[3] = _mesa_half_to_float(hy); store_vector4(inst, machine, result); @@ -1648,11 +1659,12 @@ _mesa_execute_program(GLcontext * ctx, case OPCODE_UP2US: /* unpack two GLushorts */ { GLfloat a[4], result[4]; - const GLuint *rawBits = (const GLuint *) a; + fi_type fi; GLushort usx, usy; fetch_vector1(&inst->SrcReg[0], machine, a); - usx = rawBits[0] & 0xffff; - usy = rawBits[0] >> 16; + fi.f = a[0]; + usx = fi.i & 0xffff; + usy = fi.i >> 16; result[0] = result[2] = usx * (1.0f / 65535.0f); result[1] = result[3] = usy * (1.0f / 65535.0f); store_vector4(inst, machine, result); @@ -1661,24 +1673,26 @@ _mesa_execute_program(GLcontext * ctx, case OPCODE_UP4B: /* unpack four GLbytes */ { GLfloat a[4], result[4]; - const GLuint *rawBits = (const GLuint *) a; + fi_type fi; fetch_vector1(&inst->SrcReg[0], machine, a); - result[0] = (((rawBits[0] >> 0) & 0xff) - 128) / 127.0F; - result[1] = (((rawBits[0] >> 8) & 0xff) - 128) / 127.0F; - result[2] = (((rawBits[0] >> 16) & 0xff) - 128) / 127.0F; - result[3] = (((rawBits[0] >> 24) & 0xff) - 128) / 127.0F; + fi.f = a[0]; + result[0] = (((fi.i >> 0) & 0xff) - 128) / 127.0F; + result[1] = (((fi.i >> 8) & 0xff) - 128) / 127.0F; + result[2] = (((fi.i >> 16) & 0xff) - 128) / 127.0F; + result[3] = (((fi.i >> 24) & 0xff) - 128) / 127.0F; store_vector4(inst, machine, result); } break; case OPCODE_UP4UB: /* unpack four GLubytes */ { GLfloat a[4], result[4]; - const GLuint *rawBits = (const GLuint *) a; + fi_type fi; fetch_vector1(&inst->SrcReg[0], machine, a); - result[0] = ((rawBits[0] >> 0) & 0xff) / 255.0F; - result[1] = ((rawBits[0] >> 8) & 0xff) / 255.0F; - result[2] = ((rawBits[0] >> 16) & 0xff) / 255.0F; - result[3] = ((rawBits[0] >> 24) & 0xff) / 255.0F; + fi.f = a[0]; + result[0] = ((fi.i >> 0) & 0xff) / 255.0F; + result[1] = ((fi.i >> 8) & 0xff) / 255.0F; + result[2] = ((fi.i >> 16) & 0xff) / 255.0F; + result[3] = ((fi.i >> 24) & 0xff) / 255.0F; store_vector4(inst, machine, result); } break; diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 1c687bc16c..224350caac 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -312,7 +312,6 @@ struct prog_dst_register */ GLuint CondSrc:1; /*@}*/ - GLuint pad:28; }; diff --git a/src/mesa/shader/slang/slang_emit.c b/src/mesa/shader/slang/slang_emit.c index c0e4b27aa5..99eb254cee 100644 --- a/src/mesa/shader/slang/slang_emit.c +++ b/src/mesa/shader/slang/slang_emit.c @@ -81,8 +81,8 @@ new_subroutine(slang_emit_info *emitInfo, GLuint *id) emitInfo->Subroutines = (struct gl_program **) _mesa_realloc(emitInfo->Subroutines, - n * sizeof(struct gl_program), - (n + 1) * sizeof(struct gl_program)); + n * sizeof(struct gl_program *), + (n + 1) * sizeof(struct gl_program *)); emitInfo->Subroutines[n] = ctx->Driver.NewProgram(ctx, emitInfo->prog->Target, 0); emitInfo->Subroutines[n]->Parameters = emitInfo->prog->Parameters; emitInfo->NumSubroutines++; @@ -551,6 +551,9 @@ emit_instruction(slang_emit_info *emitInfo, &srcRelAddr, NULL, NULL); + if (!inst) { + return NULL; + } src[i] = &newSrc[i]; } @@ -948,6 +951,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[0]->Store, n->Children[1]->Store, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "Compare values"); /* Compute val = DOT(temp, temp) (reduction) */ @@ -957,6 +963,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) &tempStore, &tempStore, NULL); + if (!inst) { + return NULL; + } inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/ inst_comment(inst, "Reduce vec to bool"); @@ -972,6 +981,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) n->Store, &zero, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "Invert true/false"); } } @@ -1001,6 +1013,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) &srcStore0, &srcStore1, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "Begin struct/array comparison"); } else { @@ -1010,12 +1025,18 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) &srcStore0, &srcStore1, NULL); + if (!inst) { + return NULL; + } /* ADD accTemp, accTemp, sneTemp; # like logical-OR */ inst = emit_instruction(emitInfo, OPCODE_ADD, &accTemp, /* dest */ &accTemp, &sneTemp, NULL); + if (!inst) { + return NULL; + } } } @@ -1025,6 +1046,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) &accTemp, &accTemp, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "End struct/array comparison"); if (n->Opcode == IR_EQUAL) { @@ -1036,6 +1060,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n) n->Store, &zero, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "Invert true/false"); } @@ -1119,6 +1146,9 @@ emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[0]->Store, n->Children[1]->Store, NULL); + if (!inst) { + return NULL; + } /* n->dest = min(tmp, ch[2]) */ inst = emit_instruction(emitInfo, OPCODE_MIN, @@ -1153,7 +1183,9 @@ emit_negation(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[0]->Store, NULL, NULL); - inst->SrcReg[0].Negate = NEGATE_XYZW; + if (inst) { + inst->SrcReg[0].Negate = NEGATE_XYZW; + } return inst; } @@ -1356,6 +1388,9 @@ emit_tex(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[1]->Store, NULL, NULL); + if (!inst) { + return NULL; + } inst->TexShadow = shadow; @@ -1458,6 +1493,9 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n) &srcStore, NULL, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "IR_COPY block"); srcStore.Index++; dstStore.Index++; @@ -1473,6 +1511,9 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[1]->Store, NULL, NULL); + if (!inst) { + return NULL; + } dstAnnot = storage_annotation(n->Children[0], emitInfo->prog); srcAnnot = storage_annotation(n->Children[1], emitInfo->prog); inst->Comment = instruction_annotation(inst->Opcode, dstAnnot, @@ -1534,6 +1575,9 @@ emit_cond(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[0]->Store, NULL, NULL); + if (!inst) { + return NULL; + } inst->CondUpdate = GL_TRUE; inst_comment(inst, "COND expr"); _slang_free_temp(emitInfo->vt, n->Store); @@ -1596,6 +1640,9 @@ emit_not(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[0]->Store, &zero, NULL); + if (!inst) { + return NULL; + } inst_comment(inst, "NOT"); free_node_storage(emitInfo->vt, n->Children[0]); @@ -1646,12 +1693,17 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n) ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask); } else { + struct prog_instruction *inst; + /* IF src[0] THEN ... */ - emit_instruction(emitInfo, OPCODE_IF, - NULL, /* dst */ - n->Children[0]->Store, /* op0 */ - NULL, - NULL); + inst = emit_instruction(emitInfo, OPCODE_IF, + NULL, /* dst */ + n->Children[0]->Store, /* op0 */ + NULL, + NULL); + if (!inst) { + return NULL; + } } } else { @@ -1875,6 +1927,9 @@ emit_cont_break_if_true(slang_emit_info *emitInfo, slang_ir_node *n) n->Children[0]->Store, NULL, NULL); + if (!inst) { + return NULL; + } n->InstLocation = emitInfo->prog->NumInstructions; inst = new_instruction(emitInfo, opcode); @@ -2045,6 +2100,9 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n) indexStore, /* the index */ &elemSizeStore, NULL); + if (!inst) { + return NULL; + } indexStore = indexTemp; } @@ -2071,6 +2129,9 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n) indexStore, /* the index */ &indirectArray, /* indirect array base */ NULL); + if (!inst) { + return NULL; + } indexStore = indexTemp; } diff --git a/src/mesa/shader/slang/slang_link.c b/src/mesa/shader/slang/slang_link.c index 0a2bc49780..ed27821a95 100644 --- a/src/mesa/shader/slang/slang_link.c +++ b/src/mesa/shader/slang/slang_link.c @@ -590,11 +590,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType) { struct gl_shader *newShader; const struct gl_shader *firstShader = NULL; - GLuint shaderLengths[100]; + GLuint *shaderLengths; GLchar *source; GLuint totalLen = 0, len = 0; GLuint i; + shaderLengths = (GLuint *)_mesa_malloc(shProg->NumShaders * sizeof(GLuint)); + if (!shaderLengths) { + return NULL; + } + /* compute total size of new shader source code */ for (i = 0; i < shProg->NumShaders; i++) { const struct gl_shader *shader = shProg->Shaders[i]; @@ -606,12 +611,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType) } } - if (totalLen == 0) + if (totalLen == 0) { + _mesa_free(shaderLengths); return NULL; + } source = (GLchar *) _mesa_malloc(totalLen + 1); - if (!source) + if (!source) { + _mesa_free(shaderLengths); return NULL; + } /* concatenate shaders */ for (i = 0; i < shProg->NumShaders; i++) { @@ -626,9 +635,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType) _mesa_printf("---NEW CONCATENATED SHADER---:\n%s\n------------\n", source); */ + _mesa_free(shaderLengths); + remove_extra_version_directives(source); newShader = CALLOC_STRUCT(gl_shader); + if (!newShader) { + _mesa_free(source); + return NULL; + } + newShader->Type = shaderType; newShader->Source = source; newShader->Pragmas = firstShader->Pragmas; diff --git a/src/mesa/state_tracker/st_atom.c b/src/mesa/state_tracker/st_atom.c index 0e89a624c4..73df44d198 100644 --- a/src/mesa/state_tracker/st_atom.c +++ b/src/mesa/state_tracker/st_atom.c @@ -46,7 +46,8 @@ static const struct st_tracked_state *atoms[] = &st_update_clip, &st_finalize_textures, - &st_update_shader, + &st_update_fp, + &st_update_vp, &st_update_rasterizer, &st_update_polygon_stipple, diff --git a/src/mesa/state_tracker/st_atom.h b/src/mesa/state_tracker/st_atom.h index c7cffd85c8..f34b49203b 100644 --- a/src/mesa/state_tracker/st_atom.h +++ b/src/mesa/state_tracker/st_atom.h @@ -47,7 +47,8 @@ void st_validate_state( struct st_context *st ); extern const struct st_tracked_state st_update_framebuffer; extern const struct st_tracked_state st_update_clip; extern const struct st_tracked_state st_update_depth_stencil_alpha; -extern const struct st_tracked_state st_update_shader; +extern const struct st_tracked_state st_update_fp; +extern const struct st_tracked_state st_update_vp; extern const struct st_tracked_state st_update_rasterizer; extern const struct st_tracked_state st_update_polygon_stipple; extern const struct st_tracked_state st_update_viewport; diff --git a/src/mesa/state_tracker/st_atom_framebuffer.c b/src/mesa/state_tracker/st_atom_framebuffer.c index e18c0f6e0a..8ca4335e33 100644 --- a/src/mesa/state_tracker/st_atom_framebuffer.c +++ b/src/mesa/state_tracker/st_atom_framebuffer.c @@ -40,6 +40,7 @@ #include "pipe/p_inlines.h" #include "cso_cache/cso_context.h" #include "util/u_rect.h" +#include "util/u_math.h" @@ -64,8 +65,8 @@ update_renderbuffer_surface(struct st_context *st, GLuint level; /* find matching mipmap level size */ for (level = 0; level <= texture->last_level; level++) { - if (texture->width[level] == rtt_width && - texture->height[level] == rtt_height) { + if (u_minify(texture->width0, level) == rtt_width && + u_minify(texture->height0, level) == rtt_height) { pipe_surface_reference(&strb->surface, NULL); diff --git a/src/mesa/state_tracker/st_atom_pixeltransfer.c b/src/mesa/state_tracker/st_atom_pixeltransfer.c index babfcc87b4..6a5854e9ba 100644 --- a/src/mesa/state_tracker/st_atom_pixeltransfer.c +++ b/src/mesa/state_tracker/st_atom_pixeltransfer.c @@ -145,7 +145,7 @@ load_color_map_texture(GLcontext *ctx, struct pipe_texture *pt) const GLuint gSize = ctx->PixelMaps.GtoG.Size; const GLuint bSize = ctx->PixelMaps.BtoB.Size; const GLuint aSize = ctx->PixelMaps.AtoA.Size; - const uint texSize = pt->width[0]; + const uint texSize = pt->width0; uint *dest; uint i, j; @@ -162,12 +162,14 @@ load_color_map_texture(GLcontext *ctx, struct pipe_texture *pt) */ for (i = 0; i < texSize; i++) { for (j = 0; j < texSize; j++) { + union util_color uc; int k = (i * texSize + j); ubyte r = ctx->PixelMaps.RtoR.Map8[j * rSize / texSize]; ubyte g = ctx->PixelMaps.GtoG.Map8[i * gSize / texSize]; ubyte b = ctx->PixelMaps.BtoB.Map8[j * bSize / texSize]; ubyte a = ctx->PixelMaps.AtoA.Map8[i * aSize / texSize]; - util_pack_color_ub(r, g, b, a, pt->format, dest + k); + util_pack_color_ub(r, g, b, a, pt->format, &uc); + *(dest + k) = uc.ui; } } diff --git a/src/mesa/state_tracker/st_atom_sampler.c b/src/mesa/state_tracker/st_atom_sampler.c index 6611956ae8..d6e3a3e561 100644 --- a/src/mesa/state_tracker/st_atom_sampler.c +++ b/src/mesa/state_tracker/st_atom_sampler.c @@ -229,14 +229,23 @@ update_samplers(struct st_context *st) /*printf("%s su=%u non-null\n", __FUNCTION__, su);*/ cso_single_sampler(st->cso_context, su, sampler); + if (su < st->ctx->Const.MaxVertexTextureImageUnits) { + cso_single_vertex_sampler(st->cso_context, su, sampler); + } } else { /*printf("%s su=%u null\n", __FUNCTION__, su);*/ cso_single_sampler(st->cso_context, su, NULL); + if (su < st->ctx->Const.MaxVertexTextureImageUnits) { + cso_single_vertex_sampler(st->cso_context, su, NULL); + } } } cso_single_sampler_done(st->cso_context); + if (st->ctx->Const.MaxVertexTextureImageUnits > 0) { + cso_single_vertex_sampler_done(st->cso_context); + } } diff --git a/src/mesa/state_tracker/st_atom_shader.c b/src/mesa/state_tracker/st_atom_shader.c index 6e311e537e..09baff875b 100644 --- a/src/mesa/state_tracker/st_atom_shader.c +++ b/src/mesa/state_tracker/st_atom_shader.c @@ -56,82 +56,18 @@ #include "st_mesa_to_tgsi.h" -/** - * This represents a vertex program, especially translated to match - * the inputs of a particular fragment shader. - */ -struct translated_vertex_program -{ - struct st_vertex_program *master; - - /** The fragment shader "signature" this vertex shader is meant for: */ - GLbitfield frag_inputs; - /** Compared against master vertex program's serialNo: */ - GLuint serialNo; - /** Maps VERT_RESULT_x to slot */ - GLuint output_to_slot[VERT_RESULT_MAX]; - ubyte output_to_semantic_name[VERT_RESULT_MAX]; - ubyte output_to_semantic_index[VERT_RESULT_MAX]; - - /** Pointer to the translated vertex program */ - struct st_vertex_program *vp; - - struct translated_vertex_program *next; /**< next in linked list */ -}; - - -/** - * Given a vertex program output attribute, return the corresponding - * fragment program input attribute. - * \return -1 for vertex outputs that have no corresponding fragment input +/* + * Translate fragment program if needed. */ -static GLint -vp_out_to_fp_in(GLuint vertResult) -{ - if (vertResult >= VERT_RESULT_TEX0 && - vertResult < VERT_RESULT_TEX0 + MAX_TEXTURE_COORD_UNITS) - return FRAG_ATTRIB_TEX0 + (vertResult - VERT_RESULT_TEX0); - - if (vertResult >= VERT_RESULT_VAR0 && - vertResult < VERT_RESULT_VAR0 + MAX_VARYING) - return FRAG_ATTRIB_VAR0 + (vertResult - VERT_RESULT_VAR0); - - switch (vertResult) { - case VERT_RESULT_HPOS: - return FRAG_ATTRIB_WPOS; - case VERT_RESULT_COL0: - return FRAG_ATTRIB_COL0; - case VERT_RESULT_COL1: - return FRAG_ATTRIB_COL1; - case VERT_RESULT_FOGC: - return FRAG_ATTRIB_FOGC; - default: - /* Back-face colors, edge flags, etc */ - return -1; - } -} - - -/** - * Find a translated vertex program that corresponds to stvp and - * has outputs matched to stfp's inputs. - * This performs vertex and fragment translation (to TGSI) when needed. - */ -static struct translated_vertex_program * -find_translated_vp(struct st_context *st, - struct st_vertex_program *stvp, - struct st_fragment_program *stfp) +static void +translate_fp(struct st_context *st, + struct st_fragment_program *stfp) { - static const GLuint UNUSED = ~0; - struct translated_vertex_program *xvp; const GLbitfield fragInputsRead = stfp->Base.Base.InputsRead; - /* - * Translate fragment program if needed. - */ if (!stfp->state.tokens) { GLuint inAttr, numIn = 0; @@ -141,7 +77,7 @@ find_translated_vp(struct st_context *st, numIn++; } else { - stfp->input_to_slot[inAttr] = UNUSED; + stfp->input_to_slot[inAttr] = -1; } } @@ -151,170 +87,63 @@ find_translated_vp(struct st_context *st, st_translate_fragment_program(st, stfp, stfp->input_to_slot); } +} - /* See if we've got a translated vertex program whose outputs match - * the fragment program's inputs. - * XXX This could be a hash lookup, using InputsRead as the key. - */ - for (xvp = stfp->vertex_programs; xvp; xvp = xvp->next) { - if (xvp->master == stvp && xvp->frag_inputs == fragInputsRead) { - break; - } - } - /* No? Allocate translated vp object now */ - if (!xvp) { - xvp = ST_CALLOC_STRUCT(translated_vertex_program); - xvp->frag_inputs = fragInputsRead; - xvp->master = stvp; +/** + * Find a translated vertex program that corresponds to stvp and + * has outputs matched to stfp's inputs. + * This performs vertex and fragment translation (to TGSI) when needed. + */ +static struct st_vp_varient * +find_translated_vp(struct st_context *st, + struct st_vertex_program *stvp ) +{ + struct st_vp_varient *vpv; + struct st_vp_varient_key key; - xvp->next = stfp->vertex_programs; - stfp->vertex_programs = xvp; - } + /* Nothing in our key yet. This will change: + */ + memset(&key, 0, sizeof key); + key.dummy = 0; - /* See if we need to translate vertex program to TGSI form */ - if (xvp->serialNo != stvp->serialNo) { - GLuint outAttr; - const GLbitfield64 outputsWritten = stvp->Base.Base.OutputsWritten; - GLuint numVpOuts = 0; - GLboolean emitPntSize = GL_FALSE, emitBFC0 = GL_FALSE, emitBFC1 = GL_FALSE; - GLbitfield usedGenerics = 0x0; - GLbitfield usedOutputSlots = 0x0; - - /* Compute mapping of vertex program outputs to slots, which depends - * on the fragment program's input->slot mapping. + /* Do we need to throw away old translations after a change in the + * GL program string? + */ + if (stvp->serialNo != stvp->lastSerialNo) { + /* These may have changed if the program string changed. */ - for (outAttr = 0; outAttr < VERT_RESULT_MAX; outAttr++) { - /* set defaults: */ - xvp->output_to_slot[outAttr] = UNUSED; - xvp->output_to_semantic_name[outAttr] = TGSI_SEMANTIC_COUNT; - xvp->output_to_semantic_index[outAttr] = 99; - - if (outAttr == VERT_RESULT_HPOS) { - /* always put xformed position into slot zero */ - GLuint slot = 0; - xvp->output_to_slot[VERT_RESULT_HPOS] = slot; - xvp->output_to_semantic_name[outAttr] = TGSI_SEMANTIC_POSITION; - xvp->output_to_semantic_index[outAttr] = 0; - numVpOuts++; - usedOutputSlots |= (1 << slot); - } - else if (outputsWritten & (1 << outAttr)) { - /* see if the frag prog wants this vert output */ - GLint fpInAttrib = vp_out_to_fp_in(outAttr); - if (fpInAttrib >= 0) { - GLuint fpInSlot = stfp->input_to_slot[fpInAttrib]; - if (fpInSlot != ~0) { - /* match this vp output to the fp input */ - GLuint vpOutSlot = stfp->input_map[fpInSlot]; - xvp->output_to_slot[outAttr] = vpOutSlot; - xvp->output_to_semantic_name[outAttr] = stfp->input_semantic_name[fpInSlot]; - xvp->output_to_semantic_index[outAttr] = stfp->input_semantic_index[fpInSlot]; - numVpOuts++; - usedOutputSlots |= (1 << vpOutSlot); - } - else { -#if 0 /*debug*/ - printf("VP output %d not used by FP\n", outAttr); -#endif - } - } - else if (outAttr == VERT_RESULT_PSIZ) - emitPntSize = GL_TRUE; - else if (outAttr == VERT_RESULT_BFC0) - emitBFC0 = GL_TRUE; - else if (outAttr == VERT_RESULT_BFC1) - emitBFC1 = GL_TRUE; - } -#if 0 /*debug*/ - printf("assign vp output_to_slot[%d] = %d\n", outAttr, - xvp->output_to_slot[outAttr]); -#endif - } - - /* must do these last */ - if (emitPntSize) { - GLuint slot = numVpOuts++; - xvp->output_to_slot[VERT_RESULT_PSIZ] = slot; - xvp->output_to_semantic_name[VERT_RESULT_PSIZ] = TGSI_SEMANTIC_PSIZE; - xvp->output_to_semantic_index[VERT_RESULT_PSIZ] = 0; - usedOutputSlots |= (1 << slot); - } - if (emitBFC0) { - GLuint slot = numVpOuts++; - xvp->output_to_slot[VERT_RESULT_BFC0] = slot; - xvp->output_to_semantic_name[VERT_RESULT_BFC0] = TGSI_SEMANTIC_COLOR; - xvp->output_to_semantic_index[VERT_RESULT_BFC0] = 0; - usedOutputSlots |= (1 << slot); - } - if (emitBFC1) { - GLuint slot = numVpOuts++; - xvp->output_to_slot[VERT_RESULT_BFC1] = slot; - xvp->output_to_semantic_name[VERT_RESULT_BFC1] = TGSI_SEMANTIC_COLOR; - xvp->output_to_semantic_index[VERT_RESULT_BFC1] = 1; - usedOutputSlots |= (1 << slot); - } - - /* build usedGenerics mask */ - usedGenerics = 0x0; - for (outAttr = 0; outAttr < VERT_RESULT_MAX; outAttr++) { - if (xvp->output_to_semantic_name[outAttr] == TGSI_SEMANTIC_GENERIC) { - usedGenerics |= (1 << xvp->output_to_semantic_index[outAttr]); - } - } + st_prepare_vertex_program( st, stvp ); - /* For each vertex program output that doesn't match up to a fragment - * program input, map the vertex program output to a free slot and - * free generic attribute. + /* We are now up-to-date: */ - for (outAttr = 0; outAttr < VERT_RESULT_MAX; outAttr++) { - if (outputsWritten & (1 << outAttr)) { - if (xvp->output_to_slot[outAttr] == UNUSED) { - GLint freeGeneric = _mesa_ffs(~usedGenerics) - 1; - GLint freeSlot = _mesa_ffs(~usedOutputSlots) - 1; - usedGenerics |= (1 << freeGeneric); - usedOutputSlots |= (1 << freeSlot); - xvp->output_to_slot[outAttr] = freeSlot; - xvp->output_to_semantic_name[outAttr] = TGSI_SEMANTIC_GENERIC; - xvp->output_to_semantic_index[outAttr] = freeGeneric; - } - } - -#if 0 /*debug*/ - printf("vp output_to_slot[%d] = %d\n", outAttr, - xvp->output_to_slot[outAttr]); -#endif + stvp->lastSerialNo = stvp->serialNo; + } + + /* See if we've got a translated vertex program whose outputs match + * the fragment program's inputs. + */ + for (vpv = stvp->varients; vpv; vpv = vpv->next) { + if (memcmp(&vpv->key, &key, sizeof key) == 0) { + break; } + } - assert(stvp->Base.Base.NumInstructions > 1); - - st_translate_vertex_program(st, stvp, xvp->output_to_slot, - xvp->output_to_semantic_name, - xvp->output_to_semantic_index); - - xvp->vp = stvp; - - /* translated VP is up to date now */ - xvp->serialNo = stvp->serialNo; + /* No? Perform new translation here. */ + if (!vpv) { + vpv = st_translate_vertex_program(st, stvp, &key); + if (!vpv) + return NULL; + + vpv->next = stvp->varients; + stvp->varients = vpv; } - return xvp; + return vpv; } -void -st_free_translated_vertex_programs(struct st_context *st, - struct translated_vertex_program *xvp) -{ - struct translated_vertex_program *next; - - while (xvp) { - next = xvp->next; - _mesa_free(xvp); - xvp = next; - } -} static void * @@ -328,32 +157,19 @@ get_passthrough_fs(struct st_context *st) return st->passthrough_fs; } - static void -update_linkage( struct st_context *st ) +update_fp( struct st_context *st ) { - struct st_vertex_program *stvp; struct st_fragment_program *stfp; - struct translated_vertex_program *xvp; - - /* find active shader and params -- Should be covered by - * ST_NEW_VERTEX_PROGRAM - */ - assert(st->ctx->VertexProgram._Current); - stvp = st_vertex_program(st->ctx->VertexProgram._Current); - assert(stvp->Base.Base.Target == GL_VERTEX_PROGRAM_ARB); assert(st->ctx->FragmentProgram._Current); stfp = st_fragment_program(st->ctx->FragmentProgram._Current); assert(stfp->Base.Base.Target == GL_FRAGMENT_PROGRAM_ARB); - xvp = find_translated_vp(st, stvp, stfp); + translate_fp(st, stfp); - st_reference_vertprog(st, &st->vp, stvp); st_reference_fragprog(st, &st->fp, stfp); - cso_set_vertex_shader_handle(st->cso_context, stvp->driver_shader); - if (st->missing_textures) { /* use a pass-through frag shader that uses no textures */ void *fs = get_passthrough_fs(st); @@ -362,16 +178,48 @@ update_linkage( struct st_context *st ) else { cso_set_fragment_shader_handle(st->cso_context, stfp->driver_shader); } +} + +const struct st_tracked_state st_update_fp = { + "st_update_fp", /* name */ + { /* dirty */ + 0, /* mesa */ + ST_NEW_FRAGMENT_PROGRAM /* st */ + }, + update_fp /* update */ +}; + + + + +static void +update_vp( struct st_context *st ) +{ + struct st_vertex_program *stvp; + + /* find active shader and params -- Should be covered by + * ST_NEW_VERTEX_PROGRAM + */ + assert(st->ctx->VertexProgram._Current); + stvp = st_vertex_program(st->ctx->VertexProgram._Current); + assert(stvp->Base.Base.Target == GL_VERTEX_PROGRAM_ARB); + + st->vp_varient = find_translated_vp(st, stvp); + + st_reference_vertprog(st, &st->vp, stvp); + + cso_set_vertex_shader_handle(st->cso_context, + st->vp_varient->driver_shader); - st->vertex_result_to_slot = xvp->output_to_slot; + st->vertex_result_to_slot = stvp->result_to_output; } -const struct st_tracked_state st_update_shader = { - "st_update_shader", /* name */ +const struct st_tracked_state st_update_vp = { + "st_update_vp", /* name */ { /* dirty */ 0, /* mesa */ - ST_NEW_VERTEX_PROGRAM | ST_NEW_FRAGMENT_PROGRAM /* st */ + ST_NEW_VERTEX_PROGRAM /* st */ }, - update_linkage /* update */ + update_vp /* update */ }; diff --git a/src/mesa/state_tracker/st_atom_texture.c b/src/mesa/state_tracker/st_atom_texture.c index 4d4f97da7e..0b68447d21 100644 --- a/src/mesa/state_tracker/st_atom_texture.c +++ b/src/mesa/state_tracker/st_atom_texture.c @@ -32,6 +32,8 @@ */ +#include "main/macros.h" + #include "st_context.h" #include "st_atom.h" #include "st_texture.h" @@ -99,6 +101,12 @@ update_textures(struct st_context *st) cso_set_sampler_textures(st->cso_context, st->state.num_textures, st->state.sampler_texture); + if (st->ctx->Const.MaxVertexTextureImageUnits > 0) { + cso_set_vertex_sampler_textures(st->cso_context, + MIN2(st->state.num_textures, + st->ctx->Const.MaxVertexTextureImageUnits), + st->state.sampler_texture); + } } diff --git a/src/mesa/state_tracker/st_cb_bitmap.c b/src/mesa/state_tracker/st_cb_bitmap.c index 1960d171bf..1bdeaccda3 100644 --- a/src/mesa/state_tracker/st_cb_bitmap.c +++ b/src/mesa/state_tracker/st_cb_bitmap.c @@ -169,11 +169,6 @@ make_bitmap_fragment_program(GLcontext *ctx, GLuint samplerIndex) stfp = (struct st_fragment_program *) p; stfp->Base.UsesKill = GL_TRUE; - /* No need to send this incomplete program down to hardware: - * - * st_translate_fragment_program(ctx->st, stfp, NULL); - */ - return stfp; } diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c b/src/mesa/state_tracker/st_cb_drawpixels.c index 1d33e81c2c..1baff19040 100644 --- a/src/mesa/state_tracker/st_cb_drawpixels.c +++ b/src/mesa/state_tracker/st_cb_drawpixels.c @@ -60,6 +60,7 @@ #include "pipe/p_context.h" #include "pipe/p_defines.h" #include "pipe/p_inlines.h" +#include "tgsi/tgsi_ureg.h" #include "util/u_tile.h" #include "util/u_draw_quad.h" #include "util/u_math.h" @@ -236,78 +237,41 @@ make_fragment_shader_z(struct st_context *st) * Create a simple vertex shader that just passes through the * vertex position and texcoord (and optionally, color). */ -static struct st_vertex_program * -st_make_passthrough_vertex_shader(struct st_context *st, GLboolean passColor) +static void * +st_make_passthrough_vertex_shader(struct st_context *st, + GLboolean passColor) { - GLcontext *ctx = st->ctx; - struct st_vertex_program *stvp; - struct gl_program *p; - GLuint ic = 0; - - if (st->drawpix.vert_shaders[passColor]) - return st->drawpix.vert_shaders[passColor]; - - /* - * Create shader now - */ - p = ctx->Driver.NewProgram(ctx, GL_VERTEX_PROGRAM_ARB, 0); - if (!p) - return NULL; - - if (passColor) - p->NumInstructions = 4; - else - p->NumInstructions = 3; - - p->Instructions = _mesa_alloc_instructions(p->NumInstructions); - if (!p->Instructions) { - ctx->Driver.DeleteProgram(ctx, p); - return NULL; - } - _mesa_init_instructions(p->Instructions, p->NumInstructions); - /* MOV result.pos, vertex.pos; */ - p->Instructions[0].Opcode = OPCODE_MOV; - p->Instructions[0].DstReg.File = PROGRAM_OUTPUT; - p->Instructions[0].DstReg.Index = VERT_RESULT_HPOS; - p->Instructions[0].SrcReg[0].File = PROGRAM_INPUT; - p->Instructions[0].SrcReg[0].Index = VERT_ATTRIB_POS; - /* MOV result.texcoord0, vertex.texcoord0; */ - p->Instructions[1].Opcode = OPCODE_MOV; - p->Instructions[1].DstReg.File = PROGRAM_OUTPUT; - p->Instructions[1].DstReg.Index = VERT_RESULT_TEX0; - p->Instructions[1].SrcReg[0].File = PROGRAM_INPUT; - p->Instructions[1].SrcReg[0].Index = VERT_ATTRIB_TEX0; - ic = 2; - if (passColor) { - /* MOV result.color0, vertex.color0; */ - p->Instructions[ic].Opcode = OPCODE_MOV; - p->Instructions[ic].DstReg.File = PROGRAM_OUTPUT; - p->Instructions[ic].DstReg.Index = VERT_RESULT_COL0; - p->Instructions[ic].SrcReg[0].File = PROGRAM_INPUT; - p->Instructions[ic].SrcReg[0].Index = VERT_ATTRIB_COLOR0; - ic++; - } - - /* END; */ - p->Instructions[ic].Opcode = OPCODE_END; - ic++; - - assert(ic == p->NumInstructions); + if (!st->drawpix.vert_shaders[passColor]) { + struct ureg_program *ureg = + ureg_create( TGSI_PROCESSOR_VERTEX ); + + if (ureg == NULL) + return NULL; + + /* MOV result.pos, vertex.pos; */ + ureg_MOV(ureg, + ureg_DECL_output( ureg, TGSI_SEMANTIC_POSITION, 0 ), + ureg_DECL_vs_input( ureg, 0 )); + + /* MOV result.texcoord0, vertex.texcoord0; */ + ureg_MOV(ureg, + ureg_DECL_output( ureg, TGSI_SEMANTIC_GENERIC, 0 ), + ureg_DECL_vs_input( ureg, 1 )); + + if (passColor) { + /* MOV result.color0, vertex.color0; */ + ureg_MOV(ureg, + ureg_DECL_output( ureg, TGSI_SEMANTIC_COLOR, 0 ), + ureg_DECL_vs_input( ureg, 2 )); + } - p->InputsRead = VERT_BIT_POS | VERT_BIT_TEX0; - p->OutputsWritten = ((1 << VERT_RESULT_TEX0) | - (1 << VERT_RESULT_HPOS)); - if (passColor) { - p->InputsRead |= VERT_BIT_COLOR0; - p->OutputsWritten |= (1 << VERT_RESULT_COL0); + ureg_END( ureg ); + + st->drawpix.vert_shaders[passColor] = + ureg_create_shader_and_destroy( ureg, st->pipe ); } - stvp = (struct st_vertex_program *) p; - st_translate_vertex_program(st, stvp, NULL, NULL, NULL); - - st->drawpix.vert_shaders[passColor] = stvp; - - return stvp; + return st->drawpix.vert_shaders[passColor]; } @@ -539,8 +503,8 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z, GLsizei width, GLsizei height, GLfloat zoomX, GLfloat zoomY, struct pipe_texture *pt, - struct st_vertex_program *stvp, - struct st_fragment_program *stfp, + void *driver_vp, + void *driver_fp, const GLfloat *color, GLboolean invertTex) { @@ -575,10 +539,10 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z, } /* fragment shader state: TEX lookup program */ - cso_set_fragment_shader_handle(cso, stfp->driver_shader); + cso_set_fragment_shader_handle(cso, driver_fp); /* vertex shader state: position + texcoord pass-through */ - cso_set_vertex_shader_handle(cso, stvp->driver_shader); + cso_set_vertex_shader_handle(cso, driver_vp); /* texture sampling state: */ @@ -621,10 +585,10 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z, struct pipe_texture *textures[2]; textures[0] = pt; textures[1] = st->pixel_xfer.pixelmap_texture; - pipe->set_sampler_textures(pipe, 2, textures); + pipe->set_fragment_sampler_textures(pipe, 2, textures); } else { - pipe->set_sampler_textures(pipe, 1, &pt); + pipe->set_fragment_sampler_textures(pipe, 1, &pt); } /* Compute window coords (y=0=bottom) with pixel zoom. @@ -637,8 +601,8 @@ draw_textured_quad(GLcontext *ctx, GLint x, GLint y, GLfloat z, y1 = y + height * ctx->Pixel.ZoomY; draw_quad(ctx, x0, y0, z, x1, y1, color, invertTex, - (GLfloat) width / pt->width[0], - (GLfloat) height / pt->height[0]); + (GLfloat) width / pt->width0, + (GLfloat) height / pt->height0); /* restore state */ cso_restore_rasterizer(cso); @@ -737,7 +701,7 @@ draw_stencil_pixels(GLcontext *ctx, GLint x, GLint y, } /* now pack the stencil (and Z) values in the dest format */ - switch (pt->format) { + switch (pt->texture->format) { case PIPE_FORMAT_S8_UNORM: { ubyte *dest = stmap + spanY * pt->stride + spanX; @@ -806,7 +770,7 @@ st_DrawPixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, const struct gl_pixelstore_attrib *unpack, const GLvoid *pixels) { struct st_fragment_program *stfp; - struct st_vertex_program *stvp; + void *driver_vp; struct st_context *st = st_context(ctx); struct pipe_surface *ps; const GLfloat *color; @@ -826,13 +790,13 @@ st_DrawPixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, if (format == GL_DEPTH_COMPONENT) { ps = st->state.framebuffer.zsbuf; stfp = make_fragment_shader_z(st); - stvp = st_make_passthrough_vertex_shader(st, GL_TRUE); + driver_vp = st_make_passthrough_vertex_shader(st, GL_TRUE); color = ctx->Current.RasterColor; } else { ps = st->state.framebuffer.cbufs[0]; stfp = combined_drawpix_fragment_program(ctx); - stvp = st_make_passthrough_vertex_shader(st, GL_FALSE); + driver_vp = st_make_passthrough_vertex_shader(st, GL_FALSE); color = NULL; } @@ -843,7 +807,10 @@ st_DrawPixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, if (pt) { draw_textured_quad(ctx, x, y, ctx->Current.RasterPos[2], width, height, ctx->Pixel.ZoomX, ctx->Pixel.ZoomY, - pt, stvp, stfp, color, GL_FALSE); + pt, + driver_vp, + stfp->driver_shader, + color, GL_FALSE); pipe_texture_reference(&pt, NULL); } } @@ -889,8 +856,8 @@ copy_stencil_pixels(GLcontext *ctx, GLint srcx, GLint srcy, usage, dstx, dsty, width, height); - assert(ptDraw->block.width == 1); - assert(ptDraw->block.height == 1); + assert(pf_get_blockwidth(ptDraw->texture->format) == 1); + assert(pf_get_blockheight(ptDraw->texture->format) == 1); /* map the stencil buffer */ drawMap = screen->transfer_map(screen, ptDraw); @@ -911,7 +878,7 @@ copy_stencil_pixels(GLcontext *ctx, GLint srcx, GLint srcy, dst = drawMap + y * ptDraw->stride; src = buffer + i * width; - switch (ptDraw->format) { + switch (ptDraw->texture->format) { case PIPE_FORMAT_S8Z24_UNORM: { uint *dst4 = (uint *) dst; @@ -960,7 +927,7 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy, struct pipe_context *pipe = st->pipe; struct pipe_screen *screen = pipe->screen; struct st_renderbuffer *rbRead; - struct st_vertex_program *stvp; + void *driver_vp; struct st_fragment_program *stfp; struct pipe_texture *pt; GLfloat *color; @@ -1009,14 +976,14 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy, rbRead = st_get_color_read_renderbuffer(ctx); color = NULL; stfp = combined_drawpix_fragment_program(ctx); - stvp = st_make_passthrough_vertex_shader(st, GL_FALSE); + driver_vp = st_make_passthrough_vertex_shader(st, GL_FALSE); } else { assert(type == GL_DEPTH); rbRead = st_renderbuffer(ctx->ReadBuffer->_DepthBuffer); color = ctx->Current.Attrib[VERT_ATTRIB_COLOR0]; stfp = make_fragment_shader_z(st); - stvp = st_make_passthrough_vertex_shader(st, GL_TRUE); + driver_vp = st_make_passthrough_vertex_shader(st, GL_TRUE); } srcFormat = rbRead->texture->format; @@ -1148,7 +1115,10 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy, /* draw textured quad */ draw_textured_quad(ctx, dstx, dsty, ctx->Current.RasterPos[2], width, height, ctx->Pixel.ZoomX, ctx->Pixel.ZoomY, - pt, stvp, stfp, color, GL_TRUE); + pt, + driver_vp, + stfp->driver_shader, + color, GL_TRUE); pipe_texture_reference(&pt, NULL); } diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c index 65ce12ccd4..ead8e22888 100644 --- a/src/mesa/state_tracker/st_cb_fbo.c +++ b/src/mesa/state_tracker/st_cb_fbo.c @@ -98,16 +98,14 @@ st_renderbuffer_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb, strb->defined = GL_FALSE; /* undefined contents now */ if(strb->software) { - struct pipe_format_block block; size_t size; _mesa_free(strb->data); assert(strb->format != PIPE_FORMAT_NONE); - pf_get_block(strb->format, &block); - strb->stride = pf_get_stride(&block, width); - size = pf_get_2d_size(&block, strb->stride, height); + strb->stride = pf_get_stride(strb->format, width); + size = pf_get_2d_size(strb->format, strb->stride, height); strb->data = _mesa_malloc(size); @@ -127,10 +125,9 @@ st_renderbuffer_alloc_storage(GLcontext * ctx, struct gl_renderbuffer *rb, memset(&template, 0, sizeof(template)); template.target = PIPE_TEXTURE_2D; template.format = format; - pf_get_block(format, &template.block); - template.width[0] = width; - template.height[0] = height; - template.depth[0] = 1; + template.width0 = width; + template.height0 = height; + template.depth0 = 1; template.last_level = 0; template.nr_samples = rb->NumSamples; if (pf_is_depth_stencil(format)) { @@ -376,7 +373,7 @@ st_render_texture(GLcontext *ctx, rb->_BaseFormat = texImage->_BaseFormat; /*printf("***** render to texture level %d: %d x %d\n", att->TextureLevel, rb->Width, rb->Height);*/ - /*printf("***** pipe texture %d x %d\n", pt->width[0], pt->height[0]);*/ + /*printf("***** pipe texture %d x %d\n", pt->width0, pt->height0);*/ pipe_texture_reference( &strb->texture, pt ); diff --git a/src/mesa/state_tracker/st_cb_program.c b/src/mesa/state_tracker/st_cb_program.c index b2d5c39a3a..8c276f8128 100644 --- a/src/mesa/state_tracker/st_cb_program.c +++ b/src/mesa/state_tracker/st_cb_program.c @@ -138,24 +138,7 @@ st_delete_program(GLcontext *ctx, struct gl_program *prog) case GL_VERTEX_PROGRAM_ARB: { struct st_vertex_program *stvp = (struct st_vertex_program *) prog; - - if (stvp->driver_shader) { - cso_delete_vertex_shader(st->cso_context, stvp->driver_shader); - stvp->driver_shader = NULL; - } - - if (stvp->draw_shader) { -#if FEATURE_feedback || FEATURE_drawpix - /* this would only have been allocated for the RasterPos path */ - draw_delete_vertex_shader(st->draw, stvp->draw_shader); - stvp->draw_shader = NULL; -#endif - } - - if (stvp->state.tokens) { - st_free_tokens(stvp->state.tokens); - stvp->state.tokens = NULL; - } + st_vp_release_varients( st, stvp ); } break; case GL_FRAGMENT_PROGRAM_ARB: @@ -177,8 +160,6 @@ st_delete_program(GLcontext *ctx, struct gl_program *prog) _mesa_reference_program(ctx, &prg, NULL); stfp->bitmap_program = NULL; } - - st_free_translated_vertex_programs(st, stfp->vertex_programs); } break; default: @@ -219,8 +200,6 @@ static void st_program_string_notify( GLcontext *ctx, stfp->state.tokens = NULL; } - stfp->param_state = stfp->Base.Base.Parameters->StateFlags; - if (st->fp == stfp) st->dirty.st |= ST_NEW_FRAGMENT_PROGRAM; } @@ -229,25 +208,7 @@ static void st_program_string_notify( GLcontext *ctx, stvp->serialNo++; - if (stvp->driver_shader) { - cso_delete_vertex_shader(st->cso_context, stvp->driver_shader); - stvp->driver_shader = NULL; - } - - if (stvp->draw_shader) { -#if FEATURE_feedback || FEATURE_drawpix - /* this would only have been allocated for the RasterPos path */ - draw_delete_vertex_shader(st->draw, stvp->draw_shader); - stvp->draw_shader = NULL; -#endif - } - - if (stvp->state.tokens) { - st_free_tokens(stvp->state.tokens); - stvp->state.tokens = NULL; - } - - stvp->param_state = stvp->Base.Base.Parameters->StateFlags; + st_vp_release_varients( st, stvp ); if (st->vp == stvp) st->dirty.st |= ST_NEW_VERTEX_PROGRAM; diff --git a/src/mesa/state_tracker/st_cb_readpixels.c b/src/mesa/state_tracker/st_cb_readpixels.c index 772bb3bb69..6fa7bb64f2 100644 --- a/src/mesa/state_tracker/st_cb_readpixels.c +++ b/src/mesa/state_tracker/st_cb_readpixels.c @@ -103,7 +103,7 @@ st_read_stencil_pixels(GLcontext *ctx, GLint x, GLint y, } /* get stencil (and Z) values */ - switch (pt->format) { + switch (pt->texture->format) { case PIPE_FORMAT_S8_UNORM: { const ubyte *src = stmap + srcY * pt->stride; @@ -243,7 +243,7 @@ st_fast_readpixels(GLcontext *ctx, struct st_renderbuffer *strb, GLint row, col, dy, dstStride; if (st_fb_orientation(ctx->ReadBuffer) == Y_0_TOP) { - y = strb->texture->height[0] - y - height; + y = strb->texture->height0 - y - height; } trans = st_cond_flush_get_tex_transfer(st_context(ctx), strb->texture, @@ -431,8 +431,8 @@ st_readpixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, const GLint dstStride = _mesa_image_row_stride(&clippedPacking, width, format, type); - if (trans->format == PIPE_FORMAT_S8Z24_UNORM || - trans->format == PIPE_FORMAT_X8Z24_UNORM) { + if (trans->texture->format == PIPE_FORMAT_S8Z24_UNORM || + trans->texture->format == PIPE_FORMAT_X8Z24_UNORM) { if (format == GL_DEPTH_COMPONENT) { for (i = 0; i < height; i++) { GLuint ztemp[MAX_WIDTH]; @@ -463,8 +463,8 @@ st_readpixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, } } } - else if (trans->format == PIPE_FORMAT_Z24S8_UNORM || - trans->format == PIPE_FORMAT_Z24X8_UNORM) { + else if (trans->texture->format == PIPE_FORMAT_Z24S8_UNORM || + trans->texture->format == PIPE_FORMAT_Z24X8_UNORM) { if (format == GL_DEPTH_COMPONENT) { for (i = 0; i < height; i++) { GLuint ztemp[MAX_WIDTH]; @@ -490,7 +490,7 @@ st_readpixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, } } } - else if (trans->format == PIPE_FORMAT_Z16_UNORM) { + else if (trans->texture->format == PIPE_FORMAT_Z16_UNORM) { for (i = 0; i < height; i++) { GLushort ztemp[MAX_WIDTH]; GLfloat zfloat[MAX_WIDTH]; @@ -505,7 +505,7 @@ st_readpixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, dst += dstStride; } } - else if (trans->format == PIPE_FORMAT_Z32_UNORM) { + else if (trans->texture->format == PIPE_FORMAT_Z32_UNORM) { for (i = 0; i < height; i++) { GLuint ztemp[MAX_WIDTH]; GLfloat zfloat[MAX_WIDTH]; diff --git a/src/mesa/state_tracker/st_cb_texture.c b/src/mesa/state_tracker/st_cb_texture.c index d4630a514f..6d136f5abf 100644 --- a/src/mesa/state_tracker/st_cb_texture.c +++ b/src/mesa/state_tracker/st_cb_texture.c @@ -405,10 +405,9 @@ compress_with_blit(GLcontext * ctx, memset(&templ, 0, sizeof(templ)); templ.target = PIPE_TEXTURE_2D; templ.format = st_mesa_format_to_pipe_format(mesa_format); - pf_get_block(templ.format, &templ.block); - templ.width[0] = width; - templ.height[0] = height; - templ.depth[0] = 1; + templ.width0 = width; + templ.height0 = height; + templ.depth0 = 1; templ.last_level = 0; templ.tex_usage = PIPE_TEXTURE_USAGE_SAMPLER; src_tex = screen->texture_create(screen, &templ); @@ -833,7 +832,7 @@ decompress_with_blit(GLcontext * ctx, GLenum target, GLint level, /* copy/pack data into user buffer */ if (st_equal_formats(stImage->pt->format, format, type)) { /* memcpy */ - const uint bytesPerRow = width * pf_get_size(stImage->pt->format); + const uint bytesPerRow = width * pf_get_blocksize(stImage->pt->format); ubyte *map = screen->transfer_map(screen, tex_xfer); GLuint row; for (row = 0; row < height; row++) { @@ -915,7 +914,7 @@ st_get_tex_image(GLcontext * ctx, GLenum target, GLint level, PIPE_TRANSFER_READ, 0, 0, stImage->base.Width, stImage->base.Height); - texImage->RowStride = stImage->transfer->stride / stImage->pt->block.size; + texImage->RowStride = stImage->transfer->stride / pf_get_blocksize(stImage->pt->format); } else { /* Otherwise, the image should actually be stored in @@ -1163,10 +1162,10 @@ st_CompressedTexSubImage2D(GLcontext *ctx, GLenum target, GLint level, struct gl_texture_image *texImage) { struct st_texture_image *stImage = st_texture_image(texImage); - struct pipe_format_block block; int srcBlockStride; int dstBlockStride; int y; + enum pipe_format pformat= stImage->pt->format; if (stImage->pt) { unsigned face = _mesa_tex_target_to_face(target); @@ -1178,8 +1177,7 @@ st_CompressedTexSubImage2D(GLcontext *ctx, GLenum target, GLint level, xoffset, yoffset, width, height); - block = stImage->pt->block; - srcBlockStride = pf_get_stride(&block, width); + srcBlockStride = pf_get_stride(pformat, width); dstBlockStride = stImage->transfer->stride; } else { assert(stImage->pt); @@ -1193,16 +1191,16 @@ st_CompressedTexSubImage2D(GLcontext *ctx, GLenum target, GLint level, return; } - assert(xoffset % block.width == 0); - assert(yoffset % block.height == 0); - assert(width % block.width == 0); - assert(height % block.height == 0); + assert(xoffset % pf_get_blockwidth(pformat) == 0); + assert(yoffset % pf_get_blockheight(pformat) == 0); + assert(width % pf_get_blockwidth(pformat) == 0); + assert(height % pf_get_blockheight(pformat) == 0); - for (y = 0; y < height; y += block.height) { + for (y = 0; y < height; y += pf_get_blockheight(pformat)) { /* don't need to adjust for xoffset and yoffset as st_texture_image_map does that */ - const char *src = (const char*)data + srcBlockStride * pf_get_nblocksy(&block, y); - char *dst = (char*)texImage->Data + dstBlockStride * pf_get_nblocksy(&block, y); - memcpy(dst, src, pf_get_stride(&block, width)); + const char *src = (const char*)data + srcBlockStride * pf_get_nblocksy(pformat, y); + char *dst = (char*)texImage->Data + dstBlockStride * pf_get_nblocksy(pformat, y); + memcpy(dst, src, pf_get_stride(pformat, width)); } if (stImage->pt) { @@ -1692,10 +1690,10 @@ copy_image_data_to_texture(struct st_context *st, dstLevel, stImage->base.Data, stImage->base.RowStride * - stObj->pt->block.size, + pf_get_blocksize(stObj->pt->format), stImage->base.RowStride * stImage->base.Height * - stObj->pt->block.size); + pf_get_blocksize(stObj->pt->format)); _mesa_align_free(stImage->base.Data); stImage->base.Data = NULL; } @@ -1761,10 +1759,9 @@ st_finalize_texture(GLcontext *ctx, if (stObj->pt->target != gl_target_to_pipe(stObj->base.Target) || stObj->pt->format != fmt || stObj->pt->last_level < stObj->lastLevel || - stObj->pt->width[0] != firstImage->base.Width2 || - stObj->pt->height[0] != firstImage->base.Height2 || - stObj->pt->depth[0] != firstImage->base.Depth2 || - stObj->pt->block.size != blockSize) + stObj->pt->width0 != firstImage->base.Width2 || + stObj->pt->height0 != firstImage->base.Height2 || + stObj->pt->depth0 != firstImage->base.Depth2) { pipe_texture_reference(&stObj->pt, NULL); ctx->st->dirty.st |= ST_NEW_FRAMEBUFFER; diff --git a/src/mesa/state_tracker/st_context.h b/src/mesa/state_tracker/st_context.h index 18adb35e87..b760728658 100644 --- a/src/mesa/state_tracker/st_context.h +++ b/src/mesa/state_tracker/st_context.h @@ -127,6 +127,8 @@ struct st_context struct st_vertex_program *vp; /**< Currently bound vertex program */ struct st_fragment_program *fp; /**< Currently bound fragment program */ + struct st_vp_varient *vp_varient; + struct gl_texture_object *default_texture; struct { diff --git a/src/mesa/state_tracker/st_debug.c b/src/mesa/state_tracker/st_debug.c index 3009cde9d5..6e699ca552 100644 --- a/src/mesa/state_tracker/st_debug.c +++ b/src/mesa/state_tracker/st_debug.c @@ -86,7 +86,8 @@ st_print_current(void) } #endif - tgsi_dump( st->vp->state.tokens, 0 ); + if (st->vp->varients) + tgsi_dump( st->vp->varients[0].state.tokens, 0 ); if (st->vp->Base.Base.Parameters) _mesa_print_parameter_list(st->vp->Base.Base.Parameters); diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c index 68bc76b572..e13ae57a0e 100644 --- a/src/mesa/state_tracker/st_draw.c +++ b/src/mesa/state_tracker/st_draw.c @@ -573,7 +573,7 @@ st_draw_vbo(GLcontext *ctx, /* must get these after state validation! */ vp = ctx->st->vp; - vs = &ctx->st->vp->state; + vs = &ctx->st->vp_varient->state; #if 0 if (MESA_VERBOSE & VERBOSE_GLSL) { diff --git a/src/mesa/state_tracker/st_draw_feedback.c b/src/mesa/state_tracker/st_draw_feedback.c index b2d682ef64..d793f820bc 100644 --- a/src/mesa/state_tracker/st_draw_feedback.c +++ b/src/mesa/state_tracker/st_draw_feedback.c @@ -120,10 +120,10 @@ st_feedback_draw_vbo(GLcontext *ctx, /* must get these after state validation! */ vp = ctx->st->vp; - vs = &st->vp->state; + vs = &st->vp_varient->state; - if (!st->vp->draw_shader) { - st->vp->draw_shader = draw_create_vertex_shader(draw, vs); + if (!st->vp_varient->draw_shader) { + st->vp_varient->draw_shader = draw_create_vertex_shader(draw, vs); } /* @@ -136,7 +136,7 @@ st_feedback_draw_vbo(GLcontext *ctx, draw_set_viewport_state(draw, &st->state.viewport); draw_set_clip_state(draw, &st->state.clip); draw_set_rasterizer_state(draw, &st->state.rasterizer); - draw_bind_vertex_shader(draw, st->vp->draw_shader); + draw_bind_vertex_shader(draw, st->vp_varient->draw_shader); set_feedback_vertex_format(ctx); /* loop over TGSI shader inputs to determine vertex buffer diff --git a/src/mesa/state_tracker/st_extensions.c b/src/mesa/state_tracker/st_extensions.c index 57fe72d76a..ef3cbc53ee 100644 --- a/src/mesa/state_tracker/st_extensions.c +++ b/src/mesa/state_tracker/st_extensions.c @@ -92,6 +92,10 @@ void st_init_limits(struct st_context *st) = _min(screen->get_param(screen, PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS), MAX_VERTEX_TEXTURE_IMAGE_UNITS); + c->MaxCombinedTextureImageUnits + = _min(screen->get_param(screen, PIPE_CAP_MAX_COMBINED_SAMPLERS), + MAX_COMBINED_TEXTURE_IMAGE_UNITS); + c->MaxTextureCoordUnits = _min(c->MaxTextureImageUnits, MAX_TEXTURE_COORD_UNITS); diff --git a/src/mesa/state_tracker/st_format.c b/src/mesa/state_tracker/st_format.c index 02f80057c2..93125afe9e 100644 --- a/src/mesa/state_tracker/st_format.c +++ b/src/mesa/state_tracker/st_format.c @@ -389,6 +389,33 @@ default_rgba_format(struct pipe_screen *screen, } /** + * Find an RGB format supported by the context/winsys. + */ +static enum pipe_format +default_rgb_format(struct pipe_screen *screen, + enum pipe_texture_target target, + unsigned tex_usage, + unsigned geom_flags) +{ + static const enum pipe_format colorFormats[] = { + PIPE_FORMAT_X8R8G8B8_UNORM, + PIPE_FORMAT_B8G8R8X8_UNORM, + PIPE_FORMAT_R8G8B8X8_UNORM, + PIPE_FORMAT_A8R8G8B8_UNORM, + PIPE_FORMAT_B8G8R8A8_UNORM, + PIPE_FORMAT_R8G8B8A8_UNORM, + PIPE_FORMAT_R5G6B5_UNORM + }; + uint i; + for (i = 0; i < Elements(colorFormats); i++) { + if (screen->is_format_supported( screen, colorFormats[i], target, tex_usage, geom_flags )) { + return colorFormats[i]; + } + } + return PIPE_FORMAT_NONE; +} + +/** * Find an sRGBA format supported by the context/winsys. */ static enum pipe_format @@ -472,13 +499,14 @@ st_choose_format(struct pipe_screen *screen, GLenum internalFormat, case 4: case GL_RGBA: case GL_COMPRESSED_RGBA: - case 3: - case GL_RGB: - case GL_COMPRESSED_RGB: case GL_RGBA8: case GL_RGB10_A2: case GL_RGBA12: return default_rgba_format( screen, target, tex_usage, geom_flags ); + case 3: + case GL_RGB: + case GL_COMPRESSED_RGB: + return default_rgb_format( screen, target, tex_usage, geom_flags ); case GL_RGBA16: if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) return default_deep_rgba_format( screen, target, tex_usage, geom_flags ); @@ -500,7 +528,7 @@ st_choose_format(struct pipe_screen *screen, GLenum internalFormat, case GL_RGB10: case GL_RGB12: case GL_RGB16: - return default_rgba_format( screen, target, tex_usage, geom_flags ); + return default_rgb_format( screen, target, tex_usage, geom_flags ); case GL_RGB5: case GL_RGB4: diff --git a/src/mesa/state_tracker/st_gen_mipmap.c b/src/mesa/state_tracker/st_gen_mipmap.c index 16ca2771b0..7700551830 100644 --- a/src/mesa/state_tracker/st_gen_mipmap.c +++ b/src/mesa/state_tracker/st_gen_mipmap.c @@ -38,6 +38,7 @@ #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "util/u_gen_mipmap.h" +#include "util/u_math.h" #include "cso_cache/cso_cache.h" #include "cso_cache/cso_context.h" @@ -133,29 +134,33 @@ fallback_generate_mipmap(GLcontext *ctx, GLenum target, srcTrans = st_cond_flush_get_tex_transfer(st_context(ctx), pt, face, srcLevel, zslice, PIPE_TRANSFER_READ, 0, 0, - pt->width[srcLevel], - pt->height[srcLevel]); + u_minify(pt->width0, srcLevel), + u_minify(pt->height0, srcLevel)); dstTrans = st_cond_flush_get_tex_transfer(st_context(ctx), pt, face, dstLevel, zslice, PIPE_TRANSFER_WRITE, 0, 0, - pt->width[dstLevel], - pt->height[dstLevel]); + u_minify(pt->width0, dstLevel), + u_minify(pt->height0, dstLevel)); srcData = (ubyte *) screen->transfer_map(screen, srcTrans); dstData = (ubyte *) screen->transfer_map(screen, dstTrans); - srcStride = srcTrans->stride / srcTrans->block.size; - dstStride = dstTrans->stride / dstTrans->block.size; + srcStride = srcTrans->stride / pf_get_blocksize(srcTrans->texture->format); + dstStride = dstTrans->stride / pf_get_blocksize(dstTrans->texture->format); _mesa_generate_mipmap_level(target, datatype, comps, - 0 /*border*/, - pt->width[srcLevel], pt->height[srcLevel], pt->depth[srcLevel], - srcData, - srcStride, /* stride in texels */ - pt->width[dstLevel], pt->height[dstLevel], pt->depth[dstLevel], - dstData, - dstStride); /* stride in texels */ + 0 /*border*/, + u_minify(pt->width0, srcLevel), + u_minify(pt->height0, srcLevel), + u_minify(pt->depth0, srcLevel), + srcData, + srcStride, /* stride in texels */ + u_minify(pt->width0, dstLevel), + u_minify(pt->height0, dstLevel), + u_minify(pt->depth0, dstLevel), + dstData, + dstStride); /* stride in texels */ screen->transfer_unmap(screen, srcTrans); screen->transfer_unmap(screen, dstTrans); @@ -232,9 +237,9 @@ st_generate_mipmap(GLcontext *ctx, GLenum target, oldTex->target, oldTex->format, lastLevel, - oldTex->width[0], - oldTex->height[0], - oldTex->depth[0], + oldTex->width0, + oldTex->height0, + oldTex->depth0, oldTex->tex_usage); /* The texture isn't in a "complete" state yet so set the expected @@ -269,9 +274,9 @@ st_generate_mipmap(GLcontext *ctx, GLenum target, = _mesa_get_tex_image(ctx, texObj, target, srcLevel); struct gl_texture_image *dstImage; struct st_texture_image *stImage; - uint dstWidth = pt->width[dstLevel]; - uint dstHeight = pt->height[dstLevel]; - uint dstDepth = pt->depth[dstLevel]; + uint dstWidth = u_minify(pt->width0, dstLevel); + uint dstHeight = u_minify(pt->height0, dstLevel); + uint dstDepth = u_minify(pt->depth0, dstLevel); uint border = srcImage->Border; dstImage = _mesa_get_tex_image(ctx, texObj, target, dstLevel); diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index bd94c9d79e..1611d53e2f 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -396,6 +396,23 @@ static void emit_swz( struct st_translate *t, } +/** + * Negate the value of DDY to match GL semantics where (0,0) is the + * lower-left corner of the window. + * Note that the GL_ARB_fragment_coord_conventions extension will + * effect this someday. + */ +static void emit_ddy( struct st_translate *t, + struct ureg_dst dst, + const struct prog_src_register *SrcReg ) +{ + struct ureg_program *ureg = t->ureg; + struct ureg_src src = translate_src( t, SrcReg ); + src = ureg_negate( src ); + ureg_DDY( ureg, dst, src ); +} + + static unsigned translate_opcode( unsigned op ) @@ -619,7 +636,9 @@ compile_instruction( ureg_MOV( ureg, dst[0], ureg_imm1f(ureg, 0.5) ); break; - + case OPCODE_DDY: + emit_ddy( t, dst[0], &inst->SrcReg[0] ); + break; default: ureg_insn( ureg, @@ -676,6 +695,31 @@ emit_inverted_wpos( struct st_translate *t, /** + * OpenGL's fragment gl_FrontFace input is 1 for front-facing, 0 for back. + * TGSI uses +1 for front, -1 for back. + * This function converts the TGSI value to the GL value. Simply clamping/ + * saturating the value to [0,1] does the job. + */ +static void +emit_face_var( struct st_translate *t, + const struct gl_program *program ) +{ + struct ureg_program *ureg = t->ureg; + struct ureg_dst face_temp = ureg_DECL_temporary( ureg ); + struct ureg_src face_input = t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]]; + + /* MOV_SAT face_temp, input[face] + */ + face_temp = ureg_saturate( face_temp ); + ureg_MOV( ureg, face_temp, face_input ); + + /* Use face_temp as face input from here on: + */ + t->inputs[t->inputMapping[FRAG_ATTRIB_FACE]] = ureg_src(face_temp); +} + + +/** * Translate Mesa program to TGSI format. * \param program the program to translate * \param numInputs number of input registers used @@ -704,12 +748,10 @@ st_translate_mesa_program( const ubyte inputSemanticName[], const ubyte inputSemanticIndex[], const GLuint interpMode[], - const GLbitfield inputFlags[], GLuint numOutputs, const GLuint outputMapping[], const ubyte outputSemanticName[], - const ubyte outputSemanticIndex[], - const GLbitfield outputFlags[] ) + const ubyte outputSemanticIndex[] ) { struct st_translate translate, *t; struct ureg_program *ureg; @@ -748,6 +790,10 @@ st_translate_mesa_program( emit_inverted_wpos( t, program ); } + if (program->InputsRead & FRAG_BIT_FACE) { + emit_face_var( t, program ); + } + /* * Declare output attributes. */ diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.h b/src/mesa/state_tracker/st_mesa_to_tgsi.h index c0d1ff59e1..dc0362fe79 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.h +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.h @@ -49,12 +49,10 @@ st_translate_mesa_program( const ubyte inputSemanticName[], const ubyte inputSemanticIndex[], const GLuint interpMode[], - const GLbitfield inputFlags[], GLuint numOutputs, const GLuint outputMapping[], const ubyte outputSemanticName[], - const ubyte outputSemanticIndex[], - const GLbitfield outputFlags[] ); + const ubyte outputSemanticIndex[] ); void st_free_tokens(const struct tgsi_token *tokens); diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c index 190b6a5526..5c81a033f9 100644 --- a/src/mesa/state_tracker/st_program.c +++ b/src/mesa/state_tracker/st_program.c @@ -50,6 +50,39 @@ #include "cso_cache/cso_context.h" + +/** + * Clean out any old compilations: + */ +void +st_vp_release_varients( struct st_context *st, + struct st_vertex_program *stvp ) +{ + struct st_vp_varient *vpv; + + for (vpv = stvp->varients; vpv; ) { + struct st_vp_varient *next = vpv->next; + + if (vpv->driver_shader) + cso_delete_vertex_shader(st->cso_context, vpv->driver_shader); + + if (vpv->draw_shader) + draw_delete_vertex_shader( st->draw, vpv->draw_shader ); + + if (vpv->state.tokens) + st_free_tokens(vpv->state.tokens); + + FREE( vpv ); + + vpv = next; + } + + stvp->varients = NULL; +} + + + + /** * Translate a Mesa vertex shader into a TGSI shader. * \param outputMapping to map vertex program output registers (VERT_RESULT_x) @@ -58,31 +91,13 @@ * \return pointer to cached pipe_shader object. */ void -st_translate_vertex_program(struct st_context *st, - struct st_vertex_program *stvp, - const GLuint outputMapping[], - const ubyte *outputSemanticName, - const ubyte *outputSemanticIndex) +st_prepare_vertex_program(struct st_context *st, + struct st_vertex_program *stvp) { - struct pipe_context *pipe = st->pipe; - GLuint defaultOutputMapping[VERT_RESULT_MAX]; - GLuint attr, i; - GLuint num_generic = 0; - - ubyte vs_input_semantic_name[PIPE_MAX_SHADER_INPUTS]; - ubyte vs_input_semantic_index[PIPE_MAX_SHADER_INPUTS]; - uint vs_num_inputs = 0; - - ubyte vs_output_semantic_name[PIPE_MAX_SHADER_OUTPUTS]; - ubyte vs_output_semantic_index[PIPE_MAX_SHADER_OUTPUTS]; - uint vs_num_outputs = 0; - - GLbitfield input_flags[MAX_PROGRAM_INPUTS]; - GLbitfield output_flags[MAX_PROGRAM_OUTPUTS]; + GLuint attr; - /*memset(&vs, 0, sizeof(vs));*/ - memset(input_flags, 0, sizeof(input_flags)); - memset(output_flags, 0, sizeof(output_flags)); + stvp->num_inputs = 0; + stvp->num_outputs = 0; if (stvp->Base.IsPositionInvariant) _mesa_insert_mvp_code(st->ctx, &stvp->Base); @@ -93,162 +108,56 @@ st_translate_vertex_program(struct st_context *st, */ for (attr = 0; attr < VERT_ATTRIB_MAX; attr++) { if (stvp->Base.Base.InputsRead & (1 << attr)) { - const GLuint slot = vs_num_inputs; - - vs_num_inputs++; - - stvp->input_to_index[attr] = slot; - stvp->index_to_input[slot] = attr; - - switch (attr) { - case VERT_ATTRIB_POS: - vs_input_semantic_name[slot] = TGSI_SEMANTIC_POSITION; - vs_input_semantic_index[slot] = 0; - break; - case VERT_ATTRIB_WEIGHT: - /* fall-through */ - case VERT_ATTRIB_NORMAL: - /* just label as a generic */ - vs_input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - vs_input_semantic_index[slot] = 0; - break; - case VERT_ATTRIB_COLOR0: - vs_input_semantic_name[slot] = TGSI_SEMANTIC_COLOR; - vs_input_semantic_index[slot] = 0; - break; - case VERT_ATTRIB_COLOR1: - vs_input_semantic_name[slot] = TGSI_SEMANTIC_COLOR; - vs_input_semantic_index[slot] = 1; - break; - case VERT_ATTRIB_FOG: - vs_input_semantic_name[slot] = TGSI_SEMANTIC_FOG; - vs_input_semantic_index[slot] = 0; - break; - case VERT_ATTRIB_POINT_SIZE: - vs_input_semantic_name[slot] = TGSI_SEMANTIC_PSIZE; - vs_input_semantic_index[slot] = 0; - break; - case VERT_ATTRIB_TEX0: - case VERT_ATTRIB_TEX1: - case VERT_ATTRIB_TEX2: - case VERT_ATTRIB_TEX3: - case VERT_ATTRIB_TEX4: - case VERT_ATTRIB_TEX5: - case VERT_ATTRIB_TEX6: - case VERT_ATTRIB_TEX7: - assert(slot < Elements(vs_input_semantic_name)); - vs_input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - vs_input_semantic_index[slot] = num_generic++; - break; - case VERT_ATTRIB_GENERIC0: - case VERT_ATTRIB_GENERIC1: - case VERT_ATTRIB_GENERIC2: - case VERT_ATTRIB_GENERIC3: - case VERT_ATTRIB_GENERIC4: - case VERT_ATTRIB_GENERIC5: - case VERT_ATTRIB_GENERIC6: - case VERT_ATTRIB_GENERIC7: - case VERT_ATTRIB_GENERIC8: - case VERT_ATTRIB_GENERIC9: - case VERT_ATTRIB_GENERIC10: - case VERT_ATTRIB_GENERIC11: - case VERT_ATTRIB_GENERIC12: - case VERT_ATTRIB_GENERIC13: - case VERT_ATTRIB_GENERIC14: - case VERT_ATTRIB_GENERIC15: - assert(attr < VERT_ATTRIB_MAX); - assert(slot < Elements(vs_input_semantic_name)); - vs_input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - vs_input_semantic_index[slot] = num_generic++; - break; - default: - assert(0); - } - - input_flags[slot] = stvp->Base.Base.InputFlags[attr]; - } - } - -#if 0 - if (outputMapping && outputSemanticName) { - printf("VERT_RESULT written out_slot semantic_name semantic_index\n"); - for (attr = 0; attr < VERT_RESULT_MAX; attr++) { - printf(" %-2d %c %3d %2d %2d\n", - attr, - ((stvp->Base.Base.OutputsWritten & (1 << attr)) ? 'Y' : ' '), - outputMapping[attr], - outputSemanticName[attr], - outputSemanticIndex[attr]); + stvp->input_to_index[attr] = stvp->num_inputs; + stvp->index_to_input[stvp->num_inputs] = attr; + stvp->num_inputs++; } } -#endif - - /* initialize output semantics to defaults */ - for (i = 0; i < PIPE_MAX_SHADER_OUTPUTS; i++) { - assert(i < Elements(vs_output_semantic_name)); - vs_output_semantic_name[i] = TGSI_SEMANTIC_GENERIC; - vs_output_semantic_index[i] = 0; - output_flags[i] = 0x0; - } - num_generic = 0; - /* - * Determine number of outputs, the (default) output register - * mapping and the semantic information for each output. + /* Compute mapping of vertex program outputs to slots. */ for (attr = 0; attr < VERT_RESULT_MAX; attr++) { - if (stvp->Base.Base.OutputsWritten & (1 << attr)) { - GLuint slot; - - /* XXX - * Pass in the fragment program's input's semantic info. - * Use the generic semantic indexes from there, instead of - * guessing below. - */ - - if (outputMapping) { - slot = outputMapping[attr]; - assert(slot != ~0); - } - else { - slot = vs_num_outputs; - vs_num_outputs++; - defaultOutputMapping[attr] = slot; - } + if ((stvp->Base.Base.OutputsWritten & (1 << attr)) == 0) { + stvp->result_to_output[attr] = ~0; + } + else { + unsigned slot = stvp->num_outputs++; + + stvp->result_to_output[attr] = slot; switch (attr) { case VERT_RESULT_HPOS: - assert(slot == 0); - vs_output_semantic_name[slot] = TGSI_SEMANTIC_POSITION; - vs_output_semantic_index[slot] = 0; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_POSITION; + stvp->output_semantic_index[slot] = 0; break; case VERT_RESULT_COL0: - vs_output_semantic_name[slot] = TGSI_SEMANTIC_COLOR; - vs_output_semantic_index[slot] = 0; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_COLOR; + stvp->output_semantic_index[slot] = 0; break; case VERT_RESULT_COL1: - vs_output_semantic_name[slot] = TGSI_SEMANTIC_COLOR; - vs_output_semantic_index[slot] = 1; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_COLOR; + stvp->output_semantic_index[slot] = 1; break; case VERT_RESULT_BFC0: - vs_output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR; - vs_output_semantic_index[slot] = 0; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR; + stvp->output_semantic_index[slot] = 0; break; case VERT_RESULT_BFC1: - vs_output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR; - vs_output_semantic_index[slot] = 1; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_BCOLOR; + stvp->output_semantic_index[slot] = 1; break; case VERT_RESULT_FOGC: - vs_output_semantic_name[slot] = TGSI_SEMANTIC_FOG; - vs_output_semantic_index[slot] = 0; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_FOG; + stvp->output_semantic_index[slot] = 0; break; case VERT_RESULT_PSIZ: - vs_output_semantic_name[slot] = TGSI_SEMANTIC_PSIZE; - vs_output_semantic_index[slot] = 0; + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_PSIZE; + stvp->output_semantic_index[slot] = 0; break; case VERT_RESULT_EDGE: assert(0); break; + case VERT_RESULT_TEX0: case VERT_RESULT_TEX1: case VERT_RESULT_TEX2: @@ -257,92 +166,50 @@ st_translate_vertex_program(struct st_context *st, case VERT_RESULT_TEX5: case VERT_RESULT_TEX6: case VERT_RESULT_TEX7: - /* fall-through */ + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; + stvp->output_semantic_index[slot] = attr - VERT_RESULT_TEX0; + break; + case VERT_RESULT_VAR0: - /* fall-through */ default: - assert(slot < Elements(vs_output_semantic_name)); - if (outputSemanticName) { - /* use provided semantic into */ - assert(outputSemanticName[attr] != TGSI_SEMANTIC_COUNT); - vs_output_semantic_name[slot] = outputSemanticName[attr]; - vs_output_semantic_index[slot] = outputSemanticIndex[attr]; - } - else { - /* use default semantic info */ - vs_output_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - vs_output_semantic_index[slot] = num_generic++; - } + assert(attr < VERT_RESULT_MAX); + stvp->output_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; + stvp->output_semantic_index[slot] = (FRAG_ATTRIB_VAR0 - + FRAG_ATTRIB_TEX0 + + attr - + VERT_RESULT_VAR0); + break; } - - assert(slot < Elements(output_flags)); - output_flags[slot] = stvp->Base.Base.OutputFlags[attr]; - } - } - - if (outputMapping) { - /* find max output slot referenced to compute vs_num_outputs */ - GLuint maxSlot = 0; - for (attr = 0; attr < VERT_RESULT_MAX; attr++) { - if (outputMapping[attr] != ~0 && outputMapping[attr] > maxSlot) - maxSlot = outputMapping[attr]; } - vs_num_outputs = maxSlot + 1; - } - else { - outputMapping = defaultOutputMapping; } +} -#if 0 /* debug */ - { - GLuint i; - printf("outputMapping? %d\n", outputMapping ? 1 : 0); - if (outputMapping) { - printf("attr -> slot\n"); - for (i = 0; i < 16; i++) { - printf(" %2d %3d\n", i, outputMapping[i]); - } - } - printf("slot sem_name sem_index\n"); - for (i = 0; i < vs_num_outputs; i++) { - printf(" %2d %d %d\n", - i, - vs_output_semantic_name[i], - vs_output_semantic_index[i]); - } - } -#endif - /* free old shader state, if any */ - if (stvp->state.tokens) { - st_free_tokens(stvp->state.tokens); - stvp->state.tokens = NULL; - } - if (stvp->driver_shader) { - cso_delete_vertex_shader(st->cso_context, stvp->driver_shader); - stvp->driver_shader = NULL; - } +struct st_vp_varient * +st_translate_vertex_program(struct st_context *st, + struct st_vertex_program *stvp, + const struct st_vp_varient_key *key) +{ + struct st_vp_varient *vpv = CALLOC_STRUCT(st_vp_varient); + struct pipe_context *pipe = st->pipe; - stvp->state.tokens = + vpv->state.tokens = st_translate_mesa_program(st->ctx, TGSI_PROCESSOR_VERTEX, &stvp->Base.Base, /* inputs */ - vs_num_inputs, + stvp->num_inputs, stvp->input_to_index, - vs_input_semantic_name, - vs_input_semantic_index, + NULL, /* input semantic name */ + NULL, /* input semantic index */ NULL, - input_flags, /* outputs */ - vs_num_outputs, - outputMapping, - vs_output_semantic_name, - vs_output_semantic_index, - output_flags ); + stvp->num_outputs, + stvp->result_to_output, + stvp->output_semantic_name, + stvp->output_semantic_index ); - stvp->num_inputs = vs_num_inputs; - stvp->driver_shader = pipe->create_vs_state(pipe, &stvp->state); + vpv->driver_shader = pipe->create_vs_state(pipe, &vpv->state); if ((ST_DEBUG & DEBUG_TGSI) && (ST_DEBUG & DEBUG_MESA)) { _mesa_print_program(&stvp->Base.Base); @@ -350,9 +217,11 @@ st_translate_vertex_program(struct st_context *st, } if (ST_DEBUG & DEBUG_TGSI) { - tgsi_dump( stvp->state.tokens, 0 ); + tgsi_dump( vpv->state.tokens, 0 ); debug_printf("\n"); } + + return vpv; } @@ -375,7 +244,6 @@ st_translate_fragment_program(struct st_context *st, GLuint attr; const GLbitfield inputsRead = stfp->Base.Base.InputsRead; GLuint vslot = 0; - GLuint num_generic = 0; uint fs_num_inputs = 0; @@ -383,13 +251,6 @@ st_translate_fragment_program(struct st_context *st, ubyte fs_output_semantic_index[PIPE_MAX_SHADER_OUTPUTS]; uint fs_num_outputs = 0; - GLbitfield input_flags[MAX_PROGRAM_INPUTS]; - GLbitfield output_flags[MAX_PROGRAM_OUTPUTS]; - - /*memset(&fs, 0, sizeof(fs));*/ - memset(input_flags, 0, sizeof(input_flags)); - memset(output_flags, 0, sizeof(output_flags)); - /* which vertex output goes to the first fragment input: */ if (inputsRead & FRAG_BIT_WPOS) vslot = 0; @@ -432,14 +293,25 @@ st_translate_fragment_program(struct st_context *st, break; case FRAG_ATTRIB_FACE: stfp->input_semantic_name[slot] = TGSI_SEMANTIC_FACE; - stfp->input_semantic_index[slot] = num_generic++; + stfp->input_semantic_index[slot] = 0; interpMode[slot] = TGSI_INTERPOLATE_CONSTANT; break; - case FRAG_ATTRIB_PNTC: - stfp->input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - stfp->input_semantic_index[slot] = num_generic++; - interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE; - break; + + /* In most cases, there is nothing special about these + * inputs, so adopt a convention to use the generic + * semantic name and the mesa FRAG_ATTRIB_ number as the + * index. + * + * All that is required is that the vertex shader labels + * its own outputs similarly, and that the vertex shader + * generates at least every output required by the + * fragment shader plus fixed-function hardware (such as + * BFC). + * + * There is no requirement that semantic indexes start at + * zero or be restricted to a particular range -- nobody + * should be building tables based on semantic index. + */ case FRAG_ATTRIB_TEX0: case FRAG_ATTRIB_TEX1: case FRAG_ATTRIB_TEX2: @@ -448,19 +320,18 @@ st_translate_fragment_program(struct st_context *st, case FRAG_ATTRIB_TEX5: case FRAG_ATTRIB_TEX6: case FRAG_ATTRIB_TEX7: - stfp->input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - stfp->input_semantic_index[slot] = num_generic++; - interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE; - break; + case FRAG_ATTRIB_PNTC: case FRAG_ATTRIB_VAR0: - /* fall-through */ default: + /* Actually, let's try and zero-base this just for + * readability of the generated TGSI. + */ + assert(attr >= FRAG_ATTRIB_TEX0); + stfp->input_semantic_index[slot] = (attr - FRAG_ATTRIB_TEX0); stfp->input_semantic_name[slot] = TGSI_SEMANTIC_GENERIC; - stfp->input_semantic_index[slot] = num_generic++; interpMode[slot] = TGSI_INTERPOLATE_PERSPECTIVE; + break; } - - input_flags[slot] = stfp->Base.Base.InputFlags[attr]; } } @@ -498,8 +369,6 @@ st_translate_fragment_program(struct st_context *st, break; } - output_flags[fs_num_outputs] = stfp->Base.Base.OutputFlags[attr]; - fs_num_outputs++; } } @@ -518,13 +387,11 @@ st_translate_fragment_program(struct st_context *st, stfp->input_semantic_name, stfp->input_semantic_index, interpMode, - input_flags, /* outputs */ fs_num_outputs, outputMapping, fs_output_semantic_name, - fs_output_semantic_index, - output_flags ); + fs_output_semantic_index ); stfp->driver_shader = pipe->create_fs_state(pipe, &stfp->state); diff --git a/src/mesa/state_tracker/st_program.h b/src/mesa/state_tracker/st_program.h index e2e5eddef2..88aadbd751 100644 --- a/src/mesa/state_tracker/st_program.h +++ b/src/mesa/state_tracker/st_program.h @@ -64,41 +64,70 @@ struct st_fragment_program struct pipe_shader_state state; void *driver_shader; - GLuint param_state; - - /** List of vertex programs which have been translated such that their - * outputs match this fragment program's inputs. - */ - struct translated_vertex_program *vertex_programs; - /** Program prefixed with glBitmap prologue */ struct st_fragment_program *bitmap_program; uint bitmap_sampler; }; + +struct st_vp_varient_key +{ + char dummy; /* currently unused */ +}; + + +/** + * This represents a vertex program, especially translated to match + * the inputs of a particular fragment shader. + */ +struct st_vp_varient +{ + /* Parameters which generated this translated version of a vertex + * shader: + */ + struct st_vp_varient_key key; + + /** TGSI tokens -- why? + */ + struct pipe_shader_state state; + + /** Driver's compiled shader */ + void *driver_shader; + + /** For using our private draw module (glRasterPos) */ + struct draw_vertex_shader *draw_shader; + + /** Next in linked list */ + struct st_vp_varient *next; +}; + + + + /** * Derived from Mesa gl_fragment_program: */ struct st_vertex_program { struct gl_vertex_program Base; /**< The Mesa vertex program */ - GLuint serialNo; + GLuint serialNo, lastSerialNo; /** maps a Mesa VERT_ATTRIB_x to a packed TGSI input index */ GLuint input_to_index[VERT_ATTRIB_MAX]; /** maps a TGSI input index back to a Mesa VERT_ATTRIB_x */ GLuint index_to_input[PIPE_MAX_SHADER_INPUTS]; - GLuint num_inputs; - struct pipe_shader_state state; - void *driver_shader; + /** Maps VERT_RESULT_x to slot */ + GLuint result_to_output[VERT_RESULT_MAX]; + ubyte output_semantic_name[VERT_RESULT_MAX]; + ubyte output_semantic_index[VERT_RESULT_MAX]; + GLuint num_outputs; - /** For using our private draw module (glRasterPos) */ - struct draw_vertex_shader *draw_shader; - - GLuint param_state; + /** List of translated varients of this vertex program. + */ + struct st_vp_varient *varients; }; @@ -143,13 +172,21 @@ st_translate_fragment_program(struct st_context *st, const GLuint inputMapping[]); +/* Called after program string change, discard all previous + * compilation results. + */ extern void +st_prepare_vertex_program(struct st_context *st, + struct st_vertex_program *stvp); + +extern struct st_vp_varient * st_translate_vertex_program(struct st_context *st, - struct st_vertex_program *vp, - const GLuint vert_output_to_slot[], - const ubyte *fs_input_semantic_name, - const ubyte *fs_input_semantic_index); + struct st_vertex_program *stvp, + const struct st_vp_varient_key *key); +void +st_vp_release_varients( struct st_context *st, + struct st_vertex_program *stvp ); extern void st_print_shaders(GLcontext *ctx); diff --git a/src/mesa/state_tracker/st_texture.c b/src/mesa/state_tracker/st_texture.c index 10f1351283..3035d78b61 100644 --- a/src/mesa/state_tracker/st_texture.c +++ b/src/mesa/state_tracker/st_texture.c @@ -44,6 +44,7 @@ #include "pipe/p_defines.h" #include "pipe/p_inlines.h" #include "util/u_rect.h" +#include "util/u_math.h" #define DBG if(0) printf @@ -100,10 +101,9 @@ st_texture_create(struct st_context *st, pt.target = target; pt.format = format; pt.last_level = last_level; - pt.width[0] = width0; - pt.height[0] = height0; - pt.depth[0] = depth0; - pf_get_block(format, &pt.block); + pt.width0 = width0; + pt.height0 = height0; + pt.depth0 = depth0; pt.tex_usage = usage; newtex = screen->texture_create(screen, &pt); @@ -135,9 +135,9 @@ st_texture_match_image(const struct pipe_texture *pt, /* Test if this image's size matches what's expected in the * established texture. */ - if (image->Width != pt->width[level] || - image->Height != pt->height[level] || - image->Depth != pt->depth[level]) + if (image->Width != u_minify(pt->width0, level) || + image->Height != u_minify(pt->height0, level) || + image->Depth != u_minify(pt->depth0, level)) return GL_FALSE; return GL_TRUE; @@ -241,8 +241,9 @@ st_surface_data(struct pipe_context *pipe, struct pipe_screen *screen = pipe->screen; void *map = screen->transfer_map(screen, dst); + assert(dst->texture); util_copy_rect(map, - &dst->block, + dst->texture->format, dst->stride, dstx, dsty, width, height, @@ -265,7 +266,7 @@ st_texture_image_data(struct st_context *st, { struct pipe_context *pipe = st->pipe; struct pipe_screen *screen = pipe->screen; - GLuint depth = dst->depth[level]; + GLuint depth = u_minify(dst->depth0, level); GLuint i; const GLubyte *srcUB = src; struct pipe_transfer *dst_transfer; @@ -275,15 +276,16 @@ st_texture_image_data(struct st_context *st, for (i = 0; i < depth; i++) { dst_transfer = st_no_flush_get_tex_transfer(st, dst, face, level, i, PIPE_TRANSFER_WRITE, 0, 0, - dst->width[level], - dst->height[level]); + u_minify(dst->width0, level), + u_minify(dst->height0, level)); st_surface_data(pipe, dst_transfer, 0, 0, /* dstx, dsty */ srcUB, src_row_stride, 0, 0, /* source x, y */ - dst->width[level], dst->height[level]); /* width, height */ + u_minify(dst->width0, level), + u_minify(dst->height0, level)); /* width, height */ screen->tex_transfer_destroy(dst_transfer); @@ -301,9 +303,9 @@ st_texture_image_copy(struct pipe_context *pipe, GLuint face) { struct pipe_screen *screen = pipe->screen; - GLuint width = dst->width[dstLevel]; - GLuint height = dst->height[dstLevel]; - GLuint depth = dst->depth[dstLevel]; + GLuint width = u_minify(dst->width0, dstLevel); + GLuint height = u_minify(dst->height0, dstLevel); + GLuint depth = u_minify(dst->depth0, dstLevel); struct pipe_surface *src_surface; struct pipe_surface *dst_surface; GLuint i; @@ -313,13 +315,13 @@ st_texture_image_copy(struct pipe_context *pipe, /* find src texture level of needed size */ for (srcLevel = 0; srcLevel <= src->last_level; srcLevel++) { - if (src->width[srcLevel] == width && - src->height[srcLevel] == height) { + if (u_minify(src->width0, srcLevel) == width && + u_minify(src->height0, srcLevel) == height) { break; } } - assert(src->width[srcLevel] == width); - assert(src->height[srcLevel] == height); + assert(u_minify(src->width0, srcLevel) == width); + assert(u_minify(src->height0, srcLevel) == height); #if 0 { diff --git a/src/mesa/swrast_setup/ss_tritmp.h b/src/mesa/swrast_setup/ss_tritmp.h index 724b5e94fa..17f3863956 100644 --- a/src/mesa/swrast_setup/ss_tritmp.h +++ b/src/mesa/swrast_setup/ss_tritmp.h @@ -67,8 +67,8 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) if (facing == 1) { if (IND & SS_TWOSIDE_BIT) { if (IND & SS_RGBA_BIT) { - if (VB->ColorPtr[1]) { - GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data; + if (VB->BackfaceColorPtr) { + GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data; if (swsetup->intColors) { COPY_CHAN4(saved_color[0], v[0]->color); @@ -81,7 +81,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) COPY_4V(saved_col0[2], v[2]->attrib[FRAG_ATTRIB_COL0]); } - if (VB->ColorPtr[1]->stride) { + if (VB->BackfaceColorPtr->stride) { if (swsetup->intColors) { SS_COLOR(v[0]->color, vbcolor[e0]); SS_COLOR(v[1]->color, vbcolor[e1]); @@ -108,14 +108,14 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) } } - if (VB->SecondaryColorPtr[1]) { - GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data; + if (VB->BackfaceSecondaryColorPtr) { + GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data; COPY_4V(saved_spec[0], v[0]->attrib[FRAG_ATTRIB_COL1]); COPY_4V(saved_spec[1], v[1]->attrib[FRAG_ATTRIB_COL1]); COPY_4V(saved_spec[2], v[2]->attrib[FRAG_ATTRIB_COL1]); - if (VB->SecondaryColorPtr[1]->stride) { + if (VB->BackfaceSecondaryColorPtr->stride) { SS_SPEC(v[0]->attrib[FRAG_ATTRIB_COL1], vbspec[e0]); SS_SPEC(v[1]->attrib[FRAG_ATTRIB_COL1], vbspec[e1]); SS_SPEC(v[2]->attrib[FRAG_ATTRIB_COL1], vbspec[e2]); @@ -127,7 +127,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) } } } else { - GLfloat *vbindex = (GLfloat *)VB->IndexPtr[1]->data; + GLfloat *vbindex = (GLfloat *)VB->BackfaceIndexPtr->data; saved_index[0] = v[0]->attrib[FRAG_ATTRIB_CI][0]; saved_index[1] = v[1]->attrib[FRAG_ATTRIB_CI][0]; saved_index[2] = v[2]->attrib[FRAG_ATTRIB_CI][0]; @@ -200,7 +200,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) if (IND & SS_TWOSIDE_BIT) { if (facing == 1) { if (IND & SS_RGBA_BIT) { - if (VB->ColorPtr[1]) { + if (VB->BackfaceColorPtr) { if (swsetup->intColors) { COPY_CHAN4(v[0]->color, saved_color[0]); COPY_CHAN4(v[1]->color, saved_color[1]); @@ -213,7 +213,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) } } - if (VB->SecondaryColorPtr[1]) { + if (VB->BackfaceSecondaryColorPtr) { COPY_4V(v[0]->attrib[FRAG_ATTRIB_COL1], saved_spec[0]); COPY_4V(v[1]->attrib[FRAG_ATTRIB_COL1], saved_spec[1]); COPY_4V(v[2]->attrib[FRAG_ATTRIB_COL1], saved_spec[2]); diff --git a/src/mesa/tnl/t_context.h b/src/mesa/tnl/t_context.h index 6137c2d2fe..ebaae6335b 100644 --- a/src/mesa/tnl/t_context.h +++ b/src/mesa/tnl/t_context.h @@ -198,26 +198,23 @@ struct vertex_buffer */ GLuint Count; /**< Number of vertices currently in buffer */ - /* Pointers to current data. - * XXX some of these fields alias AttribPtr below and should be removed - * such as NormalPtr, TexCoordPtr, FogCoordPtr, etc. + /* Pointers to current data. Most of the data is in AttribPtr -- all of + * it that is one of VERT_ATTRIB_X. For things only produced by TNL, + * such as backface color or eye-space coordinates, they are stored + * here. */ GLuint *Elts; - GLvector4f *ObjPtr; /* _TNL_BIT_POS */ GLvector4f *EyePtr; /* _TNL_BIT_POS */ GLvector4f *ClipPtr; /* _TNL_BIT_POS */ GLvector4f *NdcPtr; /* _TNL_BIT_POS */ GLubyte ClipOrMask; /* _TNL_BIT_POS */ GLubyte ClipAndMask; /* _TNL_BIT_POS */ GLubyte *ClipMask; /* _TNL_BIT_POS */ - GLvector4f *NormalPtr; /* _TNL_BIT_NORMAL */ GLfloat *NormalLengthPtr; /* _TNL_BIT_NORMAL */ GLboolean *EdgeFlag; /* _TNL_BIT_EDGEFLAG */ - GLvector4f *TexCoordPtr[MAX_TEXTURE_COORD_UNITS]; /* VERT_TEX_0..n */ - GLvector4f *IndexPtr[2]; /* _TNL_BIT_INDEX */ - GLvector4f *ColorPtr[2]; /* _TNL_BIT_COLOR0 */ - GLvector4f *SecondaryColorPtr[2]; /* _TNL_BIT_COLOR1 */ - GLvector4f *FogCoordPtr; /* _TNL_BIT_FOG */ + GLvector4f *BackfaceIndexPtr; + GLvector4f *BackfaceColorPtr; + GLvector4f *BackfaceSecondaryColorPtr; const struct _mesa_prim *Primitive; GLuint PrimitiveCount; @@ -402,11 +399,6 @@ struct tnl_device_driver /* Alert tnl-aware drivers of changes to material. */ - void (*NotifyInputChanges)(GLcontext *ctx, GLuint bitmask); - /* Alert tnl-aware drivers of changes to size and stride of input - * arrays. - */ - /*** *** Rendering -- These functions called only from t_vb_render.c ***/ diff --git a/src/mesa/tnl/t_draw.c b/src/mesa/tnl/t_draw.c index 04fa106300..1c7c733883 100644 --- a/src/mesa/tnl/t_draw.c +++ b/src/mesa/tnl/t_draw.c @@ -251,22 +251,10 @@ static void bind_inputs( GLcontext *ctx, */ VB->Count = count; - - /* Legacy pointers -- remove one day. - */ - VB->ObjPtr = VB->AttribPtr[_TNL_ATTRIB_POS]; - VB->NormalPtr = VB->AttribPtr[_TNL_ATTRIB_NORMAL]; - VB->ColorPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR0]; - VB->ColorPtr[1] = NULL; - VB->IndexPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX]; - VB->IndexPtr[1] = NULL; - VB->SecondaryColorPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR1]; - VB->SecondaryColorPtr[1] = NULL; - VB->FogCoordPtr = VB->AttribPtr[_TNL_ATTRIB_FOG]; - - for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { - VB->TexCoordPtr[i] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]; - } + /* These should perhaps be part of _TNL_ATTRIB_* */ + VB->BackfaceColorPtr = NULL; + VB->BackfaceIndexPtr = NULL; + VB->BackfaceSecondaryColorPtr = NULL; /* Clipping and drawing code still requires this to be a packed * array of ubytes which can be written into. TODO: Fix and diff --git a/src/mesa/tnl/t_pipeline.c b/src/mesa/tnl/t_pipeline.c index 357ef1e24b..01b30babb4 100644 --- a/src/mesa/tnl/t_pipeline.c +++ b/src/mesa/tnl/t_pipeline.c @@ -86,10 +86,6 @@ static GLuint check_input_changes( GLcontext *ctx ) } } - if (tnl->pipeline.input_changes && - tnl->Driver.NotifyInputChanges) - tnl->Driver.NotifyInputChanges( ctx, tnl->pipeline.input_changes ); - return tnl->pipeline.input_changes; } diff --git a/src/mesa/tnl/t_vb_fog.c b/src/mesa/tnl/t_vb_fog.c index f3a7bd49f4..4a0e6ad4f9 100644 --- a/src/mesa/tnl/t_vb_fog.c +++ b/src/mesa/tnl/t_vb_fog.c @@ -156,7 +156,7 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage) GLuint i; GLfloat *coord; /* Fog is computed from vertex or fragment Z values */ - /* source = VB->ObjPtr or VB->EyePtr coords */ + /* source = VB->AttribPtr[_TNL_ATTRIB_POS] or VB->EyePtr coords */ /* dest = VB->AttribPtr[_TNL_ATTRIB_FOG] = fog stage private storage */ VB->AttribPtr[_TNL_ATTRIB_FOG] = &store->fogcoord; @@ -176,11 +176,12 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage) /* Full eye coords weren't required, just calculate the * eye Z values. */ - _mesa_dotprod_tab[VB->ObjPtr->size]( (GLfloat *) input->data, - 4 * sizeof(GLfloat), - VB->ObjPtr, plane ); + _mesa_dotprod_tab[VB->AttribPtr[_TNL_ATTRIB_POS]->size] + ( (GLfloat *) input->data, + 4 * sizeof(GLfloat), + VB->AttribPtr[_TNL_ATTRIB_POS], plane ); - input->count = VB->ObjPtr->count; + input->count = VB->AttribPtr[_TNL_ATTRIB_POS]->count; /* make sure coords are really positive NOTE should avoid going through array twice */ @@ -213,7 +214,7 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage) /* input->count may be one if glFogCoord was only called once * before glBegin. But we need to compute fog for all vertices. */ - input->count = VB->ObjPtr->count; + input->count = VB->AttribPtr[_TNL_ATTRIB_POS]->count; VB->AttribPtr[_TNL_ATTRIB_FOG] = &store->fogcoord; /* dest data */ } @@ -227,7 +228,6 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage) VB->AttribPtr[_TNL_ATTRIB_FOG] = input; } - VB->FogCoordPtr = VB->AttribPtr[_TNL_ATTRIB_FOG]; return GL_TRUE; } diff --git a/src/mesa/tnl/t_vb_light.c b/src/mesa/tnl/t_vb_light.c index f47f99397c..8a0fe63fd8 100644 --- a/src/mesa/tnl/t_vb_light.c +++ b/src/mesa/tnl/t_vb_light.c @@ -127,7 +127,7 @@ prepare_materials(GLcontext *ctx, const GLuint bitmask = ctx->Light.ColorMaterialBitmask; for (i = 0 ; i < MAT_ATTRIB_MAX ; i++) if (bitmask & (1<<i)) - VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->ColorPtr[0]; + VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->AttribPtr[_TNL_ATTRIB_COLOR0]; } /* Now, for each material attribute that's tracking vertex color, save @@ -200,7 +200,7 @@ static GLboolean run_lighting( GLcontext *ctx, struct light_stage_data *store = LIGHT_STAGE_DATA(stage); TNLcontext *tnl = TNL_CONTEXT(ctx); struct vertex_buffer *VB = &tnl->vb; - GLvector4f *input = ctx->_NeedEyeCoords ? VB->EyePtr : VB->ObjPtr; + GLvector4f *input = ctx->_NeedEyeCoords ? VB->EyePtr : VB->AttribPtr[_TNL_ATTRIB_POS]; GLuint idx; if (!ctx->Light.Enabled || ctx->VertexProgram._Current) @@ -208,13 +208,13 @@ static GLboolean run_lighting( GLcontext *ctx, /* Make sure we can talk about position x,y and z: */ - if (input->size <= 2 && input == VB->ObjPtr) { + if (input->size <= 2 && input == VB->AttribPtr[_TNL_ATTRIB_POS]) { _math_trans_4f( store->Input.data, - VB->ObjPtr->data, - VB->ObjPtr->stride, + VB->AttribPtr[_TNL_ATTRIB_POS]->data, + VB->AttribPtr[_TNL_ATTRIB_POS]->stride, GL_FLOAT, - VB->ObjPtr->size, + VB->AttribPtr[_TNL_ATTRIB_POS]->size, 0, VB->Count ); @@ -246,10 +246,6 @@ static GLboolean run_lighting( GLcontext *ctx, */ store->light_func_tab[idx]( ctx, VB, stage, input ); - VB->AttribPtr[_TNL_ATTRIB_COLOR0] = VB->ColorPtr[0]; - VB->AttribPtr[_TNL_ATTRIB_COLOR1] = VB->SecondaryColorPtr[0]; - VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX] = VB->IndexPtr[0]; - return GL_TRUE; } diff --git a/src/mesa/tnl/t_vb_lighttmp.h b/src/mesa/tnl/t_vb_lighttmp.h index 124ca3c74f..4ebef2356f 100644 --- a/src/mesa/tnl/t_vb_lighttmp.h +++ b/src/mesa/tnl/t_vb_lighttmp.h @@ -72,13 +72,13 @@ static void TAG(light_rgba_spec)( GLcontext *ctx, fprintf(stderr, "%s\n", __FUNCTION__ ); #endif - VB->ColorPtr[0] = &store->LitColor[0]; - VB->SecondaryColorPtr[0] = &store->LitSecondary[0]; + VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0]; + VB->AttribPtr[_TNL_ATTRIB_COLOR1] = &store->LitSecondary[0]; sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3]; #if IDX & LIGHT_TWOSIDE - VB->ColorPtr[1] = &store->LitColor[1]; - VB->SecondaryColorPtr[1] = &store->LitSecondary[1]; + VB->BackfaceColorPtr = &store->LitColor[1]; + VB->BackfaceSecondaryColorPtr = &store->LitSecondary[1]; sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3]; #endif @@ -259,11 +259,11 @@ static void TAG(light_rgba)( GLcontext *ctx, fprintf(stderr, "%s\n", __FUNCTION__ ); #endif - VB->ColorPtr[0] = &store->LitColor[0]; + VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0]; sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3]; #if IDX & LIGHT_TWOSIDE - VB->ColorPtr[1] = &store->LitColor[1]; + VB->BackfaceColorPtr = &store->LitColor[1]; sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3]; #endif @@ -449,9 +449,9 @@ static void TAG(light_fast_rgba_single)( GLcontext *ctx, (void) input; /* doesn't refer to Eye or Obj */ - VB->ColorPtr[0] = &store->LitColor[0]; + VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0]; #if IDX & LIGHT_TWOSIDE - VB->ColorPtr[1] = &store->LitColor[1]; + VB->BackfaceColorPtr = &store->LitColor[1]; #endif if (nr > 1) { @@ -559,9 +559,9 @@ static void TAG(light_fast_rgba)( GLcontext *ctx, sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3]; sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3]; - VB->ColorPtr[0] = &store->LitColor[0]; + VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0]; #if IDX & LIGHT_TWOSIDE - VB->ColorPtr[1] = &store->LitColor[1]; + VB->BackfaceColorPtr = &store->LitColor[1]; #endif if (nr > 1) { @@ -665,14 +665,14 @@ static void TAG(light_ci)( GLcontext *ctx, fprintf(stderr, "%s\n", __FUNCTION__ ); #endif - VB->IndexPtr[0] = &store->LitIndex[0]; + VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX] = &store->LitIndex[0]; #if IDX & LIGHT_TWOSIDE - VB->IndexPtr[1] = &store->LitIndex[1]; + VB->BackfaceIndexPtr = &store->LitIndex[1]; #endif - indexResult[0] = (GLfloat *)VB->IndexPtr[0]->data; + indexResult[0] = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX]->data; #if IDX & LIGHT_TWOSIDE - indexResult[1] = (GLfloat *)VB->IndexPtr[1]->data; + indexResult[1] = (GLfloat *)VB->BackfaceIndexPtr->data; #endif /* loop over vertices */ diff --git a/src/mesa/tnl/t_vb_normals.c b/src/mesa/tnl/t_vb_normals.c index a4821cc1cc..693d3dc118 100644 --- a/src/mesa/tnl/t_vb_normals.c +++ b/src/mesa/tnl/t_vb_normals.c @@ -79,7 +79,6 @@ run_normal_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage) } VB->AttribPtr[_TNL_ATTRIB_NORMAL] = &store->normal; - VB->NormalPtr = &store->normal; VB->NormalLengthPtr = NULL; /* no longer valid */ return GL_TRUE; diff --git a/src/mesa/tnl/t_vb_program.c b/src/mesa/tnl/t_vb_program.c index e69f7d5766..c289cdfbaa 100644 --- a/src/mesa/tnl/t_vb_program.c +++ b/src/mesa/tnl/t_vb_program.c @@ -454,19 +454,14 @@ run_vp( GLcontext *ctx, struct tnl_pipeline_stage *stage ) VB->ClipPtr->count = VB->Count; } - VB->ColorPtr[0] = &store->results[VERT_RESULT_COL0]; - VB->ColorPtr[1] = &store->results[VERT_RESULT_BFC0]; - VB->SecondaryColorPtr[0] = &store->results[VERT_RESULT_COL1]; - VB->SecondaryColorPtr[1] = &store->results[VERT_RESULT_BFC1]; - VB->FogCoordPtr = &store->results[VERT_RESULT_FOGC]; - VB->AttribPtr[VERT_ATTRIB_COLOR0] = &store->results[VERT_RESULT_COL0]; VB->AttribPtr[VERT_ATTRIB_COLOR1] = &store->results[VERT_RESULT_COL1]; VB->AttribPtr[VERT_ATTRIB_FOG] = &store->results[VERT_RESULT_FOGC]; VB->AttribPtr[_TNL_ATTRIB_POINTSIZE] = &store->results[VERT_RESULT_PSIZ]; + VB->BackfaceColorPtr = &store->results[VERT_RESULT_BFC0]; + VB->BackfaceSecondaryColorPtr = &store->results[VERT_RESULT_BFC1]; for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { - VB->TexCoordPtr[i] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i] = &store->results[VERT_RESULT_TEX0 + i]; } diff --git a/src/mesa/tnl/t_vb_texgen.c b/src/mesa/tnl/t_vb_texgen.c index 7c1819b223..9ef13bc96d 100644 --- a/src/mesa/tnl/t_vb_texgen.c +++ b/src/mesa/tnl/t_vb_texgen.c @@ -341,7 +341,7 @@ static void texgen( GLcontext *ctx, GLvector4f *in = VB->AttribPtr[VERT_ATTRIB_TEX0 + unit]; GLvector4f *out = &store->texcoord[unit]; const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; - const GLvector4f *obj = VB->ObjPtr; + const GLvector4f *obj = VB->AttribPtr[_TNL_ATTRIB_POS]; const GLvector4f *eye = VB->EyePtr; const GLvector4f *normal = VB->AttribPtr[_TNL_ATTRIB_NORMAL]; const GLfloat *m = store->tmp_m; @@ -498,7 +498,6 @@ static GLboolean run_texgen_stage( GLcontext *ctx, store->TexgenFunc[i]( ctx, store, i ); - VB->TexCoordPtr[i] = VB->AttribPtr[VERT_ATTRIB_TEX0 + i] = &store->texcoord[i]; } } diff --git a/src/mesa/tnl/t_vb_texmat.c b/src/mesa/tnl/t_vb_texmat.c index 0abe8cc35d..83688290e5 100644 --- a/src/mesa/tnl/t_vb_texmat.c +++ b/src/mesa/tnl/t_vb_texmat.c @@ -73,7 +73,6 @@ static GLboolean run_texmat_stage( GLcontext *ctx, ctx->TextureMatrixStack[i].Top, VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]); - VB->TexCoordPtr[i] = VB->AttribPtr[VERT_ATTRIB_TEX0+i] = &store->texcoord[i]; } } diff --git a/src/mesa/tnl/t_vb_vertex.c b/src/mesa/tnl/t_vb_vertex.c index 4734754ea4..bc7e0951ec 100644 --- a/src/mesa/tnl/t_vb_vertex.c +++ b/src/mesa/tnl/t_vb_vertex.c @@ -152,16 +152,16 @@ static GLboolean run_vertex_stage( GLcontext *ctx, * Use combined ModelProject to avoid some depth artifacts */ if (ctx->ModelviewMatrixStack.Top->type == MATRIX_IDENTITY) - VB->EyePtr = VB->ObjPtr; + VB->EyePtr = VB->AttribPtr[_TNL_ATTRIB_POS]; else VB->EyePtr = TransformRaw( &store->eye, ctx->ModelviewMatrixStack.Top, - VB->ObjPtr); + VB->AttribPtr[_TNL_ATTRIB_POS]); } VB->ClipPtr = TransformRaw( &store->clip, &ctx->_ModelProjectMatrix, - VB->ObjPtr ); + VB->AttribPtr[_TNL_ATTRIB_POS] ); /* Drivers expect this to be clean to element 4... */ diff --git a/src/mesa/tnl/t_vertex_generic.c b/src/mesa/tnl/t_vertex_generic.c index 9812f8c808..fa34d11d7b 100644 --- a/src/mesa/tnl/t_vertex_generic.c +++ b/src/mesa/tnl/t_vertex_generic.c @@ -1092,33 +1092,33 @@ void _tnl_generic_interp_extras( GLcontext *ctx, { struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - /* If stride is zero, ColorPtr[1] is constant across the VB, so + /* If stride is zero, BackfaceColorPtr is constant across the VB, so * there is no point interpolating between two values as they will * be identical. In all other cases, this value is generated by * t_vb_lighttmp.h and has a stride of 4 dwords. */ - if (VB->ColorPtr[1] && VB->ColorPtr[1]->stride) { - assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); + if (VB->BackfaceColorPtr && VB->BackfaceColorPtr->stride) { + assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat)); INTERP_4F( t, - VB->ColorPtr[1]->data[dst], - VB->ColorPtr[1]->data[out], - VB->ColorPtr[1]->data[in] ); + VB->BackfaceColorPtr->data[dst], + VB->BackfaceColorPtr->data[out], + VB->BackfaceColorPtr->data[in] ); } - if (VB->SecondaryColorPtr[1]) { - assert(VB->SecondaryColorPtr[1]->stride == 4 * sizeof(GLfloat)); + if (VB->BackfaceSecondaryColorPtr) { + assert(VB->BackfaceSecondaryColorPtr->stride == 4 * sizeof(GLfloat)); INTERP_3F( t, - VB->SecondaryColorPtr[1]->data[dst], - VB->SecondaryColorPtr[1]->data[out], - VB->SecondaryColorPtr[1]->data[in] ); + VB->BackfaceSecondaryColorPtr->data[dst], + VB->BackfaceSecondaryColorPtr->data[out], + VB->BackfaceSecondaryColorPtr->data[in] ); } - if (VB->IndexPtr[1]) { - VB->IndexPtr[1]->data[dst][0] = LINTERP( t, - VB->IndexPtr[1]->data[out][0], - VB->IndexPtr[1]->data[in][0] ); + if (VB->BackfaceIndexPtr) { + VB->BackfaceIndexPtr->data[dst][0] = LINTERP( t, + VB->BackfaceIndexPtr->data[out][0], + VB->BackfaceIndexPtr->data[in][0] ); } if (VB->EdgeFlag) { @@ -1135,18 +1135,18 @@ void _tnl_generic_copy_pv_extras( GLcontext *ctx, /* See above comment: */ - if (VB->ColorPtr[1] && VB->ColorPtr[1]->stride) { - COPY_4FV( VB->ColorPtr[1]->data[dst], - VB->ColorPtr[1]->data[src] ); + if (VB->BackfaceColorPtr && VB->BackfaceColorPtr->stride) { + COPY_4FV( VB->BackfaceColorPtr->data[dst], + VB->BackfaceColorPtr->data[src] ); } - if (VB->SecondaryColorPtr[1]) { - COPY_4FV( VB->SecondaryColorPtr[1]->data[dst], - VB->SecondaryColorPtr[1]->data[src] ); + if (VB->BackfaceSecondaryColorPtr) { + COPY_4FV( VB->BackfaceSecondaryColorPtr->data[dst], + VB->BackfaceSecondaryColorPtr->data[src] ); } - if (VB->IndexPtr[1]) { - VB->IndexPtr[1]->data[dst][0] = VB->IndexPtr[1]->data[src][0]; + if (VB->BackfaceIndexPtr) { + VB->BackfaceIndexPtr->data[dst][0] = VB->BackfaceIndexPtr->data[src][0]; } _tnl_generic_copy_pv(ctx, dst, src); diff --git a/src/mesa/tnl_dd/t_dd_dmatmp.h b/src/mesa/tnl_dd/t_dd_dmatmp.h index e4b535fb68..e5885782c7 100644 --- a/src/mesa/tnl_dd/t_dd_dmatmp.h +++ b/src/mesa/tnl_dd/t_dd_dmatmp.h @@ -443,7 +443,7 @@ static void TAG(render_quad_strip_verts)( GLcontext *ctx, } else if (HAVE_TRI_STRIPS && ctx->Light.ShadeModel == GL_FLAT && - TNL_CONTEXT(ctx)->vb.ColorPtr[0]->stride) { + TNL_CONTEXT(ctx)->vb.AttribPtr[_TNL_ATTRIB_COLOR0]->stride) { if (HAVE_ELTS) { LOCAL_VARS; int dmasz = GET_SUBSEQUENT_VB_MAX_ELTS(); @@ -1221,7 +1221,7 @@ static GLboolean TAG(validate_render)( GLcontext *ctx, ok = GL_TRUE; } else if (HAVE_TRI_STRIPS && ctx->Light.ShadeModel == GL_FLAT && - VB->ColorPtr[0]->stride != 0) { + VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0) { if (HAVE_ELTS) { ok = (GLint) count < GET_SUBSEQUENT_VB_MAX_ELTS(); } diff --git a/src/mesa/tnl_dd/t_dd_tritmp.h b/src/mesa/tnl_dd/t_dd_tritmp.h index 1ae70f4059..8574fe618b 100644 --- a/src/mesa/tnl_dd/t_dd_tritmp.h +++ b/src/mesa/tnl_dd/t_dd_tritmp.h @@ -195,7 +195,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) } } else { - GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data; + GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data; (void) vbcolor; if (!DO_FLAT) { @@ -204,8 +204,8 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) } VERT_SAVE_RGBA( 2 ); - if (VB->ColorPtr[1]->stride) { - ASSERT(VB->ColorPtr[1]->stride == 4*sizeof(GLfloat)); + if (VB->BackfaceColorPtr->stride) { + ASSERT(VB->BackfaceColorPtr->stride == 4*sizeof(GLfloat)); if (!DO_FLAT) { VERT_SET_RGBA( v[0], vbcolor[e0] ); @@ -221,9 +221,9 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) VERT_SET_RGBA( v[2], vbcolor[0] ); } - if (HAVE_SPEC && VB->SecondaryColorPtr[1]) { - GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data; - ASSERT(VB->SecondaryColorPtr[1]->stride == 4*sizeof(GLfloat)); + if (HAVE_SPEC && VB->BackfaceSecondaryColorPtr) { + GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data; + ASSERT(VB->BackfaceSecondaryColorPtr->stride == 4*sizeof(GLfloat)); if (!DO_FLAT) { VERT_SAVE_SPEC( 0 ); @@ -237,7 +237,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) } } else { - GLfloat (*vbindex) = (GLfloat *)VB->IndexPtr[1]->data; + GLfloat (*vbindex) = (GLfloat *)VB->BackfaceIndexPtr->data; if (!DO_FLAT) { VERT_SAVE_IND( 0 ); VERT_SAVE_IND( 1 ); @@ -279,7 +279,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) VERT_SAVE_RGBA( 1 ); VERT_COPY_RGBA( v[0], v[2] ); VERT_COPY_RGBA( v[1], v[2] ); - if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { + if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { VERT_SAVE_SPEC( 0 ); VERT_SAVE_SPEC( 1 ); VERT_COPY_SPEC( v[0], v[2] ); @@ -374,7 +374,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 ) if (HAVE_RGBA) { VERT_RESTORE_RGBA( 0 ); VERT_RESTORE_RGBA( 1 ); - if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { + if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { VERT_RESTORE_SPEC( 0 ); VERT_RESTORE_SPEC( 1 ); } @@ -436,7 +436,7 @@ static void TAG(quadr)( GLcontext *ctx, if (DO_TWOSIDE && facing == 1) { if (HAVE_RGBA) { - GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data; + GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data; (void)vbcolor; if (HAVE_BACK_COLORS) { @@ -471,7 +471,7 @@ static void TAG(quadr)( GLcontext *ctx, } VERT_SAVE_RGBA( 3 ); - if (VB->ColorPtr[1]->stride) { + if (VB->BackfaceColorPtr->stride) { if (!DO_FLAT) { VERT_SET_RGBA( v[0], vbcolor[e0] ); VERT_SET_RGBA( v[1], vbcolor[e1] ); @@ -488,9 +488,9 @@ static void TAG(quadr)( GLcontext *ctx, VERT_SET_RGBA( v[3], vbcolor[0] ); } - if (HAVE_SPEC && VB->SecondaryColorPtr[1]) { - GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data; - ASSERT(VB->SecondaryColorPtr[1]->stride==4*sizeof(GLfloat)); + if (HAVE_SPEC && VB->BackfaceSecondaryColorPtr) { + GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data; + ASSERT(VB->BackfaceSecondaryColorPtr->stride==4*sizeof(GLfloat)); if (!DO_FLAT) { VERT_SAVE_SPEC( 0 ); @@ -506,7 +506,7 @@ static void TAG(quadr)( GLcontext *ctx, } } else { - GLfloat *vbindex = (GLfloat *)VB->IndexPtr[1]->data; + GLfloat *vbindex = (GLfloat *)VB->BackfaceIndexPtr->data; if (!DO_FLAT) { VERT_SAVE_IND( 0 ); VERT_SAVE_IND( 1 ); @@ -553,7 +553,7 @@ static void TAG(quadr)( GLcontext *ctx, VERT_COPY_RGBA( v[0], v[3] ); VERT_COPY_RGBA( v[1], v[3] ); VERT_COPY_RGBA( v[2], v[3] ); - if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { + if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { VERT_SAVE_SPEC( 0 ); VERT_SAVE_SPEC( 1 ); VERT_SAVE_SPEC( 2 ); @@ -659,7 +659,7 @@ static void TAG(quadr)( GLcontext *ctx, VERT_RESTORE_RGBA( 0 ); VERT_RESTORE_RGBA( 1 ); VERT_RESTORE_RGBA( 2 ); - if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { + if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { VERT_RESTORE_SPEC( 0 ); VERT_RESTORE_SPEC( 1 ); VERT_RESTORE_SPEC( 2 ); @@ -708,7 +708,7 @@ static void TAG(line)( GLcontext *ctx, GLuint e0, GLuint e1 ) if (HAVE_RGBA) { VERT_SAVE_RGBA( 0 ); VERT_COPY_RGBA( v[0], v[1] ); - if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { + if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { VERT_SAVE_SPEC( 0 ); VERT_COPY_SPEC( v[0], v[1] ); } @@ -725,7 +725,7 @@ static void TAG(line)( GLcontext *ctx, GLuint e0, GLuint e1 ) if (HAVE_RGBA) { VERT_RESTORE_RGBA( 0 ); - if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { + if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { VERT_RESTORE_SPEC( 0 ); } } diff --git a/src/mesa/tnl_dd/t_dd_vb.c b/src/mesa/tnl_dd/t_dd_vb.c index b3937c29a0..a8a0a69768 100644 --- a/src/mesa/tnl_dd/t_dd_vb.c +++ b/src/mesa/tnl_dd/t_dd_vb.c @@ -297,19 +297,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx, LOCALVARS struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); + if (VB->BackfaceColorPtr) { + assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat)); INTERP_4F( t, - GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], out), - GET_COLOR(VB->ColorPtr[1], in) ); + GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, out), + GET_COLOR(VB->BackfaceColorPtr, in) ); - if (VB->SecondaryColorPtr[1]) { + if (VB->BackfaceSecondaryColorPtr) { INTERP_3F( t, - GET_COLOR(VB->SecondaryColorPtr[1], dst), - GET_COLOR(VB->SecondaryColorPtr[1], out), - GET_COLOR(VB->SecondaryColorPtr[1], in) ); + GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), + GET_COLOR(VB->BackfaceSecondaryColorPtr, out), + GET_COLOR(VB->BackfaceSecondaryColorPtr, in) ); } } @@ -326,13 +326,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx, LOCALVARS struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; - if (VB->ColorPtr[1]) { - COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst), - GET_COLOR(VB->ColorPtr[1], src) ); + if (VB->BackfaceColorPtr) { + COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), + GET_COLOR(VB->BackfaceColorPtr, src) ); - if (VB->SecondaryColorPtr[1]) { - COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst), - GET_COLOR(VB->SecondaryColorPtr[1], src) ); + if (VB->BackfaceSecondaryColorPtr) { + COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), + GET_COLOR(VB->BackfaceSecondaryColorPtr, src) ); } } diff --git a/src/mesa/tnl_dd/t_dd_vbtmp.h b/src/mesa/tnl_dd/t_dd_vbtmp.h index 92dd8931c3..85101b9ceb 100644 --- a/src/mesa/tnl_dd/t_dd_vbtmp.h +++ b/src/mesa/tnl_dd/t_dd_vbtmp.h @@ -153,46 +153,46 @@ static void TAG(emit)( GLcontext *ctx, if (DO_TEX3) { const GLuint t3 = GET_TEXSOURCE(3); - tc3 = VB->TexCoordPtr[t3]->data; - tc3_stride = VB->TexCoordPtr[t3]->stride; + tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data; + tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride; if (DO_PTEX) - tc3_size = VB->TexCoordPtr[t3]->size; + tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size; } if (DO_TEX2) { const GLuint t2 = GET_TEXSOURCE(2); - tc2 = VB->TexCoordPtr[t2]->data; - tc2_stride = VB->TexCoordPtr[t2]->stride; + tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; + tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride; if (DO_PTEX) - tc2_size = VB->TexCoordPtr[t2]->size; + tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size; } if (DO_TEX1) { const GLuint t1 = GET_TEXSOURCE(1); - tc1 = VB->TexCoordPtr[t1]->data; - tc1_stride = VB->TexCoordPtr[t1]->stride; + tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; + tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride; if (DO_PTEX) - tc1_size = VB->TexCoordPtr[t1]->size; + tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size; } if (DO_TEX0) { const GLuint t0 = GET_TEXSOURCE(0); - tc0_stride = VB->TexCoordPtr[t0]->stride; - tc0 = VB->TexCoordPtr[t0]->data; + tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; + tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data; if (DO_PTEX) - tc0_size = VB->TexCoordPtr[t0]->size; + tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size; } if (DO_RGBA) { - col_stride = VB->ColorPtr[0]->stride; - col = VB->ColorPtr[0]->data; - col_size = VB->ColorPtr[0]->size; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; } if (DO_SPEC) { - if (VB->SecondaryColorPtr[0]) { - spec_stride = VB->SecondaryColorPtr[0]->stride; - spec = VB->SecondaryColorPtr[0]->data; + if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { + spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride; + spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; } else { spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1]; spec_stride = 0; @@ -200,9 +200,9 @@ static void TAG(emit)( GLcontext *ctx, } if (DO_FOG) { - if (VB->FogCoordPtr) { - fog = VB->FogCoordPtr->data; - fog_stride = VB->FogCoordPtr->stride; + if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { + fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; + fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride; } else { static GLfloat tmp[4] = {0, 0, 0, 0}; @@ -356,9 +356,9 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end, ASSERT(stride == 4); - col = VB->ColorPtr[0]->data; - col_stride = VB->ColorPtr[0]->stride; - col_size = VB->ColorPtr[0]->size; + col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; + col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; + col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size; /* fprintf(stderr, "%s(small) importable %x\n", */ /* __FUNCTION__, VB->importable_data); */ @@ -410,22 +410,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* Force 'missing' texcoords to something valid. */ - if (DO_TEX3 && VB->TexCoordPtr[2] == 0) - VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; + if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 3]; - if (DO_TEX2 && VB->TexCoordPtr[1] == 0) - VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; + if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2]; - if (DO_TEX1 && VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1]; if (DO_PTEX) return GL_TRUE; - if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || - (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || - (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) || - (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4)) + if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || + (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || + (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) || + (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4)) return GL_FALSE; return GL_TRUE; @@ -438,14 +438,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* Force 'missing' texcoords to something valid. */ - if (DO_TEX3 && VB->TexCoordPtr[2] == 0) - VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; + if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 3]; - if (DO_TEX2 && VB->TexCoordPtr[1] == 0) - VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; + if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2]; - if (DO_TEX1 && VB->TexCoordPtr[0] == 0) - VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; + if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] == 0) + VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1]; if (DO_PTEX) return GL_TRUE; @@ -453,14 +453,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx ) /* No hardware support for projective texture. Can fake it for * TEX0 only. */ - if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || - (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || - (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) { + if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || + (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || + (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) { PTEX_FALLBACK(); return GL_FALSE; } - if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) { + if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) { if (DO_TEX1 || DO_TEX2 || DO_TEX3) { PTEX_FALLBACK(); } diff --git a/src/mesa/x86/gen_matypes.c b/src/mesa/x86/gen_matypes.c index d56b701aa8..0d7e0f1f98 100644 --- a/src/mesa/x86/gen_matypes.c +++ b/src/mesa/x86/gen_matypes.c @@ -120,22 +120,22 @@ int main( int argc, char **argv ) OFFSET( "VB_COUNT ", struct vertex_buffer, Count ); printf( "\n" ); OFFSET( "VB_ELTS ", struct vertex_buffer, Elts ); - OFFSET( "VB_OBJ_PTR ", struct vertex_buffer, ObjPtr ); + OFFSET( "VB_OBJ_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_POS] ); OFFSET( "VB_EYE_PTR ", struct vertex_buffer, EyePtr ); OFFSET( "VB_CLIP_PTR ", struct vertex_buffer, ClipPtr ); OFFSET( "VB_PROJ_CLIP_PTR ", struct vertex_buffer, NdcPtr ); OFFSET( "VB_CLIP_OR_MASK ", struct vertex_buffer, ClipOrMask ); OFFSET( "VB_CLIP_MASK ", struct vertex_buffer, ClipMask ); - OFFSET( "VB_NORMAL_PTR ", struct vertex_buffer, NormalPtr ); + OFFSET( "VB_NORMAL_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_NORMAL] ); OFFSET( "VB_EDGE_FLAG ", struct vertex_buffer, EdgeFlag ); - OFFSET( "VB_TEX0_COORD_PTR ", struct vertex_buffer, TexCoordPtr[0] ); - OFFSET( "VB_TEX1_COORD_PTR ", struct vertex_buffer, TexCoordPtr[1] ); - OFFSET( "VB_TEX2_COORD_PTR ", struct vertex_buffer, TexCoordPtr[2] ); - OFFSET( "VB_TEX3_COORD_PTR ", struct vertex_buffer, TexCoordPtr[3] ); - OFFSET( "VB_INDEX_PTR ", struct vertex_buffer, IndexPtr ); - OFFSET( "VB_COLOR_PTR ", struct vertex_buffer, ColorPtr ); - OFFSET( "VB_SECONDARY_COLOR_PTR ", struct vertex_buffer, SecondaryColorPtr ); - OFFSET( "VB_FOG_COORD_PTR ", struct vertex_buffer, FogCoordPtr ); + OFFSET( "VB_TEX0_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX0] ); + OFFSET( "VB_TEX1_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX1] ); + OFFSET( "VB_TEX2_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX2] ); + OFFSET( "VB_TEX3_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX3] ); + OFFSET( "VB_INDEX_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR_INDEX] ); + OFFSET( "VB_COLOR_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR0] ); + OFFSET( "VB_SECONDARY_COLOR_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR1] ); + OFFSET( "VB_FOG_COORD_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_FOG] ); OFFSET( "VB_PRIMITIVE ", struct vertex_buffer, Primitive ); printf( "\n" ); |