diff options
Diffstat (limited to 'src/mesa')
81 files changed, 3099 insertions, 990 deletions
| diff --git a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h index 0495d0e276..c548ef3ad5 100644 --- a/src/mesa/drivers/dri/ffb/ffb_vbtmp.h +++ b/src/mesa/drivers/dri/ffb/ffb_vbtmp.h @@ -38,11 +38,11 @@ static void TAG(emit)(GLcontext *ctx, GLuint start, GLuint end)  #endif  #if (IND & (FFB_VB_RGBA_BIT)) -	col0 = VB->ColorPtr[0]->data; -	col0_stride = VB->ColorPtr[0]->stride; +	col0 = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +	col0_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;  #if (IND & (FFB_VB_TWOSIDE_BIT)) -	col1 = VB->ColorPtr[1]->data; -	col1_stride = VB->ColorPtr[1]->stride; +	col1 = VB->BackfaceColorPtr->data; +	col1_stride = VB->BackfaceColorPtr->stride;  #endif  #endif diff --git a/src/mesa/drivers/dri/gamma/gamma_render.c b/src/mesa/drivers/dri/gamma/gamma_render.c index 1b9fd169f4..a03a93d132 100644 --- a/src/mesa/drivers/dri/gamma/gamma_render.c +++ b/src/mesa/drivers/dri/gamma/gamma_render.c @@ -53,13 +53,13 @@ static void gamma_emit( GLcontext *ctx, GLuint start, GLuint end)     GLfloat (*tc0)[4] = 0;     GLuint tc0_size = 0; -   col = VB->ColorPtr[0]->data; -   col_stride = VB->ColorPtr[0]->stride; +   col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +   col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;     if (ctx->Texture.Unit[0]._ReallyEnabled) { -      tc0_stride = VB->TexCoordPtr[0]->stride; -      tc0 = VB->TexCoordPtr[0]->data; -      tc0_size = VB->TexCoordPtr[0]->size; +      tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0]->stride; +      tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data; +      tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0]->size;        coord = VB->ClipPtr->data;        coord_stride = VB->ClipPtr->stride;     } else { diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c index f4bbb53b86..c62281d341 100644 --- a/src/mesa/drivers/dri/i915/i830_texstate.c +++ b/src/mesa/drivers/dri/i915/i830_texstate.c @@ -27,6 +27,7 @@  #include "main/mtypes.h"  #include "main/enums.h" +#include "main/colormac.h"  #include "intel_mipmap_tree.h"  #include "intel_tex.h" @@ -311,11 +312,10 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)     CLAMPED_FLOAT_TO_UBYTE(border[2], tObj->BorderColor[2]);     CLAMPED_FLOAT_TO_UBYTE(border[3], tObj->BorderColor[3]); -   state[I830_TEXREG_TM0S4] = INTEL_PACKCOLOR8888(border[0], -                                                  border[1], -                                                  border[2], -                                                  border[3]); - +   state[I830_TEXREG_TM0S4] = PACK_COLOR_8888(border[3], +					      border[0], +					      border[1], +					      border[2]);     I830_ACTIVESTATE(i830, I830_UPLOAD_TEX(unit), GL_TRUE);     /* memcmp was already disabled, but definitely won't work as the diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index a6f554701e..c05c7759ac 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -126,7 +126,7 @@ i830_render_start(struct intel_context *intel)        for (i = 0; i < I830_TEX_UNITS; i++) {           if (RENDERINPUTS_TEST(index_bitset, _TNL_ATTRIB_TEX(i))) { -            GLuint sz = VB->TexCoordPtr[i]->size; +            GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;              GLuint emit;              GLuint mcs = (i830->state.Tex[i][I830_TEXREG_MCS] &                            ~TEXCOORDTYPE_MASK); @@ -714,9 +714,6 @@ i830_new_batch(struct intel_context *intel)  {     struct i830_context *i830 = i830_context(&intel->ctx);     i830->state.emitted = 0; - -   /* Check that we didn't just wrap our batchbuffer at a bad time. */ -   assert(!intel->no_batch_wrap);  }  static void  diff --git a/src/mesa/drivers/dri/i915/i915_fragprog.c b/src/mesa/drivers/dri/i915/i915_fragprog.c index d9c61446f5..9e4d318036 100644 --- a/src/mesa/drivers/dri/i915/i915_fragprog.c +++ b/src/mesa/drivers/dri/i915/i915_fragprog.c @@ -1301,7 +1301,7 @@ i915ValidateFragmentProgram(struct i915_context *i915)     for (i = 0; i < p->ctx->Const.MaxTextureCoordUnits; i++) {        if (inputsRead & FRAG_BIT_TEX(i)) { -         int sz = VB->TexCoordPtr[i]->size; +         int sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;           s2 &= ~S2_TEXCOORD_FMT(i, S2_TEXCOORD_FMT0_MASK);           s2 |= S2_TEXCOORD_FMT(i, SZ_TO_HW(sz)); diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c index d6689af53f..1bacd51aec 100644 --- a/src/mesa/drivers/dri/i915/i915_texstate.c +++ b/src/mesa/drivers/dri/i915/i915_texstate.c @@ -28,6 +28,7 @@  #include "main/mtypes.h"  #include "main/enums.h"  #include "main/macros.h" +#include "main/colormac.h"  #include "intel_mipmap_tree.h"  #include "intel_tex.h" @@ -363,15 +364,15 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)         * R channel, while the hardware uses A.  Spam R into all the channels         * for safety.         */ -      state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0], -						   border[0], -						   border[0], -						   border[0]); +      state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[0], +					       border[0], +					       border[0], +					       border[0]);     } else { -      state[I915_TEXREG_SS4] = INTEL_PACKCOLOR8888(border[0], -						   border[1], -						   border[2], -						   border[3]); +      state[I915_TEXREG_SS4] = PACK_COLOR_8888(border[3], +					       border[0], +					       border[1], +					       border[2]);     } diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index 77ba8d5581..3e7b5101cc 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -667,9 +667,6 @@ i915_new_batch(struct intel_context *intel)      * difficulties associated with them (physical address requirements).      */     i915->state.emitted = 0; - -   /* Check that we didn't just wrap our batchbuffer at a bad time. */ -   assert(!intel->no_batch_wrap);  }  static void  diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index bc527aae47..8a3ab39bc2 100644 --- a/src/mesa/drivers/dri/i915/intel_tris.c +++ b/src/mesa/drivers/dri/i915/intel_tris.c @@ -1250,81 +1250,6 @@ union fi     GLint i;  }; - -/**********************************************************************/ -/*             Used only with the metaops callbacks.                  */ -/**********************************************************************/ -static void -intel_meta_draw_poly(struct intel_context *intel, -                     GLuint n, -                     GLfloat xy[][2], -                     GLfloat z, GLuint color, GLfloat tex[][2]) -{ -   union fi *vb; -   GLint i; -   unsigned int saved_vertex_size = intel->vertex_size; - -   LOCK_HARDWARE(intel); - -   intel->vertex_size = 6; - -   /* All 3d primitives should be emitted with LOOP_CLIPRECTS, -    * otherwise the drawing origin (DR4) might not be set correctly. -    */ -   intel_set_prim(intel, PRIM3D_TRIFAN); -   vb = (union fi *) intel_get_prim_space(intel, n); - -   for (i = 0; i < n; i++) { -      vb[0].f = xy[i][0]; -      vb[1].f = xy[i][1]; -      vb[2].f = z; -      vb[3].i = color; -      vb[4].f = tex[i][0]; -      vb[5].f = tex[i][1]; -      vb += 6; -   } - -   INTEL_FIREVERTICES(intel); - -   intel->vertex_size = saved_vertex_size; - -   UNLOCK_HARDWARE(intel); -} - -static void -intel_meta_draw_quad(struct intel_context *intel, -                     GLfloat x0, GLfloat x1, -                     GLfloat y0, GLfloat y1, -                     GLfloat z, -                     GLuint color, -                     GLfloat s0, GLfloat s1, GLfloat t0, GLfloat t1) -{ -   GLfloat xy[4][2]; -   GLfloat tex[4][2]; - -   xy[0][0] = x0; -   xy[0][1] = y0; -   xy[1][0] = x1; -   xy[1][1] = y0; -   xy[2][0] = x1; -   xy[2][1] = y1; -   xy[3][0] = x0; -   xy[3][1] = y1; - -   tex[0][0] = s0; -   tex[0][1] = t0; -   tex[1][0] = s1; -   tex[1][1] = t0; -   tex[2][0] = s1; -   tex[2][1] = t1; -   tex[3][0] = s0; -   tex[3][1] = t1; - -   intel_meta_draw_poly(intel, 4, xy, z, color, tex); -} - - -  /**********************************************************************/  /*                            Initialization.                         */  /**********************************************************************/ @@ -1333,7 +1258,6 @@ intel_meta_draw_quad(struct intel_context *intel,  void  intelInitTriFuncs(GLcontext * ctx)  { -   struct intel_context *intel = intel_context(ctx);     TNLcontext *tnl = TNL_CONTEXT(ctx);     static int firsttime = 1; @@ -1350,6 +1274,4 @@ intelInitTriFuncs(GLcontext * ctx)     tnl->Driver.Render.BuildVertices = _tnl_build_vertices;     tnl->Driver.Render.CopyPV = _tnl_copy_pv;     tnl->Driver.Render.Interp = _tnl_interp; - -   intel->vtbl.meta_draw_quad = intel_meta_draw_quad;  } diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h index fded47aa2f..e73e21433c 100644 --- a/src/mesa/drivers/dri/i965/brw_context.h +++ b/src/mesa/drivers/dri/i965/brw_context.h @@ -172,8 +172,8 @@ struct brw_fragment_program {     GLuint id;  /**< serial no. to identify frag progs, never re-used */     GLboolean isGLSL;  /**< really, any IF/LOOP/CONT/BREAK instructions */ -   dri_bo *const_buffer;    /** Program constant buffer/surface */     GLboolean use_const_buffer; +   dri_bo *const_buffer;    /** Program constant buffer/surface */     /** for debugging, which texture units are referenced */     GLbitfield tex_units_used; @@ -438,7 +438,6 @@ struct brw_context     GLuint primitive;     GLboolean emit_state_always; -   GLboolean no_batch_wrap;     struct {        struct brw_state_flags dirty; diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 8bcb6083f7..7ad860898f 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -145,7 +145,7 @@ static void brw_emit_prim(struct brw_context *brw,     prim_packet.base_vert_location = prim->basevertex;     /* Can't wrap here, since we rely on the validated state. */ -   brw->no_batch_wrap = GL_TRUE; +   intel->no_batch_wrap = GL_TRUE;     /* If we're set to always flush, do it before and after the primitive emit.      * We want to catch both missed flushes that hurt instruction/state cache @@ -163,7 +163,7 @@ static void brw_emit_prim(struct brw_context *brw,        intel_batchbuffer_emit_mi_flush(intel->batch);     } -   brw->no_batch_wrap = GL_FALSE; +   intel->no_batch_wrap = GL_FALSE;  }  static void brw_merge_inputs( struct brw_context *brw, diff --git a/src/mesa/drivers/dri/i965/brw_draw_upload.c b/src/mesa/drivers/dri/i965/brw_draw_upload.c index 271a88dae0..7c796dae93 100644 --- a/src/mesa/drivers/dri/i965/brw_draw_upload.c +++ b/src/mesa/drivers/dri/i965/brw_draw_upload.c @@ -243,14 +243,6 @@ static void wrap_buffers( struct brw_context *brw,        dri_bo_unreference(brw->vb.upload.bo);     brw->vb.upload.bo = dri_bo_alloc(brw->intel.bufmgr, "temporary VBO",  				    size, 1); - -   /* Set the internal VBO\ to no-backing-store.  We only use them as a -    * temporary within a brw_try_draw_prims while the lock is held. -    */ -   /* DON'T DO THIS AS IF WE HAVE TO RE-ORG MEMORY WE NEED SOMEWHERE WITH -      FAKE TO PUSH THIS STUFF */ -//   if (!brw->intel.ttm) -//      dri_bo_fake_disable_backing_store(brw->vb.upload.bo, NULL, NULL);  }  static void get_space( struct brw_context *brw, diff --git a/src/mesa/drivers/dri/i965/brw_vtbl.c b/src/mesa/drivers/dri/i965/brw_vtbl.c index 34aaea3736..72749b3859 100644 --- a/src/mesa/drivers/dri/i965/brw_vtbl.c +++ b/src/mesa/drivers/dri/i965/brw_vtbl.c @@ -150,9 +150,6 @@ static void brw_new_batch( struct intel_context *intel )  {     struct brw_context *brw = brw_context(&intel->ctx); -   /* Check that we didn't just wrap our batchbuffer at a bad time. */ -   assert(!brw->no_batch_wrap); -     brw->curbe.need_new_bo = GL_TRUE;     /* Mark all context state as needing to be re-emitted. diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h index 9dcb6e14bb..b9b987ea70 100644 --- a/src/mesa/drivers/dri/i965/brw_wm.h +++ b/src/mesa/drivers/dri/i965/brw_wm.h @@ -76,10 +76,10 @@ struct brw_wm_prog_key {     GLushort tex_swizzles[BRW_MAX_TEX_UNIT]; -   GLuint program_string_id:32;     GLushort origin_x, origin_y;     GLushort drawable_height;     GLbitfield64 vp_outputs_written; +   GLuint program_string_id:32;  }; diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c index 7d03179588..3737faf26f 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_fp.c +++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c @@ -138,7 +138,6 @@ static struct prog_dst_register dst_reg(GLuint file, GLuint idx)     reg.CondMask = COND_TR;     reg.CondSwizzle = 0;     reg.CondSrc = 0; -   reg.pad = 0;     return reg;  } diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c b/src/mesa/drivers/dri/intel/intel_batchbuffer.c index ca6e2fa5b1..2eae9b66d8 100644 --- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c +++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c @@ -80,7 +80,7 @@ intel_batchbuffer_reset(struct intel_batchbuffer *batch)        batch->buf = NULL;     } -   if (!batch->buffer && intel->ttm == GL_TRUE) +   if (!batch->buffer)        batch->buffer = malloc (intel->maxBatchSize);     batch->buf = dri_bo_alloc(intel->bufmgr, "batchbuffer", @@ -212,7 +212,7 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,     batch->reserved_space = 0;     /* Emit a flush if the bufmgr doesn't do it for us. */ -   if (intel->always_flush_cache || !intel->ttm) { +   if (intel->always_flush_cache) {        intel_batchbuffer_emit_mi_flush(batch);        used = batch->ptr - batch->map;     } @@ -244,6 +244,9 @@ _intel_batchbuffer_flush(struct intel_batchbuffer *batch, const char *file,     if (intel->vtbl.finish_batch)        intel->vtbl.finish_batch(intel); +   /* Check that we didn't just wrap our batchbuffer at a bad time. */ +   assert(!intel->no_batch_wrap); +     batch->reserved_space = BATCH_RESERVED;     /* TODO: Just pass the relocation list and dma buffer up to the diff --git a/src/mesa/drivers/dri/intel/intel_blit.c b/src/mesa/drivers/dri/intel/intel_blit.c index 817223da41..f14854602b 100644 --- a/src/mesa/drivers/dri/intel/intel_blit.c +++ b/src/mesa/drivers/dri/intel/intel_blit.c @@ -499,10 +499,11 @@ intelClearWithBlit(GLcontext *ctx, GLbitfield mask)  		  switch (irb->texformat) {  		  case MESA_FORMAT_ARGB8888:  		  case MESA_FORMAT_XRGB8888: -		     clearVal = intel->ClearColor8888; +		     clearVal = PACK_COLOR_8888(clear[3], clear[0], +						clear[1], clear[2]);  		     break;  		  case MESA_FORMAT_RGB565: -		     clearVal = intel->ClearColor565; +		     clearVal = PACK_COLOR_565(clear[0], clear[1], clear[2]);  		     break;  		  case MESA_FORMAT_ARGB4444:  		     clearVal = PACK_COLOR_4444(clear[3], clear[0], diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 2aeca6b81b..1434ae530b 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -176,9 +176,7 @@ intelGetString(GLcontext * ctx, GLenum name)           break;        } -      (void) driGetRendererString(buffer, chipset,  -				  (intel->ttm) ? DRIVER_DATE_GEM : DRIVER_DATE, -				  0); +      (void) driGetRendererString(buffer, chipset, DRIVER_DATE_GEM, 0);        return (GLubyte *) buffer;     default: @@ -601,6 +599,7 @@ intelInitContext(struct intel_context *intel,     __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;     intelScreenPrivate *intelScreen = (intelScreenPrivate *) sPriv->private;     int fthrottle_mode; +   int bo_reuse_mode;     if (!_mesa_initialize_context(&intel->ctx, mesaVis, shareCtx,                                   functions, (void *) intel)) { @@ -635,18 +634,14 @@ intelInitContext(struct intel_context *intel,        intel->maxBatchSize = BATCH_SZ;     intel->bufmgr = intelScreen->bufmgr; -   intel->ttm = intelScreen->ttm; -   if (intel->ttm) { -      int bo_reuse_mode; -      bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); -      switch (bo_reuse_mode) { -      case DRI_CONF_BO_REUSE_DISABLED: -	 break; -      case DRI_CONF_BO_REUSE_ALL: -	 intel_bufmgr_gem_enable_reuse(intel->bufmgr); -	 break; -      } +   bo_reuse_mode = driQueryOptioni(&intel->optionCache, "bo_reuse"); +   switch (bo_reuse_mode) { +   case DRI_CONF_BO_REUSE_DISABLED: +      break; +   case DRI_CONF_BO_REUSE_ALL: +      intel_bufmgr_gem_enable_reuse(intel->bufmgr); +      break;     }     /* This doesn't yet catch all non-conformant rendering, but it's a @@ -733,12 +728,6 @@ intelInitContext(struct intel_context *intel,     intel->RenderIndex = ~0;     fthrottle_mode = driQueryOptioni(&intel->optionCache, "fthrottle_mode"); -   intel->irqsEmitted = 0; - -   intel->do_irqs = (intel->intelScreen->irq_active && -                     fthrottle_mode == DRI_CONF_FTHROTTLE_IRQS); - -   intel->do_usleeps = (fthrottle_mode == DRI_CONF_FTHROTTLE_USLEEPS);     if (intel->gen >= 4 && !intel->intelScreen->irq_active) {        _mesa_printf("IRQs not active.  Exiting\n"); @@ -1058,21 +1047,6 @@ intelContendedLock(struct intel_context *intel, GLuint flags)        sarea->ctxOwner = me;     } -   /* If the last consumer of the texture memory wasn't us, notify the fake -    * bufmgr and record the new owner.  We should have the memory shared -    * between contexts of a single fake bufmgr, but this will at least make -    * things correct for now. -    */ -   if (!intel->ttm && sarea->texAge != intel->hHWContext) { -      sarea->texAge = intel->hHWContext; -      intel_bufmgr_fake_contended_lock_take(intel->bufmgr); -      if (INTEL_DEBUG & DEBUG_BATCH) -	 intel_decode_context_reset(); -      if (INTEL_DEBUG & DEBUG_BUFMGR) -	 fprintf(stderr, "Lost Textures: sarea->texAge %x hw context %x\n", -		 sarea->ctxOwner, intel->hHWContext); -   } -     /* Drawable changed?      */     if (dPriv && intel->lastStamp != dPriv->lastStamp) { diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index eb7be7ddd0..481202c971 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -135,14 +135,6 @@ struct intel_context                                  struct intel_region * draw_region,                                  struct intel_region * depth_region); -      void (*meta_draw_quad)(struct intel_context *intel, -			     GLfloat x0, GLfloat x1, -			     GLfloat y0, GLfloat y1, -			     GLfloat z, -			     GLuint color, /* ARGB32 */ -			     GLfloat s0, GLfloat s1, -			     GLfloat t0, GLfloat t1); -        void (*meta_color_mask) (struct intel_context * intel, GLboolean);        void (*meta_stencil_replace) (struct intel_context * intel, @@ -189,12 +181,6 @@ struct intel_context     struct intel_region *back_region;     struct intel_region *depth_region; -   /** -    * This value indicates that the kernel memory manager is being used -    * instead of the fake client-side memory manager. -    */ -   GLboolean ttm; -     struct intel_batchbuffer *batch;     drm_intel_bo *first_post_swapbuffers_batch;     GLboolean no_batch_wrap; @@ -217,10 +203,6 @@ struct intel_context     char *prevLockFile;     int prevLockLine; -   GLuint ClearColor565; -   GLuint ClearColor8888; - -     /* Offsets of fields within the current vertex:      */     GLuint coloroffset; @@ -237,6 +219,7 @@ struct intel_context     GLboolean hw_stipple;     GLboolean depth_buffer_is_float;     GLboolean no_rast; +   GLboolean no_hw;     GLboolean always_flush_batch;     GLboolean always_flush_cache; @@ -302,13 +285,6 @@ struct intel_context     GLboolean use_early_z;     drm_clip_rect_t fboRect;     /**< cliprect for FBO rendering */ -   int perf_boxes; - -   GLuint do_usleeps; -   int do_irqs; -   GLuint irqsEmitted; - -   GLboolean scissor;     drm_clip_rect_t draw_rect;     drm_clip_rect_t scissor_rect; @@ -325,8 +301,6 @@ struct intel_context     GLuint lastStamp; -   GLboolean no_hw; -     /**      * Configuration cache      */ @@ -374,29 +348,6 @@ do {						\  } while (0)  /* ================================================================ - * Color packing: - */ - -#define INTEL_PACKCOLOR4444(r,g,b,a) \ -  ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) - -#define INTEL_PACKCOLOR1555(r,g,b,a) \ -  ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ -    ((a) ? 0x8000 : 0)) - -#define INTEL_PACKCOLOR565(r,g,b) \ -  ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) - -#define INTEL_PACKCOLOR8888(r,g,b,a) \ -  ((a<<24) | (r<<16) | (g<<8) | b) - -#define INTEL_PACKCOLOR(format, r,  g,  b, a)		\ -(format == DV_PF_555 ? INTEL_PACKCOLOR1555(r,g,b,a) :	\ - (format == DV_PF_565 ? INTEL_PACKCOLOR565(r,g,b) :	\ -  (format == DV_PF_8888 ? INTEL_PACKCOLOR8888(r,g,b,a) :	\ -   0))) - -/* ================================================================   * From linux kernel i386 header files, copes with odd sizes better   * than COPY_DWORDS would:   * XXX Put this in src/mesa/main/imports.h ??? diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index 1682e115cc..f5fe543b5d 100644 --- a/src/mesa/drivers/dri/intel/intel_extensions.c +++ b/src/mesa/drivers/dri/intel/intel_extensions.c @@ -79,6 +79,7 @@ static const struct dri_extension card_extensions[] = {     { "GL_ARB_half_float_pixel",           NULL },     { "GL_ARB_map_buffer_range",           GL_ARB_map_buffer_range_functions },     { "GL_ARB_multitexture",               NULL }, +   { "GL_ARB_pixel_buffer_object",      NULL },     { "GL_ARB_point_parameters",           GL_ARB_point_parameters_functions },     { "GL_ARB_point_sprite",               NULL },     { "GL_ARB_shader_objects",             GL_ARB_shader_objects_functions }, @@ -104,6 +105,8 @@ static const struct dri_extension card_extensions[] = {     { "GL_EXT_blend_logic_op",             NULL },     { "GL_EXT_blend_subtract",             NULL },     { "GL_EXT_cull_vertex",                GL_EXT_cull_vertex_functions }, +   { "GL_EXT_framebuffer_blit",         GL_EXT_framebuffer_blit_functions }, +   { "GL_EXT_framebuffer_object",       GL_EXT_framebuffer_object_functions },     { "GL_EXT_fog_coord",                  GL_EXT_fog_coord_functions },     { "GL_EXT_gpu_program_parameters",     GL_EXT_gpu_program_parameters_functions },     { "GL_EXT_packed_depth_stencil",       NULL }, @@ -176,14 +179,6 @@ static const struct dri_extension arb_oq_extensions[] = {     { NULL, NULL }  }; - -static const struct dri_extension ttm_extensions[] = { -   { "GL_ARB_pixel_buffer_object",      NULL }, -   { "GL_EXT_framebuffer_blit",         GL_EXT_framebuffer_blit_functions }, -   { "GL_EXT_framebuffer_object",       GL_EXT_framebuffer_object_functions }, -   { NULL, NULL } -}; -  static const struct dri_extension fragment_shader_extensions[] = {     { "GL_ARB_fragment_shader",            NULL },     { NULL, NULL } @@ -202,9 +197,6 @@ intelInitExtensions(GLcontext *ctx)      */     driInitExtensions(ctx, card_extensions, GL_FALSE); -   if (intel->ttm) -      driInitExtensions(ctx, ttm_extensions, GL_FALSE); -     if (IS_965(intel->intelScreen->deviceID))        driInitExtensions(ctx, brw_extensions, GL_FALSE); diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index abb3024bfb..6a565f80cf 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -224,16 +224,12 @@ int intel_miptree_pitch_align (struct intel_context *intel,     if (!mt->compressed) {        int pitch_align; -      if (intel->ttm) { -	 /* XXX: Align pitch to multiple of 64 bytes for now to allow -	  * render-to-texture to work in all cases. This should probably be -	  * replaced at some point by some scheme to only do this when really -	  * necessary. -	  */ -	 pitch_align = 64; -      } else { -	 pitch_align = 4; -      } +      /* XXX: Align pitch to multiple of 64 bytes for now to allow +       * render-to-texture to work in all cases. This should probably be +       * replaced at some point by some scheme to only do this when really +       * necessary. +       */ +      pitch_align = 64;        if (tiling == I915_TILING_X)  	 pitch_align = 512; diff --git a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c index 99330b6ddf..9572b67326 100644 --- a/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c +++ b/src/mesa/drivers/dri/intel/intel_pixel_bitmap.c @@ -228,10 +228,9 @@ do_blit_bitmap( GLcontext *ctx,     UNCLAMPED_FLOAT_TO_UBYTE(ubcolor[3], tmpColor[3]);     if (dst->cpp == 2) -      color = INTEL_PACKCOLOR565(ubcolor[0], ubcolor[1], ubcolor[2]); +      color = PACK_COLOR_565(ubcolor[0], ubcolor[1], ubcolor[2]);     else -      color = INTEL_PACKCOLOR8888(ubcolor[0], ubcolor[1], -				  ubcolor[2], ubcolor[3]); +      color = PACK_COLOR_8888(ubcolor[3], ubcolor[0], ubcolor[1], ubcolor[2]);     if (!intel_check_blit_fragment_ops(ctx, tmpColor[3] == 1.0F))        return GL_FALSE; diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index 80975163d4..d6b9dc4446 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -542,55 +542,18 @@ intel_recreate_static(struct intel_context *intel,        region->buffer = NULL;     } -   if (intel->ttm) { -      assert(region_desc->bo_handle != -1); -      region->buffer = intel_bo_gem_create_from_name(intel->bufmgr, -						     name, -						     region_desc->bo_handle); - -      ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, -			      ®ion->bit_6_swizzle); -      if (ret != 0) { -	 fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", -		 region_desc->bo_handle, name, strerror(-ret)); -	 intel_region_release(®ion); -	 return NULL; -      } -   } else { -      if (region->classic_map != NULL) { -	 drmUnmap(region->classic_map, -		  region->pitch * region->cpp * region->height); -	 region->classic_map = NULL; -      } -      ret = drmMap(intel->driFd, region_desc->handle, -		   region->pitch * region->cpp * region->height, -		   ®ion->classic_map); -      if (ret != 0) { -	 fprintf(stderr, "Failed to drmMap %s buffer\n", name); -	 free(region); -	 return NULL; -      } - -      region->buffer = intel_bo_fake_alloc_static(intel->bufmgr, +   assert(region_desc->bo_handle != -1); +   region->buffer = intel_bo_gem_create_from_name(intel->bufmgr,  						  name, -						  region_desc->offset, -						  region->pitch * region->cpp * -						  region->height, -						  region->classic_map); +						  region_desc->bo_handle); -      /* The sarea just gives us a boolean for whether it's tiled or not, -       * instead of which tiling mode it is.  Guess. -       */ -      if (region_desc->tiled) { -	 if (intel->gen >= 4 && region_desc == &intelScreen->depth) -	    region->tiling = I915_TILING_Y; -	 else -	    region->tiling = I915_TILING_X; -      } else { -	 region->tiling = I915_TILING_NONE; -      } - -      region->bit_6_swizzle = I915_BIT_6_SWIZZLE_NONE; +   ret = dri_bo_get_tiling(region->buffer, ®ion->tiling, +			   ®ion->bit_6_swizzle); +   if (ret != 0) { +      fprintf(stderr, "Couldn't get tiling of buffer %d (%s): %s\n", +	      region_desc->bo_handle, name, strerror(-ret)); +      intel_region_release(®ion); +      return NULL;     }     assert(region->buffer != NULL); diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index 789135b49f..2c5a884a9b 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -605,7 +605,6 @@ intelFillInModes(__DRIscreenPrivate *psp,  static GLboolean  intel_init_bufmgr(intelScreenPrivate *intelScreen)  { -   GLboolean gem_disable = getenv("INTEL_NO_GEM") != NULL;     int gem_kernel = 0;     GLboolean gem_supported;     struct drm_i915_getparam gp; @@ -622,43 +621,24 @@ intel_init_bufmgr(intelScreenPrivate *intelScreen)     /* If we've got a new enough DDX that's initializing GEM and giving us      * object handles for the shared buffers, use that.      */ -   intelScreen->ttm = GL_FALSE;     if (intelScreen->driScrnPriv->dri2.enabled)         gem_supported = GL_TRUE;     else if (intelScreen->driScrnPriv->ddx_version.minor >= 9 &&  	    gem_kernel &&  	    intelScreen->front.bo_handle != -1)         gem_supported = GL_TRUE; -   else -       gem_supported = GL_FALSE; - -   if (!gem_disable && gem_supported) { -      intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ); -      if (intelScreen->bufmgr != NULL) -	 intelScreen->ttm = GL_TRUE; +   else { +      fprintf(stderr, "[%s:%u] Error initializing GEM.\n", +	      __func__, __LINE__); +      return GL_FALSE;     } + +   intelScreen->bufmgr = intel_bufmgr_gem_init(spriv->fd, BATCH_SZ);     /* Otherwise, use the classic buffer manager. */     if (intelScreen->bufmgr == NULL) { -      if (gem_disable) { -	 _mesa_warning(NULL, "GEM disabled.  Using classic."); -      } else { -	 _mesa_warning(NULL, -                       "Failed to initialize GEM.  Falling back to classic."); -      } - -      if (intelScreen->tex.size == 0) { -	 fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", -		 __func__, __LINE__); -	 return GL_FALSE; -      } - -      intelScreen->bufmgr = -	 intel_bufmgr_fake_init(spriv->fd, -				intelScreen->tex.offset, -				intelScreen->tex.map, -				intelScreen->tex.size, -				(unsigned int * volatile) -				&intelScreen->sarea->last_dispatch); +      fprintf(stderr, "[%s:%u] Error initializing buffer manager.\n", +	      __func__, __LINE__); +      return GL_FALSE;     }     if (intel_get_param(spriv, I915_PARAM_NUM_FENCES_AVAIL, &num_fences)) diff --git a/src/mesa/drivers/dri/intel/intel_screen.h b/src/mesa/drivers/dri/intel/intel_screen.h index a9b9e109a6..14ca0903b6 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.h +++ b/src/mesa/drivers/dri/intel/intel_screen.h @@ -77,7 +77,6 @@ typedef struct     GLboolean no_hw;     GLboolean no_vbo; -   int ttm;     dri_bufmgr *bufmgr;     GLboolean kernel_exec_fencing; diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index 3607c7dded..2c89a66a95 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -613,15 +613,7 @@ intel_set_span_functions(struct intel_context *intel,  			 struct gl_renderbuffer *rb)  {     struct intel_renderbuffer *irb = (struct intel_renderbuffer *) rb; -   uint32_t tiling; - -   /* If in GEM mode, we need to do the tile address swizzling ourselves, -    * instead of the fence registers handling it. -    */ -   if (intel->ttm) -      tiling = irb->region->tiling; -   else -      tiling = I915_TILING_NONE; +   uint32_t tiling = irb->region->tiling;     if (intel->intelScreen->kernel_exec_fencing) {        switch (irb->texformat) { @@ -673,6 +665,9 @@ intel_set_span_functions(struct intel_context *intel,        return;     } +   /* If in GEM mode, we need to do the tile address swizzling ourselves, +    * instead of the fence registers handling it. +    */     switch (irb->texformat) {     case MESA_FORMAT_RGB565:        switch (tiling) { diff --git a/src/mesa/drivers/dri/intel/intel_state.c b/src/mesa/drivers/dri/intel/intel_state.c index 4ee742377d..aefae53eb2 100644 --- a/src/mesa/drivers/dri/intel/intel_state.c +++ b/src/mesa/drivers/dri/intel/intel_state.c @@ -196,25 +196,6 @@ intel_translate_logic_op(GLenum opcode)     }  } - -static void -intelClearColor(GLcontext *ctx, const GLfloat color[4]) -{ -   struct intel_context *intel = intel_context(ctx); -   GLubyte clear[4]; - -   CLAMPED_FLOAT_TO_UBYTE(clear[0], color[0]); -   CLAMPED_FLOAT_TO_UBYTE(clear[1], color[1]); -   CLAMPED_FLOAT_TO_UBYTE(clear[2], color[2]); -   CLAMPED_FLOAT_TO_UBYTE(clear[3], color[3]); - -   /* compute both 32 and 16-bit clear values */ -   intel->ClearColor8888 = INTEL_PACKCOLOR8888(clear[0], clear[1], -                                               clear[2], clear[3]); -   intel->ClearColor565 = INTEL_PACKCOLOR565(clear[0], clear[1], clear[2]); -} - -  /* Fallback to swrast for select and feedback.   */  static void @@ -229,5 +210,4 @@ void  intelInitStateFuncs(struct dd_function_table *functions)  {     functions->RenderMode = intelRenderMode; -   functions->ClearColor = intelClearColor;  } diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vb.c b/src/mesa/drivers/dri/mach64/mach64_native_vb.c index 99f1a14e17..816682ec5f 100644 --- a/src/mesa/drivers/dri/mach64/mach64_native_vb.c +++ b/src/mesa/drivers/dri/mach64/mach64_native_vb.c @@ -207,19 +207,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx,     LOCALVARS     struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -      assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); +   if (VB->BackfaceColorPtr) { +      assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));        INTERP_4F( t, -		    GET_COLOR(VB->ColorPtr[1], dst), -		    GET_COLOR(VB->ColorPtr[1], out), -		    GET_COLOR(VB->ColorPtr[1], in) ); +		 GET_COLOR(VB->BackfaceColorPtr, dst), +		 GET_COLOR(VB->BackfaceColorPtr, out), +		 GET_COLOR(VB->BackfaceColorPtr, in) ); -      if (VB->SecondaryColorPtr[1]) { +      if (VB->BackfaceSecondaryColorPtr) {  	 INTERP_3F( t, -		       GET_COLOR(VB->SecondaryColorPtr[1], dst), -		       GET_COLOR(VB->SecondaryColorPtr[1], out), -		       GET_COLOR(VB->SecondaryColorPtr[1], in) ); +		    GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), +		    GET_COLOR(VB->BackfaceSecondaryColorPtr, out), +		    GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );        }     } @@ -236,13 +236,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx,     LOCALVARS        struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -      COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),  -		GET_COLOR(VB->ColorPtr[1], src) ); +   if (VB->BackfaceColorPtr) { +      COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), +		GET_COLOR(VB->BackfaceColorPtr, src) ); -      if (VB->SecondaryColorPtr[1]) { -	 COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst),  -		   GET_COLOR(VB->SecondaryColorPtr[1], src) ); +      if (VB->BackfaceSecondaryColorPtr) { +	 COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), +		   GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );        }     } diff --git a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h index 684f2acc89..6e5fa3520e 100644 --- a/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h +++ b/src/mesa/drivers/dri/mach64/mach64_native_vbtmp.h @@ -103,10 +103,10 @@ static void TAG(emit)( GLcontext *ctx,  #if DO_TEX1     {        const GLuint t1 = GET_TEXSOURCE(1); -      tc1 = VB->TexCoordPtr[t1]->data; -      tc1_stride = VB->TexCoordPtr[t1]->stride; +      tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; +      tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;  #if DO_PTEX -      tc1_size = VB->TexCoordPtr[t1]->size; +      tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;  #endif     }  #endif @@ -114,18 +114,18 @@ static void TAG(emit)( GLcontext *ctx,  #if DO_TEX0     {        const GLuint t0 = GET_TEXSOURCE(0); -      tc0 = VB->TexCoordPtr[t0]->data; -      tc0_stride = VB->TexCoordPtr[t0]->stride; +      tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data; +      tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride;  #if DO_PTEX -      tc0_size = VB->TexCoordPtr[t0]->size; +      tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;  #endif     }  #endif  #if DO_SPEC -   if (VB->SecondaryColorPtr[0]) { -      spec = VB->SecondaryColorPtr[0]->data; -      spec_stride = VB->SecondaryColorPtr[0]->stride; +   if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { +      spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; +      spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;     } else {        spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];        spec_stride = 0; @@ -133,9 +133,9 @@ static void TAG(emit)( GLcontext *ctx,  #endif  #if DO_FOG -   if (VB->FogCoordPtr) { -      fog = VB->FogCoordPtr->data; -      fog_stride = VB->FogCoordPtr->stride; +   if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { +      fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; +      fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;     } else {        static GLfloat tmp[4] = {0, 0, 0, 0};        fog = &tmp; @@ -144,8 +144,8 @@ static void TAG(emit)( GLcontext *ctx,  #endif  #if DO_RGBA -   col = VB->ColorPtr[0]->data; -   col_stride = VB->ColorPtr[0]->stride; +   col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +   col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;  #endif     coord = VB->NdcPtr->data; @@ -319,8 +319,8 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* Force 'missing' texcoords to something valid.      */ -   if (DO_TEX1 && VB->TexCoordPtr[0] == 0) -      VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +   if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];     if (DO_PTEX)        return GL_TRUE; @@ -328,12 +328,12 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* No hardware support for projective texture.  Can fake it for      * TEX0 only.      */ -   if ((DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) { +   if ((DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {        PTEX_FALLBACK();        return GL_FALSE;     } -   if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) { +   if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {        if (DO_TEX1) {  	 PTEX_FALLBACK();        } diff --git a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h index 938804af9e..60bfab8f6d 100644 --- a/src/mesa/drivers/dri/mach64/mach64_vbtmp.h +++ b/src/mesa/drivers/dri/mach64/mach64_vbtmp.h @@ -156,53 +156,53 @@ static void TAG(emit)( GLcontext *ctx,     if (DO_TEX3) {        const GLuint t3 = GET_TEXSOURCE(3); -      tc3 = VB->TexCoordPtr[t3]->data; -      tc3_stride = VB->TexCoordPtr[t3]->stride; +      tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data; +      tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride;        if (DO_PTEX) -	 tc3_size = VB->TexCoordPtr[t3]->size; +	 tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size;     }     if (DO_TEX2) {        const GLuint t2 = GET_TEXSOURCE(2); -      tc2 = VB->TexCoordPtr[t2]->data; -      tc2_stride = VB->TexCoordPtr[t2]->stride; +      tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; +      tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;        if (DO_PTEX) -	 tc2_size = VB->TexCoordPtr[t2]->size; +	 tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size;     }     if (DO_TEX1) {        const GLuint t1 = GET_TEXSOURCE(1); -      tc1 = VB->TexCoordPtr[t1]->data; -      tc1_stride = VB->TexCoordPtr[t1]->stride; +      tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; +      tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;        if (DO_PTEX) -	 tc1_size = VB->TexCoordPtr[t1]->size; +	 tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;     }     if (DO_TEX0) {        const GLuint t0 = GET_TEXSOURCE(0); -      tc0_stride = VB->TexCoordPtr[t0]->stride; -      tc0 = VB->TexCoordPtr[t0]->data; +      tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; +      tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;        if (DO_PTEX)  -	 tc0_size = VB->TexCoordPtr[t0]->size; +	 tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;     }     if (DO_RGBA) { -      col = VB->ColorPtr[0]->data; -      col_stride = VB->ColorPtr[0]->stride; +      col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +      col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;     }     if (DO_SPEC) { -      spec = VB->SecondaryColorPtr[0]->data; -      spec_stride = VB->SecondaryColorPtr[0]->stride; +      spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; +      spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;     } else {        spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];        spec_stride = 0;     }     if (DO_FOG) { -      if (VB->FogCoordPtr) { -	 fog = VB->FogCoordPtr->data; -	 fog_stride = VB->FogCoordPtr->stride; +      if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { +	 fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; +	 fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;        } else {  	 static GLfloat tmp[4] = {0, 0, 0, 0};  	 fog = &tmp; @@ -384,8 +384,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,     ASSERT(stride == 4); -   col = VB->ColorPtr[0]->data; -   col_stride = VB->ColorPtr[0]->stride; +   col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +   col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;     /* Pack what's left into a 4-dword vertex.  Color is in a different      * place, and there is no 'w' coordinate. @@ -432,8 +432,8 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,     GLfloat *v = (GLfloat *)dest;     int i; -   col = VB->ColorPtr[0]->data; -   col_stride = VB->ColorPtr[0]->stride; +   col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +   col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;     if (start)        STRIDE_4F(col, col_stride * start); @@ -473,22 +473,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* Force 'missing' texcoords to something valid.      */ -   if (DO_TEX3 && VB->TexCoordPtr[2] == 0) -      VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; +   if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3]; -   if (DO_TEX2 && VB->TexCoordPtr[1] == 0) -      VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; +   if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2]; -   if (DO_TEX1 && VB->TexCoordPtr[0] == 0) -      VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +   if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];     if (DO_PTEX)        return GL_TRUE; -   if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || -       (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || -       (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) || -       (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4)) +   if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || +       (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || +       (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) || +       (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4))        return GL_FALSE;     return GL_TRUE; @@ -501,14 +501,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* Force 'missing' texcoords to something valid.      */ -   if (DO_TEX3 && VB->TexCoordPtr[2] == 0) -      VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; +   if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX2] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX2] = VB->AttribPtr[_TNL_ATTRIB_TEX3]; -   if (DO_TEX2 && VB->TexCoordPtr[1] == 0) -      VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; +   if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX1] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX1] = VB->AttribPtr[_TNL_ATTRIB_TEX2]; -   if (DO_TEX1 && VB->TexCoordPtr[0] == 0) -      VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +   if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1];     if (DO_PTEX)        return GL_TRUE; @@ -516,14 +516,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* No hardware support for projective texture.  Can fake it for      * TEX0 only.      */ -   if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || -       (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || -       (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) { +   if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || +       (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || +       (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {        PTEX_FALLBACK();        return GL_FALSE;     } -   if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) { +   if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {        if (DO_TEX1 || DO_TEX2 || DO_TEX3) {  	 PTEX_FALLBACK();        } diff --git a/src/mesa/drivers/dri/r128/r128_tris.c b/src/mesa/drivers/dri/r128/r128_tris.c index 5b91271d74..448e34e047 100644 --- a/src/mesa/drivers/dri/r128/r128_tris.c +++ b/src/mesa/drivers/dri/r128/r128_tris.c @@ -650,12 +650,12 @@ static void r128RenderStart( GLcontext *ctx )     }     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[0]) )) { -      if ( VB->TexCoordPtr[rmesa->tmu_source[0]]->size > 2 ) +      if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[0]]->size > 2 )  	 fallback_projtex = GL_TRUE;        EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, R128_CCE_VC_FRMT_S_T, 8 );     }     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(rmesa->tmu_source[1]) )) { -      if ( VB->TexCoordPtr[rmesa->tmu_source[1]]->size > 2 ) +      if ( VB->AttribPtr[_TNL_ATTRIB_TEX0 + rmesa->tmu_source[1]]->size > 2 )  	 fallback_projtex = GL_TRUE;        EMIT_ATTR( _TNL_ATTRIB_TEX1, EMIT_2F, R128_CCE_VC_FRMT_S2_T2, 8 );     } diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index 240fb45078..fadc766b49 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -168,7 +168,7 @@ static void r200SetVertexFormat( GLcontext *ctx )        for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {  	 if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { -	    GLuint sz = VB->TexCoordPtr[i]->size; +	    GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;  	    fmt_1 |= sz << (3 * i);  	    EMIT_ATTR( _TNL_ATTRIB_TEX0+i, EMIT_1F + sz - 1, 0 ); diff --git a/src/mesa/drivers/dri/r300/r300_swtcl.c b/src/mesa/drivers/dri/r300/r300_swtcl.c index ee2c71e1a7..99bd22edac 100644 --- a/src/mesa/drivers/dri/r300/r300_swtcl.c +++ b/src/mesa/drivers/dri/r300/r300_swtcl.c @@ -124,7 +124,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead,  GLuint *_  	}  	if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) { -		VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->ColorPtr[1]; +		VB->AttribPtr[VERT_ATTRIB_GENERIC0] = VB->BackfaceColorPtr;  		OutputsWritten |= 1 << VERT_RESULT_BFC0;  #if MESA_LITTLE_ENDIAN  		EMIT_ATTR( _TNL_ATTRIB_GENERIC0, EMIT_4UB_4F_RGBA ); @@ -134,7 +134,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead,  GLuint *_  		ADD_ATTR(VERT_ATTRIB_GENERIC0, R300_DATA_TYPE_BYTE, SWTCL_OVM_COLOR2, SWIZZLE_XYZW, MASK_XYZW, 1);  #endif  		if (fp_reads & FRAG_BIT_COL1) { -			VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->SecondaryColorPtr[1]; +			VB->AttribPtr[VERT_ATTRIB_GENERIC1] = VB->BackfaceSecondaryColorPtr;  			GLuint swiz = MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_Y, SWIZZLE_Z, SWIZZLE_ONE);  			OutputsWritten |= 1 << VERT_RESULT_BFC1;  #if MESA_LITTLE_ENDIAN @@ -159,7 +159,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead,  GLuint *_  		int tex_id = rmesa->selected_fp->wpos_attr - FRAG_ATTRIB_TEX0;  		VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS]; -		VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_POS]; +		VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_POS];  		RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id);  	} @@ -167,7 +167,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead,  GLuint *_  		int tex_id = rmesa->selected_fp->fog_attr - FRAG_ATTRIB_TEX0;  		VB->AttribPtr[VERT_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG]; -		VB->TexCoordPtr[tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG]; +		VB->AttribPtr[_TNL_ATTRIB_TEX0 + tex_id] = VB->AttribPtr[VERT_ATTRIB_FOG];  		RENDERINPUTS_SET(tnl->render_inputs_bitset, _TNL_ATTRIB_TEX0 + tex_id);  	} @@ -180,7 +180,7 @@ void r300ChooseSwtclVertexFormat(GLcontext *ctx, GLuint *_InputsRead,  GLuint *_  		GLuint swiz, format, hw_format;  		for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {  			if (fp_reads & FRAG_BIT_TEX(i)) { -				switch (VB->TexCoordPtr[i]->size) { +				switch (VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size) {  					case 1:  						format = EMIT_1F;  						hw_format = R300_DATA_TYPE_FLOAT_1; diff --git a/src/mesa/drivers/dri/r600/r600_context.c b/src/mesa/drivers/dri/r600/r600_context.c index dbd233729c..7de29e5bb8 100644 --- a/src/mesa/drivers/dri/r600/r600_context.c +++ b/src/mesa/drivers/dri/r600/r600_context.c @@ -74,6 +74,8 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  #include "utils.h"  #include "xmlpool.h"		/* for symbolic values of enum-type options */ +//#define R600_ENABLE_GLSL_TEST 1 +  #define need_GL_VERSION_2_0  #define need_GL_ARB_occlusion_query  #define need_GL_ARB_point_parameters @@ -155,7 +157,11 @@ static const struct dri_extension mm_extensions[] = {   * functions added by GL_ATI_separate_stencil.   */  static const struct dri_extension gl_20_extension[] = { +#ifdef R600_ENABLE_GLSL_TEST +    {"GL_ARB_shading_language_100",			GL_VERSION_2_0_functions }, +#else    {"GL_VERSION_2_0",			GL_VERSION_2_0_functions }, +#endif /* R600_ENABLE_GLSL_TEST */  };  static const struct tnl_pipeline_stage *r600_pipeline[] = { @@ -308,6 +314,27 @@ static void r600InitGLExtensions(GLcontext *ctx)  	if (r600->radeon.radeonScreen->kernel_mm)  	  driInitExtensions(ctx, mm_extensions, GL_FALSE); +#ifdef R600_ENABLE_GLSL_TEST +    driInitExtensions(ctx, gl_20_extension, GL_TRUE); +    //_mesa_enable_2_0_extensions(ctx); +    //1.5 +    ctx->Extensions.ARB_occlusion_query = GL_TRUE; +    ctx->Extensions.ARB_vertex_buffer_object = GL_TRUE; +    ctx->Extensions.EXT_shadow_funcs = GL_TRUE; +    //2.0 +    ctx->Extensions.ARB_draw_buffers = GL_TRUE; +    ctx->Extensions.ARB_point_sprite = GL_TRUE; +    ctx->Extensions.ARB_shader_objects = GL_TRUE; +    ctx->Extensions.ARB_vertex_shader = GL_TRUE; +    ctx->Extensions.ARB_fragment_shader = GL_TRUE; +    ctx->Extensions.ARB_texture_non_power_of_two = GL_TRUE; +    ctx->Extensions.EXT_blend_equation_separate = GL_TRUE; +    ctx->Extensions.ATI_separate_stencil = GL_TRUE; + +    /* glsl compiler has problem if this is not GL_TRUE */ +    ctx->Shader.EmitCondCodes = GL_TRUE; +#endif /* R600_ENABLE_GLSL_TEST */ +  	if (driQueryOptionb  	    (&r600->radeon.optionCache, "disable_stencil_two_side"))  		_mesa_disable_extension(ctx, "GL_EXT_stencil_two_side"); diff --git a/src/mesa/drivers/dri/r600/r700_assembler.c b/src/mesa/drivers/dri/r600/r700_assembler.c index e0d7d4fa6b..8e57396a0d 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.c +++ b/src/mesa/drivers/dri/r600/r700_assembler.c @@ -38,6 +38,9 @@  #include "r700_assembler.h" +#define USE_CF_FOR_CONTINUE_BREAK 1 +#define USE_CF_FOR_POP_AFTER      1 +  BITS addrmode_PVSDST(PVSDST * pPVSDST)  {  	return pPVSDST->addrmode0 | ((BITS)pPVSDST->addrmode1 << 1); @@ -337,12 +340,17 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm)      switch (pAsm->D.dst.opcode)      {      case SQ_OP2_INST_ADD: +    case SQ_OP2_INST_KILLE:      case SQ_OP2_INST_KILLGT: +    case SQ_OP2_INST_KILLGE: +    case SQ_OP2_INST_KILLNE:      case SQ_OP2_INST_MUL:       case SQ_OP2_INST_MAX:      case SQ_OP2_INST_MIN:      //case SQ_OP2_INST_MAX_DX10:      //case SQ_OP2_INST_MIN_DX10: +    case SQ_OP2_INST_SETE:  +    case SQ_OP2_INST_SETNE:      case SQ_OP2_INST_SETGT:      case SQ_OP2_INST_SETGE:      case SQ_OP2_INST_PRED_SETE: @@ -358,6 +366,7 @@ unsigned int r700GetNumOperands(r700_AssemblerBase* pAsm)      case SQ_OP2_INST_MOVA_FLOOR:      case SQ_OP2_INST_FRACT:      case SQ_OP2_INST_FLOOR: +    case SQ_OP2_INST_TRUNC:      case SQ_OP2_INST_EXP_IEEE:      case SQ_OP2_INST_LOG_CLAMPED:      case SQ_OP2_INST_LOG_IEEE: @@ -383,98 +392,115 @@ int Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700      pAsm->pR700Shader = pShader;      pAsm->currentShaderType = spt; -	pAsm->cf_last_export_ptr   = NULL; +    pAsm->cf_last_export_ptr   = NULL; + +    pAsm->cf_current_export_clause_ptr = NULL; +    pAsm->cf_current_alu_clause_ptr    = NULL; +    pAsm->cf_current_tex_clause_ptr    = NULL; +    pAsm->cf_current_vtx_clause_ptr    = NULL; +    pAsm->cf_current_cf_clause_ptr     = NULL; -	pAsm->cf_current_export_clause_ptr = NULL; -	pAsm->cf_current_alu_clause_ptr    = NULL; -	pAsm->cf_current_tex_clause_ptr    = NULL; -	pAsm->cf_current_vtx_clause_ptr    = NULL; -	pAsm->cf_current_cf_clause_ptr     = NULL; +    // No clause has been created yet +    pAsm->cf_current_clause_type = CF_EMPTY_CLAUSE; -	// No clause has been created yet -	pAsm->cf_current_clause_type = CF_EMPTY_CLAUSE; +    pAsm->number_of_colorandz_exports = 0; +    pAsm->number_of_exports           = 0; +    pAsm->number_of_export_opcodes    = 0; -	pAsm->number_of_colorandz_exports = 0; -	pAsm->number_of_exports           = 0; -	pAsm->number_of_export_opcodes    = 0; +    pAsm->alu_x_opcode = 0; +    pAsm->D2.bits = 0; -	pAsm->D.bits = 0; -	pAsm->S[0].bits = 0; -	pAsm->S[1].bits = 0; -	pAsm->S[2].bits = 0; +    pAsm->D.bits = 0; +    pAsm->S[0].bits = 0; +    pAsm->S[1].bits = 0; +    pAsm->S[2].bits = 0; -	pAsm->uLastPosUpdate = 0;  +    pAsm->uLastPosUpdate = 0;  -	*(BITS *) &pAsm->fp_stOutFmt0 = 0; +    *(BITS *) &pAsm->fp_stOutFmt0 = 0; -	pAsm->uIIns = 0; -	pAsm->uOIns = 0; -	pAsm->number_used_registers = 0; -	pAsm->uUsedConsts = 256;  +    pAsm->uIIns = 0; +    pAsm->uOIns = 0; +    pAsm->number_used_registers = 0; +    pAsm->uUsedConsts = 256;  -	// Fragment programs -	pAsm->uBoolConsts = 0; -	pAsm->uIntConsts = 0; -	pAsm->uInsts = 0; -	pAsm->uConsts = 0; +    // Fragment programs +    pAsm->uBoolConsts = 0; +    pAsm->uIntConsts = 0; +    pAsm->uInsts = 0; +    pAsm->uConsts = 0; -	pAsm->FCSP = 0; -	pAsm->fc_stack[0].type = FC_NONE; +    pAsm->FCSP = 0; +    pAsm->fc_stack[0].type = FC_NONE; -	pAsm->branch_depth     = 0; -	pAsm->max_branch_depth = 0; +    pAsm->aArgSubst[0] = +    pAsm->aArgSubst[1] = +    pAsm->aArgSubst[2] = +    pAsm->aArgSubst[3] = (-1); -	pAsm->aArgSubst[0] = -	pAsm->aArgSubst[1] = -	pAsm->aArgSubst[2] = -	pAsm->aArgSubst[3] = (-1); +    pAsm->uOutputs = 0; -	pAsm->uOutputs = 0; +    for (i=0; i<NUMBER_OF_OUTPUT_COLORS; i++)  +    { +        pAsm->color_export_register_number[i] = (-1); +    } -	for (i=0; i<NUMBER_OF_OUTPUT_COLORS; i++)  -	{ -		pAsm->color_export_register_number[i] = (-1); -	} +    pAsm->depth_export_register_number = (-1); +    pAsm->stencil_export_register_number = (-1); +    pAsm->coverage_to_mask_export_register_number = (-1); +    pAsm->mask_export_register_number = (-1); -	pAsm->depth_export_register_number = (-1); -	pAsm->stencil_export_register_number = (-1); -	pAsm->coverage_to_mask_export_register_number = (-1); -	pAsm->mask_export_register_number = (-1); +    pAsm->starting_export_register_number = 0; +    pAsm->starting_vfetch_register_number = 0; +    pAsm->starting_temp_register_number   = 0; +    pAsm->uFirstHelpReg = 0; -	pAsm->starting_export_register_number = 0; -	pAsm->starting_vfetch_register_number = 0; -	pAsm->starting_temp_register_number   = 0; -	pAsm->uFirstHelpReg = 0; +    pAsm->input_position_is_used = GL_FALSE; +    pAsm->input_normal_is_used   = GL_FALSE; +    for (i=0; i<NUMBER_OF_INPUT_COLORS; i++)  +    { +        pAsm->input_color_is_used[ i ] = GL_FALSE; +    } -	pAsm->input_position_is_used = GL_FALSE; -	pAsm->input_normal_is_used   = GL_FALSE; +    for (i=0; i<NUMBER_OF_TEXTURE_UNITS; i++)  +    { +        pAsm->input_texture_unit_is_used[ i ] = GL_FALSE; +    } +    for (i=0; i<VERT_ATTRIB_MAX; i++)  +    { +        pAsm->vfetch_instruction_ptr_array[ i ] = NULL; +    } -	for (i=0; i<NUMBER_OF_INPUT_COLORS; i++)  -	{ -		pAsm->input_color_is_used[ i ] = GL_FALSE; -	} +    pAsm->number_of_inputs = 0; -	for (i=0; i<NUMBER_OF_TEXTURE_UNITS; i++)  -	{ -		pAsm->input_texture_unit_is_used[ i ] = GL_FALSE; -	} +    pAsm->is_tex = GL_FALSE; +    pAsm->need_tex_barrier = GL_FALSE; -	for (i=0; i<VERT_ATTRIB_MAX; i++)  -	{ -		pAsm->vfetch_instruction_ptr_array[ i ] = NULL; -	} +    pAsm->subs              = NULL; +    pAsm->unSubArraySize    = 0; +    pAsm->unSubArrayPointer = 0; +    pAsm->callers              = NULL; +    pAsm->unCallerArraySize    = 0; +    pAsm->unCallerArrayPointer = 0; + +    pAsm->CALLSP = 0; +    pAsm->CALLSTACK[0].FCSP_BeforeEntry = 0; +    pAsm->CALLSTACK[0].plstCFInstructions_local +          = &(pAsm->pR700Shader->lstCFInstructions); -	pAsm->number_of_inputs = 0; +    pAsm->CALLSTACK[0].max = 0; +    pAsm->CALLSTACK[0].current = 0; -	pAsm->is_tex = GL_FALSE; -	pAsm->need_tex_barrier = GL_FALSE; +    SetActiveCFlist(pAsm->pR700Shader, pAsm->CALLSTACK[0].plstCFInstructions_local); -	return 0; +    pAsm->unCFflags = 0; + +    return 0;  }  GLboolean IsTex(gl_inst_opcode Opcode) @@ -592,6 +618,31 @@ int check_current_clause(r700_AssemblerBase* pAsm,      return GL_TRUE;  } +GLboolean add_cf_instruction(r700_AssemblerBase* pAsm) +{ +    if(GL_FALSE == check_current_clause(pAsm, CF_OTHER_CLAUSE)) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr =  +      (R700ControlFlowGenericClause*) CALLOC_STRUCT(R700ControlFlowGenericClause); + +    if (pAsm->cf_current_cf_clause_ptr != NULL)  +	{ +		Init_R700ControlFlowGenericClause(pAsm->cf_current_cf_clause_ptr); +		AddCFInstruction( pAsm->pR700Shader,  +                          (R700ControlFlowInstruction *)pAsm->cf_current_cf_clause_ptr ); +	} +	else  +	{ +        radeon_error("Could not allocate a new VFetch CF instruction.\n"); +		return GL_FALSE; +	} + +    return GL_TRUE; +} +  GLboolean add_vfetch_instruction(r700_AssemblerBase*     pAsm,  								 R700VertexInstruction*  vertex_instruction_ptr)  { @@ -1153,6 +1204,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm,          case PROGRAM_LOCAL_PARAM:          case PROGRAM_ENV_PARAM:          case PROGRAM_STATE_VAR: +        case PROGRAM_UNIFORM:              if (1 == pILInst->SrcReg[src].RelAddr)              {                  setaddrmode_PVSSRC(&(pAsm->S[fld].src), ADDR_RELATIVE_A0); @@ -1179,7 +1231,7 @@ GLboolean assemble_src(r700_AssemblerBase *pAsm,              }              break;                default: -            radeon_error("Invalid source argument type\n"); +            radeon_error("Invalid source argument type : %d \n", pILInst->SrcReg[src].File);              return GL_FALSE;          }      }  @@ -1315,7 +1367,7 @@ GLboolean tex_src(r700_AssemblerBase *pAsm)                  case FRAG_ATTRIB_TEX0:                  case FRAG_ATTRIB_TEX1:                  case FRAG_ATTRIB_TEX2: -	        case FRAG_ATTRIB_TEX3: +                case FRAG_ATTRIB_TEX3:                  case FRAG_ATTRIB_TEX4:                  case FRAG_ATTRIB_TEX5:                  case FRAG_ATTRIB_TEX6: @@ -1331,10 +1383,17 @@ GLboolean tex_src(r700_AssemblerBase *pAsm)                  case FRAG_ATTRIB_PNTC:                      fprintf(stderr, "FRAG_ATTRIB_PNTC unsupported\n");                      break; -                case FRAG_ATTRIB_VAR0: -                    fprintf(stderr, "FRAG_ATTRIB_VAR0 unsupported\n"); -                    break;              } + +            if( (pILInst->SrcReg[0].Index >= FRAG_ATTRIB_VAR0) || +                (pILInst->SrcReg[0].Index < FRAG_ATTRIB_MAX) ) +            { +				bValidTexCoord = GL_TRUE; +                pAsm->S[0].src.reg   = +                    pAsm->uiFP_AttributeMap[pILInst->SrcReg[0].Index]; +                pAsm->S[0].src.rtype = SRC_REG_INPUT; +            } +          break;          }      } @@ -1517,6 +1576,10 @@ GLboolean assemble_alu_src(R700ALUInstruction*  alu_instruction_ptr,          {              src_sel = pSource->reg + CFILE_REGISTER_OFFSET;                      } +        else if (pSource->rtype == SRC_REC_LITERAL) +        { +            src_sel = SQ_ALU_SRC_LITERAL;             +        }          else          {              radeon_error("Source (%d) register type (%d) not one of TEMP, INPUT, or CONSTANT.\n", @@ -1606,7 +1669,8 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,          return GL_FALSE;      } -    if ( pAsm->cf_current_alu_clause_ptr == NULL || +    if ( pAsm->alu_x_opcode != 0 || +         pAsm->cf_current_alu_clause_ptr == NULL ||           ( (pAsm->cf_current_alu_clause_ptr != NULL) &&              (pAsm->cf_current_alu_clause_ptr->m_Word1.f.count >= (GetCFMaxInstructions(pAsm->cf_current_alu_clause_ptr->m_ShaderInstType)-contiguous_slots_needed-1) )           ) )  @@ -1636,9 +1700,17 @@ GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,          pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr0 = 0x0;          pAsm->cf_current_alu_clause_ptr->m_Word1.f.kcache_addr1 = 0x0; -        //cf_current_alu_clause_ptr->m_Word1.f.count           = number_of_scalar_operations - 1;          pAsm->cf_current_alu_clause_ptr->m_Word1.f.count           = 0x0; -        pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst         = SQ_CF_INST_ALU; + +        if(pAsm->alu_x_opcode != 0) +        { +            pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = pAsm->alu_x_opcode; +            pAsm->alu_x_opcode = 0; +        } +        else +        { +            pAsm->cf_current_alu_clause_ptr->m_Word1.f.cf_inst = SQ_CF_INST_ALU; +        }          pAsm->cf_current_alu_clause_ptr->m_Word1.f.whole_quad_mode = 0x0; @@ -2358,6 +2430,506 @@ GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm)      return GL_TRUE;  } +GLboolean assemble_alu_instruction2(r700_AssemblerBase *pAsm) +{ +    GLuint    number_of_scalar_operations; +    GLboolean is_single_scalar_operation; +    GLuint    scalar_channel_index; + +    PVSSRC * pcurrent_source; +    int    current_source_index; +    GLuint contiguous_slots_needed; + +    GLuint    uNumSrc = r700GetNumOperands(pAsm); +     +    GLboolean bSplitInst = GL_FALSE; + +    if (1 == pAsm->D.dst.math)  +    { +        is_single_scalar_operation = GL_TRUE; +        number_of_scalar_operations = 1; +    } +    else  +    { +        is_single_scalar_operation = GL_FALSE; +        number_of_scalar_operations = 4; +    } + +    contiguous_slots_needed = 0; + +    if(GL_TRUE == is_reduction_opcode(&(pAsm->D)) )  +    { +        contiguous_slots_needed = 4; +    } + +    initialize(pAsm);     + +    for (scalar_channel_index=0; +            scalar_channel_index < number_of_scalar_operations;  +                scalar_channel_index++)  +    { +        R700ALUInstruction* alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction); +        if (alu_instruction_ptr == NULL)  +        { +            return GL_FALSE; +        } +        Init_R700ALUInstruction(alu_instruction_ptr); +         +        //src 0 +        current_source_index = 0; +        pcurrent_source = &(pAsm->S[0].src); + +        if (GL_FALSE == assemble_alu_src(alu_instruction_ptr, +                                         current_source_index, +                                         pcurrent_source,  +                                         scalar_channel_index) )      +        { +            return GL_FALSE; +        } +    +        if (uNumSrc > 1)  +        {             +            // Process source 1             +            current_source_index = 1; +            pcurrent_source = &(pAsm->S[current_source_index].src); + +            if (GL_FALSE == assemble_alu_src(alu_instruction_ptr, +                                             current_source_index, +                                             pcurrent_source,  +                                             scalar_channel_index) )  +            { +                return GL_FALSE; +            } +        } + +        //other bits +        alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_LOOP; + +        if(   (is_single_scalar_operation == GL_TRUE)  +           || (GL_TRUE == bSplitInst) ) +        { +            alu_instruction_ptr->m_Word0.f.last = 1; +        } +        else  +        { +            alu_instruction_ptr->m_Word0.f.last = (scalar_channel_index == 3) ?  1 : 0; +        } + +        alu_instruction_ptr->m_Word0.f.pred_sel = (pAsm->D.dst.pred_inv > 0) ? 1 : 0; +        if(1 == pAsm->D.dst.predicated) +        { +            alu_instruction_ptr->m_Word1_OP2.f.update_pred         = 0x1;   +            alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x1;  +        } +        else +        { +            alu_instruction_ptr->m_Word1_OP2.f.update_pred         = 0x0;   +            alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0;  +        } +        +        // dst +        if( (pAsm->D.dst.rtype == DST_REG_TEMPORARY) ||  +            (pAsm->D.dst.rtype == DST_REG_OUT) )  +        { +            alu_instruction_ptr->m_Word1.f.dst_gpr  = pAsm->D.dst.reg; +        } +        else  +        { +            radeon_error("Only temp destination registers supported for ALU dest regs.\n"); +            return GL_FALSE; +        } + +        alu_instruction_ptr->m_Word1.f.dst_rel  = SQ_ABSOLUTE;  //D.rtype + +        if ( is_single_scalar_operation == GL_TRUE )  +        { +            // Override scalar_channel_index since only one scalar value will be written +            if(pAsm->D.dst.writex)  +            { +                scalar_channel_index = 0; +            } +            else if(pAsm->D.dst.writey)  +            { +                scalar_channel_index = 1; +            } +            else if(pAsm->D.dst.writez)  +            { +                scalar_channel_index = 2; +            } +            else if(pAsm->D.dst.writew)  +            { +                scalar_channel_index = 3; +            } +        } + +        alu_instruction_ptr->m_Word1.f.dst_chan = scalar_channel_index; + +        alu_instruction_ptr->m_Word1.f.clamp    = pAsm->D2.dst2.SaturateMode; + +        if (pAsm->D.dst.op3)  +        {             +            //op3 + +            alu_instruction_ptr->m_Word1_OP3.f.alu_inst = pAsm->D.dst.opcode; + +            //There's 3rd src for op3 +            current_source_index = 2; +            pcurrent_source = &(pAsm->S[current_source_index].src); + +            if ( GL_FALSE == assemble_alu_src(alu_instruction_ptr, +                                              current_source_index, +                                              pcurrent_source,  +                                              scalar_channel_index) )  +            { +                return GL_FALSE; +            } +        } +        else  +        { +            //op2 +            if (pAsm->bR6xx) +            { +                alu_instruction_ptr->m_Word1_OP2.f6.alu_inst           = pAsm->D.dst.opcode; + +                alu_instruction_ptr->m_Word1_OP2.f6.src0_abs           = 0x0; +                alu_instruction_ptr->m_Word1_OP2.f6.src1_abs           = 0x0; + +                //alu_instruction_ptr->m_Word1_OP2.f6.update_execute_mask = 0x0; +                //alu_instruction_ptr->m_Word1_OP2.f6.update_pred         = 0x0; +                switch (scalar_channel_index)  +                { +                    case 0:  +                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writex;  +                        break; +                    case 1:  +                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writey;  +                        break; +                    case 2:  +                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writez;  +                        break; +                    case 3:  +                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = pAsm->D.dst.writew;  +                        break; +                    default:  +                        alu_instruction_ptr->m_Word1_OP2.f6.write_mask = 1; //SQ_SEL_MASK; +                        break; +                }             +                alu_instruction_ptr->m_Word1_OP2.f6.omod               = SQ_ALU_OMOD_OFF; +            } +            else +            { +                alu_instruction_ptr->m_Word1_OP2.f.alu_inst           = pAsm->D.dst.opcode; + +                alu_instruction_ptr->m_Word1_OP2.f.src0_abs           = 0x0; +                alu_instruction_ptr->m_Word1_OP2.f.src1_abs           = 0x0; + +                //alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x0; +                //alu_instruction_ptr->m_Word1_OP2.f.update_pred         = 0x0; +                switch (scalar_channel_index)  +                { +                    case 0:  +                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writex;  +                        break; +                    case 1:  +                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writey;  +                        break; +                    case 2:  +                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writez;  +                        break; +                    case 3:  +                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = pAsm->D.dst.writew;  +                        break; +                    default:  +                        alu_instruction_ptr->m_Word1_OP2.f.write_mask = 1; //SQ_SEL_MASK; +                        break; +                }             +                alu_instruction_ptr->m_Word1_OP2.f.omod               = SQ_ALU_OMOD_OFF; +            } +        } + +        if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, contiguous_slots_needed) ) +        { +            return GL_FALSE; +        } + +        /* +         * Judge the type of current instruction, is it vector or scalar  +         * instruction. +         */         +        if (is_single_scalar_operation)  +        { +            if(GL_FALSE == check_scalar(pAsm, alu_instruction_ptr) ) +            { +                return GL_FALSE; +            } +        } +        else  +        { +            if(GL_FALSE == check_vector(pAsm, alu_instruction_ptr) ) +            { +                return 1; +            } +        } + +        contiguous_slots_needed = 0; +    } + +    return GL_TRUE; +} + +GLboolean assemble_alu_instruction_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral) +{ +    R700ALUInstruction            * alu_instruction_ptr; +    R700ALUInstructionHalfLiteral * alu_instruction_ptr_hl; +    R700ALUInstructionFullLiteral * alu_instruction_ptr_fl; + +    GLuint    number_of_scalar_operations; +    GLboolean is_single_scalar_operation; +    GLuint    scalar_channel_index; + +    GLuint   contiguous_slots_needed; +    GLuint   lastInstruction; +    GLuint   not_masked[4]; + +    GLuint    uNumSrc = r700GetNumOperands(pAsm); +     +    GLboolean bSplitInst = GL_FALSE; + +    number_of_scalar_operations = 0; +    contiguous_slots_needed     = 0; + +    if(1 == pAsm->D.dst.writew) +    { +        lastInstruction = 3; +        number_of_scalar_operations++; +        not_masked[3] = 1; +    } +    else +    { +        not_masked[3] = 0; +    } +    if(1 == pAsm->D.dst.writez) +    { +        lastInstruction = 2; +        number_of_scalar_operations++; +        not_masked[2] = 1; +    } +    else +    { +        not_masked[2] = 0; +    } +    if(1 == pAsm->D.dst.writey) +    { +        lastInstruction = 1; +        number_of_scalar_operations++; +        not_masked[1] = 1; +    } +    else +    { +        not_masked[1] = 0; +    } +    if(1 == pAsm->D.dst.writex) +    { +        lastInstruction = 0; +        number_of_scalar_operations++; +        not_masked[0] = 1; +    } +    else +    { +        not_masked[0] = 0; +    } +     +    if(GL_TRUE == is_reduction_opcode(&(pAsm->D)) )  +    { +        contiguous_slots_needed = 4; +    } +    else +    { +        contiguous_slots_needed = number_of_scalar_operations; +    } + +    if(1 == pAsm->D2.dst2.literal) +    { +        contiguous_slots_needed += 1; +    } +    else if(2 == pAsm->D2.dst2.literal) +    { +        contiguous_slots_needed += 2; +    } + +    initialize(pAsm);     + +    for (scalar_channel_index=0; scalar_channel_index < 4; scalar_channel_index++)  +    { +        if(0 == not_masked[scalar_channel_index]) +        { +            continue; +        } + +        if(scalar_channel_index == lastInstruction) +        { +            switch (pAsm->D2.dst2.literal) +            { +            case 0: +                alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction); +                if (alu_instruction_ptr == NULL)  +		        { +			        return GL_FALSE; +		        } +                Init_R700ALUInstruction(alu_instruction_ptr); +                break; +            case 1: +                alu_instruction_ptr_hl = (R700ALUInstructionHalfLiteral*) CALLOC_STRUCT(R700ALUInstructionHalfLiteral); +                if (alu_instruction_ptr_hl == NULL)  +		        { +			        return GL_FALSE; +		        } +                Init_R700ALUInstructionHalfLiteral(alu_instruction_ptr_hl, pLiteral[0], pLiteral[1]); +                alu_instruction_ptr = (R700ALUInstruction*)alu_instruction_ptr_hl; +                break; +            case 2: +                alu_instruction_ptr_fl = (R700ALUInstructionFullLiteral*) CALLOC_STRUCT(R700ALUInstructionFullLiteral); +                if (alu_instruction_ptr_fl == NULL)  +		        { +			        return GL_FALSE; +		        } +                Init_R700ALUInstructionFullLiteral(alu_instruction_ptr_fl, pLiteral[0], pLiteral[1], pLiteral[2], pLiteral[3]); +                alu_instruction_ptr = (R700ALUInstruction*)alu_instruction_ptr_fl; +                break; +            default: +                break; +            }; +        } +        else +        { +            alu_instruction_ptr = (R700ALUInstruction*) CALLOC_STRUCT(R700ALUInstruction); +            if (alu_instruction_ptr == NULL)  +		    { +			    return GL_FALSE; +		    } +            Init_R700ALUInstruction(alu_instruction_ptr); +        } + +        //src 0 +        if (GL_FALSE == assemble_alu_src(alu_instruction_ptr, +                                         0, +                                         &(pAsm->S[0].src),  +                                         scalar_channel_index) )      +        { +            return GL_FALSE; +        } +    +        if (uNumSrc > 1)  +        {             +            // Process source 1             +            if (GL_FALSE == assemble_alu_src(alu_instruction_ptr, +                                             1, +                                             &(pAsm->S[1].src),  +                                             scalar_channel_index) )  +            { +                return GL_FALSE; +            } +        } + +        //other bits +        alu_instruction_ptr->m_Word0.f.index_mode = SQ_INDEX_LOOP; + +        if(scalar_channel_index == lastInstruction) +        { +            alu_instruction_ptr->m_Word0.f.last = 1; +        } + +        alu_instruction_ptr->m_Word0.f.pred_sel = 0x0; +        if(1 == pAsm->D.dst.predicated) +        {             +            alu_instruction_ptr->m_Word1_OP2.f.update_pred         = 0x1;   +            alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0x1;  +        } +        else +        { +            alu_instruction_ptr->m_Word1_OP2.f.update_pred         = 0;   +            alu_instruction_ptr->m_Word1_OP2.f.update_execute_mask = 0;  +        } + +        // dst +        if( (pAsm->D.dst.rtype == DST_REG_TEMPORARY) ||  +            (pAsm->D.dst.rtype == DST_REG_OUT) )  +        { +            alu_instruction_ptr->m_Word1.f.dst_gpr  = pAsm->D.dst.reg; +        } +        else  +        { +            radeon_error("Only temp destination registers supported for ALU dest regs.\n"); +            return GL_FALSE; +        } + +        alu_instruction_ptr->m_Word1.f.dst_rel  = SQ_ABSOLUTE;  //D.rtype + +        alu_instruction_ptr->m_Word1.f.dst_chan = scalar_channel_index; + +        alu_instruction_ptr->m_Word1.f.clamp    = pAsm->D2.dst2.SaturateMode; + +        if (pAsm->D.dst.op3)  +        {             +            //op3 +            alu_instruction_ptr->m_Word1_OP3.f.alu_inst = pAsm->D.dst.opcode; + +            //There's 3rd src for op3 +            if ( GL_FALSE == assemble_alu_src(alu_instruction_ptr, +                                              2, +                                              &(pAsm->S[2].src),  +                                              scalar_channel_index) )  +            { +                return GL_FALSE; +            } +        } +        else  +        { +            //op2 +            if (pAsm->bR6xx) +            { +                alu_instruction_ptr->m_Word1_OP2.f6.alu_inst   = pAsm->D.dst.opcode; +                alu_instruction_ptr->m_Word1_OP2.f6.src0_abs   = 0x0; +                alu_instruction_ptr->m_Word1_OP2.f6.src1_abs   = 0x0; +                alu_instruction_ptr->m_Word1_OP2.f6.write_mask = 1;            +                alu_instruction_ptr->m_Word1_OP2.f6.omod       = SQ_ALU_OMOD_OFF; +            } +            else +            { +                alu_instruction_ptr->m_Word1_OP2.f.alu_inst    = pAsm->D.dst.opcode; +                alu_instruction_ptr->m_Word1_OP2.f.src0_abs    = 0x0; +                alu_instruction_ptr->m_Word1_OP2.f.src1_abs    = 0x0; +                alu_instruction_ptr->m_Word1_OP2.f.write_mask  = 1;                         +                alu_instruction_ptr->m_Word1_OP2.f.omod        = SQ_ALU_OMOD_OFF; +            } +        } + +        if(GL_FALSE == add_alu_instruction(pAsm, alu_instruction_ptr, contiguous_slots_needed) ) +        { +            return GL_FALSE; +        } +   +        if (1 == number_of_scalar_operations)  +        { +            if(GL_FALSE == check_scalar(pAsm, alu_instruction_ptr) ) +            { +                return GL_FALSE; +            } +        } +        else  +        { +            if(GL_FALSE == check_vector(pAsm, alu_instruction_ptr) ) +            { +                return GL_FALSE; +            } +        } + +        contiguous_slots_needed -= 2; +    } + +    return GL_TRUE; +} +  GLboolean next_ins(r700_AssemblerBase *pAsm)  {      struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]); @@ -2403,6 +2975,70 @@ GLboolean next_ins(r700_AssemblerBase *pAsm)      //reset for next inst.      pAsm->D.bits    = 0; +    pAsm->D2.bits   = 0; +    pAsm->S[0].bits = 0; +    pAsm->S[1].bits = 0; +    pAsm->S[2].bits = 0; +    pAsm->is_tex = GL_FALSE; +    pAsm->need_tex_barrier = GL_FALSE; + +    return GL_TRUE; +} + +GLboolean next_ins2(r700_AssemblerBase *pAsm) +{ +    struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]); + +    //ALU       +    if( GL_FALSE == assemble_alu_instruction2(pAsm) )  +    { +        radeon_error("Error assembling ALU instruction\n"); +        return GL_FALSE; +    } +      +    if(pAsm->D.dst.rtype == DST_REG_OUT)  +    { +        if(pAsm->D.dst.op3)  +        {         +            // There is no mask for OP3 instructions, so all channels are written         +            pAsm->pucOutMask[pAsm->D.dst.reg - pAsm->starting_export_register_number] = 0xF; +        } +        else  +        { +            pAsm->pucOutMask[pAsm->D.dst.reg - pAsm->starting_export_register_number]  +               |= (unsigned char)pAsm->pILInst[pAsm->uiCurInst].DstReg.WriteMask; +        } +    } +     +    //reset for next inst. +    pAsm->D.bits    = 0; +    pAsm->D2.bits   = 0; +    pAsm->S[0].bits = 0; +    pAsm->S[1].bits = 0; +    pAsm->S[2].bits = 0; +    pAsm->is_tex = GL_FALSE; +    pAsm->need_tex_barrier = GL_FALSE; + +    pAsm->D2.bits = 0; + +    return GL_TRUE; +} + +/* not work yet */ +GLboolean next_ins_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral) +{ +    struct prog_instruction *pILInst = &(pAsm->pILInst[pAsm->uiCurInst]); + +    //ALU       +    if( GL_FALSE == assemble_alu_instruction_literal(pAsm, pLiteral) )  +    { +        radeon_error("Error assembling ALU instruction\n"); +        return GL_FALSE; +    } +     +    //reset for next inst. +    pAsm->D.bits    = 0; +    pAsm->D2.bits   = 0;      pAsm->S[0].bits = 0;      pAsm->S[1].bits = 0;      pAsm->S[2].bits = 0; @@ -2910,13 +3546,12 @@ GLboolean assemble_FRC(r700_AssemblerBase *pAsm)      return GL_TRUE;  } -GLboolean assemble_KIL(r700_AssemblerBase *pAsm) -{ -    /* TODO: doc says KILL has to be last(end) ALU clause */ -     -    checkop1(pAsm); +GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode) +{   +    checkop2(pAsm); -    pAsm->D.dst.opcode = SQ_OP2_INST_KILLGT;   +    pAsm->D.dst.opcode = opcode;   +    pAsm->D.dst.math = 1;      setaddrmode_PVSDST(&(pAsm->D.dst), ADDR_ABSOLUTE);      pAsm->D.dst.rtype = DST_REG_TEMPORARY; @@ -2926,24 +3561,24 @@ GLboolean assemble_KIL(r700_AssemblerBase *pAsm)      pAsm->D.dst.writez = 0;      pAsm->D.dst.writew = 0; -    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); -    pAsm->S[0].src.rtype = SRC_REG_TEMPORARY; -    pAsm->S[0].src.reg = 0; - -    setswizzle_PVSSRC(&(pAsm->S[0].src), SQ_SEL_0); -    noneg_PVSSRC(&(pAsm->S[0].src)); +    if( GL_FALSE == assemble_src(pAsm, 0, -1) ) +    { +        return GL_FALSE; +    } -    if ( GL_FALSE == assemble_src(pAsm, 0, 1) ) +    if( GL_FALSE == assemble_src(pAsm, 1, -1) )      {          return GL_FALSE;      } -    if ( GL_FALSE == next_ins(pAsm) ) +    if ( GL_FALSE == next_ins2(pAsm) )      {          return GL_FALSE;      } +    /* Doc says KILL has to be last(end) ALU clause */      pAsm->pR700Shader->killIsUsed = GL_TRUE; +    pAsm->alu_x_opcode = SQ_CF_INST_ALU;      return GL_TRUE;  } @@ -3816,6 +4451,74 @@ GLboolean assemble_SCS(r700_AssemblerBase *pAsm)      return GL_TRUE;  } + +GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode)  +{ +    if( GL_FALSE == checkop2(pAsm) ) +    { +	    return GL_FALSE; +    } + +    pAsm->D.dst.opcode = opcode; +    pAsm->D.dst.math   = 1; + +    if( GL_FALSE == assemble_dst(pAsm) ) +    { +	    return GL_FALSE; +    } + +    if( GL_FALSE == assemble_src(pAsm, 0, -1) ) +    { +	    return GL_FALSE; +    } + +    if( GL_FALSE == assemble_src(pAsm, 1, -1) ) +    { +	    return GL_FALSE; +    } + +    if( GL_FALSE == next_ins(pAsm) )  +    { +	    return GL_FALSE; +    } + +    return GL_TRUE; +} + +GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode)  +{ +    if( GL_FALSE == checkop2(pAsm) ) +    { +	    return GL_FALSE; +    } + +    pAsm->D.dst.opcode = opcode; +    pAsm->D.dst.math   = 1; +    pAsm->D.dst.predicated = 1; +    pAsm->D2.dst2.SaturateMode = pAsm->pILInst[pAsm->uiCurInst].SaturateMode; + +    if( GL_FALSE == assemble_dst(pAsm) ) +    { +	    return GL_FALSE; +    } + +    if( GL_FALSE == assemble_src(pAsm, 0, -1) ) +    { +	    return GL_FALSE; +    } + +    if( GL_FALSE == assemble_src(pAsm, 1, -1) ) +    { +	    return GL_FALSE; +    } + +    if( GL_FALSE == next_ins2(pAsm) )  +    { +	    return GL_FALSE; +    } + +    return GL_TRUE; +}  GLboolean assemble_SGE(r700_AssemblerBase *pAsm)   { @@ -4273,27 +4976,874 @@ GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm)      return GL_TRUE;  } -GLboolean assemble_IF(r700_AssemblerBase *pAsm) +static inline void decreaseCurrent(r700_AssemblerBase *pAsm, GLuint uReason)  { +    switch (uReason) +    { +    case FC_PUSH_VPM: +        pAsm->CALLSTACK[pAsm->CALLSP].current--; +        break; +    case FC_PUSH_WQM: +        pAsm->CALLSTACK[pAsm->CALLSP].current -= 4; +        break; +    case FC_LOOP: +        pAsm->CALLSTACK[pAsm->CALLSP].current -= 4; +        break; +    case FC_REP: +        /* TODO : for 16 vp asic, should -= 2; */ +        pAsm->CALLSTACK[pAsm->CALLSP].current -= 1; +        break; +    }; +} + +static inline void checkStackDepth(r700_AssemblerBase *pAsm, GLuint uReason, GLboolean bCheckMaxOnly) +{ +    if(GL_TRUE == bCheckMaxOnly) +    { +        switch (uReason) +        { +        case FC_PUSH_VPM: +            if((pAsm->CALLSTACK[pAsm->CALLSP].current + 1) +                    > pAsm->CALLSTACK[pAsm->CALLSP].max) +            { +                pAsm->CALLSTACK[pAsm->CALLSP].max = +                    pAsm->CALLSTACK[pAsm->CALLSP].current + 1; +            } +            break; +        case FC_PUSH_WQM: +            if((pAsm->CALLSTACK[pAsm->CALLSP].current + 4) +                    > pAsm->CALLSTACK[pAsm->CALLSP].max) +            { +                pAsm->CALLSTACK[pAsm->CALLSP].max = +                    pAsm->CALLSTACK[pAsm->CALLSP].current + 4; +            } +            break; +        } +        return; +    } + +    switch (uReason) +    { +    case FC_PUSH_VPM: +        pAsm->CALLSTACK[pAsm->CALLSP].current++; +        break; +    case FC_PUSH_WQM: +        pAsm->CALLSTACK[pAsm->CALLSP].current += 4; +        break; +    case FC_LOOP: +        pAsm->CALLSTACK[pAsm->CALLSP].current += 4; +        break; +    case FC_REP: +        /* TODO : for 16 vp asic, should += 2; */ +        pAsm->CALLSTACK[pAsm->CALLSP].current += 1; +        break; +    }; + +    if(pAsm->CALLSTACK[pAsm->CALLSP].current +         > pAsm->CALLSTACK[pAsm->CALLSP].max) +    { +        pAsm->CALLSTACK[pAsm->CALLSP].max = +            pAsm->CALLSTACK[pAsm->CALLSP].current; +    } +} + +GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset) +{ +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = pops; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_JUMP; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + offset; + +    return GL_TRUE; +} + +GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops) +{ +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = pops; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_POP; +  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; +    pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr             = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + +    return GL_TRUE; +} + +GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse) +{ +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    if(GL_TRUE != bHasElse) +    { +        pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 1;  +    } +    else +    { +        pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count = 0; +    } +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_JUMP; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->FCSP++; +	pAsm->fc_stack[pAsm->FCSP].type  = FC_IF; +    pAsm->fc_stack[pAsm->FCSP].mid   = NULL; +    pAsm->fc_stack[pAsm->FCSP].midLen= 0; +    pAsm->fc_stack[pAsm->FCSP].first = pAsm->cf_current_cf_clause_ptr; + +#ifndef USE_CF_FOR_POP_AFTER +    if(GL_TRUE != bHasElse) +    { +        pAsm->alu_x_opcode = SQ_CF_INST_ALU_POP_AFTER; +    } +#endif /* USE_CF_FOR_POP_AFTER */ + +    checkStackDepth(pAsm, FC_PUSH_VPM, GL_FALSE);  + +    return GL_TRUE; +} + +GLboolean assemble_ELSE(r700_AssemblerBase *pAsm) +{ +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; /// +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_ELSE; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->fc_stack[pAsm->FCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc( (void *)pAsm->fc_stack[pAsm->FCSP].mid, +                                                                                     0, +                                                                                     sizeof(R700ControlFlowGenericClause *) ); +    pAsm->fc_stack[pAsm->FCSP].mid[0] = pAsm->cf_current_cf_clause_ptr; +    //pAsm->fc_stack[pAsm->FCSP].unNumMid = 1; + +#ifndef USE_CF_FOR_POP_AFTER +    pAsm->alu_x_opcode = SQ_CF_INST_ALU_POP_AFTER; +#endif /* USE_CF_FOR_POP_AFTER */ + +    pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode - 1;  +      return GL_TRUE;  }  GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm)  { +#ifdef USE_CF_FOR_POP_AFTER +    pops(pAsm, 1);  +#endif /* USE_CF_FOR_POP_AFTER */ + +    pAsm->alu_x_opcode = SQ_CF_INST_ALU; + +    if(NULL == pAsm->fc_stack[pAsm->FCSP].mid) +    { +        /* no else in between */ +        pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode; +    } +    else +    { +        pAsm->fc_stack[pAsm->FCSP].mid[0]->m_Word0.f.addr = pAsm->pR700Shader->plstCFInstructions_active->uNumOfNode; +    } + +    if(NULL != pAsm->fc_stack[pAsm->FCSP].mid) +    { +        FREE(pAsm->fc_stack[pAsm->FCSP].mid); +    } + +    if(pAsm->fc_stack[pAsm->FCSP].type != FC_IF) +    { +        radeon_error("if/endif in shader code are not paired. \n"); +        return GL_FALSE; +    } +     +    pAsm->FCSP--; + +    decreaseCurrent(pAsm, FC_PUSH_VPM); + +    return GL_TRUE; +} + +GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm) +{ +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +     +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_LOOP_START_NO_AL; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->FCSP++; +	pAsm->fc_stack[pAsm->FCSP].type  = FC_LOOP; +    pAsm->fc_stack[pAsm->FCSP].mid   = NULL; +    pAsm->fc_stack[pAsm->FCSP].unNumMid = 0; +    pAsm->fc_stack[pAsm->FCSP].midLen   = 0; +    pAsm->fc_stack[pAsm->FCSP].first    = pAsm->cf_current_cf_clause_ptr; + +    checkStackDepth(pAsm, FC_LOOP, GL_FALSE); + +    return GL_TRUE; +} + +GLboolean assemble_BRK(r700_AssemblerBase *pAsm) +{ +#ifdef USE_CF_FOR_CONTINUE_BREAK +    unsigned int unFCSP; +    for(unFCSP=pAsm->FCSP; unFCSP>0; unFCSP--) +    { +        if(FC_LOOP == pAsm->fc_stack[unFCSP].type) +        { +            break; +        } +    } +    if(0 == FC_LOOP) +    { +        radeon_error("Break is not inside loop/endloop pair.\n"); +        return GL_FALSE; +    } + +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +     +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_LOOP_BREAK; +  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(  +                                              (void *)pAsm->fc_stack[unFCSP].mid, +                                              sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid, +                                              sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) ); +    pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr; +    pAsm->fc_stack[unFCSP].unNumMid++; + +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_POP; +  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; +    pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr             = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + +    checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE); + +#endif //USE_CF_FOR_CONTINUE_BREAK      return GL_TRUE;  } -GLboolean AssembleInstr(GLuint uiNumberInsts, +GLboolean assemble_CONT(r700_AssemblerBase *pAsm) +{ +#ifdef USE_CF_FOR_CONTINUE_BREAK +    unsigned int unFCSP; +    for(unFCSP=pAsm->FCSP; unFCSP>0; unFCSP--) +    { +        if(FC_LOOP == pAsm->fc_stack[unFCSP].type) +        { +            break; +        } +    } +    if(0 == FC_LOOP) +    { +        radeon_error("Continue is not inside loop/endloop pair.\n"); +        return GL_FALSE; +    } + +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +     +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_LOOP_CONTINUE; +  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(  +                                              (void *)pAsm->fc_stack[unFCSP].mid, +                                              sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid, +                                              sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) ); +    pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr; +    pAsm->fc_stack[unFCSP].unNumMid++; + +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_POP; +  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; +    pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr             = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + +    checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE); + +#endif /* USE_CF_FOR_CONTINUE_BREAK */ + +    return GL_TRUE; +} + +GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm) +{ +    GLuint i; + +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +     +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_LOOP_END; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->cf_current_cf_clause_ptr->m_Word0.f.addr   = pAsm->fc_stack[pAsm->FCSP].first->m_uIndex + 1; +    pAsm->fc_stack[pAsm->FCSP].first->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex + 1; + +#ifdef USE_CF_FOR_CONTINUE_BREAK +    for(i=0; i<pAsm->fc_stack[pAsm->FCSP].unNumMid; i++) +    { +        pAsm->fc_stack[pAsm->FCSP].mid[i]->m_Word0.f.addr = pAsm->cf_current_cf_clause_ptr->m_uIndex; +    } +    if(NULL != pAsm->fc_stack[pAsm->FCSP].mid) +    { +        FREE(pAsm->fc_stack[pAsm->FCSP].mid); +    } +#endif + +    if(pAsm->fc_stack[pAsm->FCSP].type != FC_LOOP) +    { +        radeon_error("loop/endloop in shader code are not paired. \n"); +        return GL_FALSE; +    } + +    GLuint unFCSP; +    GLuint unIF = 0; +    if((pAsm->unCFflags & HAS_CURRENT_LOOPRET) > 0) +    {         +        for(unFCSP=(pAsm->FCSP-1); unFCSP>pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry; unFCSP--) +        { +            if(FC_LOOP == pAsm->fc_stack[unFCSP].type) +            { +                breakLoopOnFlag(pAsm, unFCSP); +                break; +            } +            else if(FC_IF == pAsm->fc_stack[unFCSP].type) +            { +                unIF++; +            } +        } +        if(unFCSP <= pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry) +        {             +#ifdef USE_CF_FOR_POP_AFTER +            returnOnFlag(pAsm, unIF);  +#else +            returnOnFlag(pAsm, 0); +#endif /* USE_CF_FOR_POP_AFTER */ +            pAsm->unCFflags &= ~HAS_CURRENT_LOOPRET; +        } +    } + +    pAsm->FCSP--; + +    decreaseCurrent(pAsm, FC_LOOP); +     +    return GL_TRUE; +} + +void add_return_inst(r700_AssemblerBase *pAsm) +{ +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } +    //pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_RETURN; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; +} + +GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex) +{ +    /* Put in sub */ +    if( (pAsm->unSubArrayPointer + 1) > pAsm->unSubArraySize ) +    { +        pAsm->subs = (SUB_OFFSET*)_mesa_realloc( (void *)pAsm->subs, +                                  sizeof(SUB_OFFSET) * pAsm->unSubArraySize, +                                  sizeof(SUB_OFFSET) * (pAsm->unSubArraySize + 10) ); +        if(NULL == pAsm->subs) +        { +            return GL_FALSE; +        } +        pAsm->unSubArraySize += 10; +    } + +    pAsm->subs[pAsm->unSubArrayPointer].subIL_Offset = nILindex; +    pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.pHead=NULL;   +    pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.pTail=NULL;   +    pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local.uNumOfNode=0; + +    pAsm->CALLSP++; +    pAsm->CALLSTACK[pAsm->CALLSP].subDescIndex = pAsm->unSubArrayPointer; +    pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry = pAsm->FCSP; +    pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local +                   = &(pAsm->subs[pAsm->unSubArrayPointer].lstCFInstructions_local); +    pAsm->CALLSTACK[pAsm->CALLSP].max = 0; +    pAsm->CALLSTACK[pAsm->CALLSP].current = 0; +    SetActiveCFlist(pAsm->pR700Shader,  +                    pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local); + +    pAsm->unSubArrayPointer++; + +    /* start sub */ +    pAsm->alu_x_opcode = SQ_CF_INST_ALU; + +    pAsm->FCSP++; +    pAsm->fc_stack[pAsm->FCSP].type  = FC_REP; + +    checkStackDepth(pAsm, FC_REP, GL_FALSE); + +    return GL_TRUE; +} + +GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm) +{ +    if(pAsm->fc_stack[pAsm->FCSP].type != FC_REP) +    { +        radeon_error("BGNSUB/ENDSUB in shader code are not paired. \n"); +        return GL_FALSE; +    } + +    /* copy max to sub structure */ +    pAsm->subs[pAsm->CALLSTACK[pAsm->CALLSP].subDescIndex].unStackDepthMax +        = pAsm->CALLSTACK[pAsm->CALLSP].max; + +    decreaseCurrent(pAsm, FC_REP); + +    pAsm->CALLSP--; +    SetActiveCFlist(pAsm->pR700Shader,  +                    pAsm->CALLSTACK[pAsm->CALLSP].plstCFInstructions_local); +     +    pAsm->alu_x_opcode = SQ_CF_INST_ALU; + +    pAsm->FCSP--; + +    return GL_TRUE; +} + +GLboolean assemble_RET(r700_AssemblerBase *pAsm) +{ +    GLuint unIF = 0; + +    if(pAsm->CALLSP > 0) +    {   /* in sub */ +        GLuint unFCSP;         +        for(unFCSP=pAsm->FCSP; unFCSP>pAsm->CALLSTACK[pAsm->CALLSP].FCSP_BeforeEntry; unFCSP--) +        { +            if(FC_LOOP == pAsm->fc_stack[unFCSP].type) +            { +                setRetInLoopFlag(pAsm, SQ_SEL_1); +                breakLoopOnFlag(pAsm, unFCSP); +                pAsm->unCFflags |= LOOPRET_FLAGS; + +                return GL_TRUE; +            } +            else if(FC_IF == pAsm->fc_stack[unFCSP].type) +            { +                unIF++; +            } +        } +    } + +#ifdef USE_CF_FOR_POP_AFTER     +    if(unIF > 0) +    { +        pops(pAsm, unIF); +    } +#endif /* USE_CF_FOR_POP_AFTER */ + +    add_return_inst(pAsm); + +    return GL_TRUE; +} + +GLboolean assemble_CAL(r700_AssemblerBase *pAsm,  +                       GLint nILindex, +                       GLuint uiNumberInsts, +                       struct prog_instruction *pILInst) +{ +    pAsm->alu_x_opcode = SQ_CF_INST_ALU; + +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.call_count       = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_CALL; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    /* Put in caller */ +    if( (pAsm->unCallerArrayPointer + 1) > pAsm->unCallerArraySize ) +    { +        pAsm->callers = (CALLER_POINTER*)_mesa_realloc( (void *)pAsm->callers,  +                       sizeof(CALLER_POINTER) * pAsm->unCallerArraySize,  +                       sizeof(CALLER_POINTER) * (pAsm->unCallerArraySize + 10) ); +        if(NULL == pAsm->callers) +        { +            return GL_FALSE; +        } +        pAsm->unCallerArraySize += 10; +    } +     +    pAsm->callers[pAsm->unCallerArrayPointer].subIL_Offset = nILindex; +    pAsm->callers[pAsm->unCallerArrayPointer].cf_ptr       = pAsm->cf_current_cf_clause_ptr;  + +    pAsm->unCallerArrayPointer++; + +    int j; +    GLuint max; +    GLuint unSubID; +    GLboolean bRet; +    for(j=0; j<pAsm->unSubArrayPointer; j++) +    { +        if(nILindex == pAsm->subs[j].subIL_Offset) +        {   /* compiled before */ + +            max = pAsm->subs[j].unStackDepthMax  +                + pAsm->CALLSTACK[pAsm->CALLSP].current; +            if(max > pAsm->CALLSTACK[pAsm->CALLSP].max) +            { +                pAsm->CALLSTACK[pAsm->CALLSP].max = max; +            } +             +            pAsm->callers[pAsm->unCallerArrayPointer - 1].subDescIndex = j;  +            return GL_TRUE; +        } +    } + +    pAsm->callers[pAsm->unCallerArrayPointer - 1].subDescIndex = pAsm->unSubArrayPointer; +    unSubID = pAsm->unSubArrayPointer; + +    bRet = AssembleInstr(nILindex, uiNumberInsts, pILInst, pAsm); + +    if(GL_TRUE == bRet) +    { +        max = pAsm->subs[unSubID].unStackDepthMax  +            + pAsm->CALLSTACK[pAsm->CALLSP].current; +        if(max > pAsm->CALLSTACK[pAsm->CALLSP].max) +        { +            pAsm->CALLSTACK[pAsm->CALLSP].max = max; +        } +    } + +    return bRet; +} + +GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue) +{ +    GLfloat fLiteral[2] = {0.1, 0.0}; + +    pAsm->D.dst.opcode   = SQ_OP2_INST_MOV; +    pAsm->D.dst.op3      = 0; +    pAsm->D.dst.rtype    = DST_REG_TEMPORARY; +    pAsm->D.dst.reg      = pAsm->flag_reg_index; +    pAsm->D.dst.writex   = 1; +    pAsm->D.dst.writey   = 0; +    pAsm->D.dst.writez   = 0; +    pAsm->D.dst.writew   = 0; +    pAsm->D2.dst2.literal      = 1; +    pAsm->D2.dst2.SaturateMode = SATURATE_OFF; +    pAsm->D.dst.predicated     = 0; +#if 0 +    pAsm->S[0].src.rtype = SRC_REC_LITERAL; +    //pAsm->S[0].src.reg   = 0; +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); +    noneg_PVSSRC(&(pAsm->S[0].src)); +    pAsm->S[0].src.swizzlex = SQ_SEL_X; +    pAsm->S[0].src.swizzley = SQ_SEL_Y; +    pAsm->S[0].src.swizzlez = SQ_SEL_Z; +    pAsm->S[0].src.swizzlew = SQ_SEL_W; + +    if( GL_FALSE == next_ins_literal(pAsm, &(fLiteral[0])) ) +    { +        return GL_FALSE; +    } +#else +    pAsm->S[0].src.rtype = DST_REG_TEMPORARY; +    pAsm->S[0].src.reg   = 0; +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); +    noneg_PVSSRC(&(pAsm->S[0].src)); +    pAsm->S[0].src.swizzlex = flagValue; +    pAsm->S[0].src.swizzley = flagValue; +    pAsm->S[0].src.swizzlez = flagValue; +    pAsm->S[0].src.swizzlew = flagValue; + +    if( GL_FALSE == next_ins2(pAsm) ) +    { +        return GL_FALSE; +    } +#endif + +    return GL_TRUE; +} + +GLboolean testFlag(r700_AssemblerBase *pAsm) +{ +    GLfloat fLiteral[2] = {0.1, 0.0}; + +    //Test flag +    GLuint tmp = gethelpr(pAsm); +    pAsm->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; + +    pAsm->D.dst.opcode   = SQ_OP2_INST_PRED_SETE; +    pAsm->D.dst.math     = 1; +    pAsm->D.dst.rtype    = DST_REG_TEMPORARY; +    pAsm->D.dst.reg      = tmp; +    pAsm->D.dst.writex   = 1; +    pAsm->D.dst.writey   = 0; +    pAsm->D.dst.writez   = 0; +    pAsm->D.dst.writew   = 0; +    pAsm->D2.dst2.literal      = 1; +    pAsm->D2.dst2.SaturateMode = SATURATE_OFF; +    pAsm->D.dst.predicated     = 1; + +    pAsm->S[0].src.rtype = DST_REG_TEMPORARY; +    pAsm->S[0].src.reg   = pAsm->flag_reg_index; +    setaddrmode_PVSSRC(&(pAsm->S[0].src), ADDR_ABSOLUTE); +    noneg_PVSSRC(&(pAsm->S[0].src)); +    pAsm->S[0].src.swizzlex = SQ_SEL_X; +    pAsm->S[0].src.swizzley = SQ_SEL_Y; +    pAsm->S[0].src.swizzlez = SQ_SEL_Z; +    pAsm->S[0].src.swizzlew = SQ_SEL_W; +#if 0 +    pAsm->S[1].src.rtype = SRC_REC_LITERAL; +    //pAsm->S[1].src.reg   = 0; +    setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); +    noneg_PVSSRC(&(pAsm->S[1].src)); +    pAsm->S[1].src.swizzlex = SQ_SEL_X; +    pAsm->S[1].src.swizzley = SQ_SEL_Y; +    pAsm->S[1].src.swizzlez = SQ_SEL_Z; +    pAsm->S[1].src.swizzlew = SQ_SEL_W; + +    if( GL_FALSE == next_ins_literal(pAsm, &(fLiteral[0])) ) +    { +        return GL_FALSE; +    } +#else +    pAsm->S[1].src.rtype = DST_REG_TEMPORARY; +    pAsm->S[1].src.reg   = 0; +    setaddrmode_PVSSRC(&(pAsm->S[1].src), ADDR_ABSOLUTE); +    noneg_PVSSRC(&(pAsm->S[1].src)); +    pAsm->S[1].src.swizzlex = SQ_SEL_1; +    pAsm->S[1].src.swizzley = SQ_SEL_1; +    pAsm->S[1].src.swizzlez = SQ_SEL_1; +    pAsm->S[1].src.swizzlew = SQ_SEL_1; + +    if( GL_FALSE == next_ins2(pAsm) ) +    { +        return GL_FALSE; +    } +#endif + +    checkStackDepth(pAsm, FC_PUSH_VPM, GL_TRUE); + +    return GL_TRUE; +} + +GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF) +{ +    testFlag(pAsm); +    jumpToOffest(pAsm, 1, 4); +    setRetInLoopFlag(pAsm, SQ_SEL_0); +    pops(pAsm, unIF + 1); +    add_return_inst(pAsm); + +    return GL_TRUE; +} + +GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP) +{ +    testFlag(pAsm); +  +    //break +    if(GL_FALSE == add_cf_instruction(pAsm) ) +    { +        return GL_FALSE; +    } +     +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.pop_count        = 1; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_const         = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cond             = SQ_CF_COND_ACTIVE; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.end_of_program   = 0x0; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.valid_pixel_mode = 0x0;  +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.cf_inst          = SQ_CF_INST_LOOP_BREAK; +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.whole_quad_mode  = 0x0; + +    pAsm->cf_current_cf_clause_ptr->m_Word1.f.barrier          = 0x1; + +    pAsm->fc_stack[unFCSP].mid = (R700ControlFlowGenericClause **)_mesa_realloc(  +                                              (void *)pAsm->fc_stack[unFCSP].mid, +                                              sizeof(R700ControlFlowGenericClause *) * pAsm->fc_stack[unFCSP].unNumMid, +                                              sizeof(R700ControlFlowGenericClause *) * (pAsm->fc_stack[unFCSP].unNumMid + 1) ); +    pAsm->fc_stack[unFCSP].mid[pAsm->fc_stack[unFCSP].unNumMid] = pAsm->cf_current_cf_clause_ptr; +    pAsm->fc_stack[unFCSP].unNumMid++; + +    pops(pAsm, 1); +                +    return GL_TRUE; +} + +GLboolean AssembleInstr(GLuint uiFirstInst, +                        GLuint uiNumberInsts,                          struct prog_instruction *pILInst,   						r700_AssemblerBase *pR700AsmCode)  {      GLuint i;      pR700AsmCode->pILInst = pILInst; -	for(i=0; i<uiNumberInsts; i++) +	for(i=uiFirstInst; i<uiNumberInsts; i++)      {          pR700AsmCode->uiCurInst = i; +#ifndef USE_CF_FOR_CONTINUE_BREAK +        if(OPCODE_BRK == pILInst[i+1].Opcode) +        { +            switch(pILInst[i].Opcode)             +            { +            case OPCODE_SLE: +                pILInst[i].Opcode = OPCODE_SGT; +                break; +            case OPCODE_SLT: +                pILInst[i].Opcode = OPCODE_SGE; +                break; +            case OPCODE_SGE: +                pILInst[i].Opcode = OPCODE_SLT; +                break; +            case OPCODE_SGT: +                pILInst[i].Opcode = OPCODE_SLE; +                break; +            case OPCODE_SEQ: +                pILInst[i].Opcode = OPCODE_SNE; +                break; +            case OPCODE_SNE: +                pILInst[i].Opcode = OPCODE_SEQ; +                break; +            default: +                break; +            } +        } +#endif +          switch (pILInst[i].Opcode)          {          case OPCODE_ABS:  @@ -4350,7 +5900,8 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,              if ( GL_FALSE == assemble_FLR(pR700AsmCode) )                   return GL_FALSE;              break;   -        //case OP_FLR_INT:  +        //case OP_FLR_INT: ; +          //    if ( GL_FALSE == assemble_FLR_INT() )           //        return GL_FALSE;          //    break;   @@ -4361,8 +5912,10 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,              break;            case OPCODE_KIL:  -            if ( GL_FALSE == assemble_KIL(pR700AsmCode) )  -                return GL_FALSE; +        case OPCODE_KIL_NV:  +            /* done at OPCODE_SE/SGT...etc. */ +            /* if ( GL_FALSE == assemble_KIL(pR700AsmCode) )  +                return GL_FALSE; */              break;          case OPCODE_LG2:               if ( GL_FALSE == assemble_LG2(pR700AsmCode) )  @@ -4422,16 +5975,340 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,          case OPCODE_SCS:               if ( GL_FALSE == assemble_SCS(pR700AsmCode) )                   return GL_FALSE; -            break;   +            break;  +             +        case OPCODE_SEQ: +            if(OPCODE_IF == pILInst[i+1].Opcode) +            { +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETE) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_BRK == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK; +#endif +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETE) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_CONT == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE; +#endif                 +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETE) )  +                { +                    return GL_FALSE; +                } +            } +            else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode)) +            { +                if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLE) )  +                { +                    return GL_FALSE; +                } +            } +            else +            { +                if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETE) )  +                { +                    return GL_FALSE; +                } +            } +            break; + +        case OPCODE_SGT:  +            if(OPCODE_IF == pILInst[i+1].Opcode) +            { +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_BRK == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK; +#endif +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_CONT == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE; +#endif + +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )  +                { +                    return GL_FALSE; +                } +            } +            else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode)) +            { +                if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGT) )  +                { +                    return GL_FALSE; +                } +            } +            else +            { +                if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGT) )  +                { +                    return GL_FALSE; +                } +            } +            break;          case OPCODE_SGE:  -            if ( GL_FALSE == assemble_SGE(pR700AsmCode) )  -                return GL_FALSE; -            break;  +            if(OPCODE_IF == pILInst[i+1].Opcode) +            { +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_BRK == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK; +#endif +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_CONT == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE; +#endif + +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )  +                { +                    return GL_FALSE; +                } +            } +            else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode)) +            { +                if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGE) )  +                { +                    return GL_FALSE; +                } +            } +            else +            { +                if ( GL_FALSE == assemble_SGE(pR700AsmCode) )  +                { +                    return GL_FALSE; +                } +            } +            break; +         +        /* NO LT, LE, TODO : use GE => LE, GT => LT : reverse 2 src order would be simpliest. Or use SQ_CF_COND_FALSE for SQ_CF_COND_ACTIVE.*/          case OPCODE_SLT:  -            if ( GL_FALSE == assemble_SLT(pR700AsmCode) )  -                return GL_FALSE; -            break;  +            { +                struct prog_src_register SrcRegSave[2]; +                SrcRegSave[0] = pILInst[i].SrcReg[0]; +                SrcRegSave[1] = pILInst[i].SrcReg[1]; +                pILInst[i].SrcReg[0] = SrcRegSave[1]; +                pILInst[i].SrcReg[1] = SrcRegSave[0]; +                if(OPCODE_IF == pILInst[i+1].Opcode) +                { +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +                    if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                else if(OPCODE_BRK == pILInst[i+1].Opcode) +                { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK; +#endif +                    if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                else if(OPCODE_CONT == pILInst[i+1].Opcode) +                { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE; +#endif + +                    if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGT) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode)) +                { +                    if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGT) )  +                    { +                        return GL_FALSE; +                    } +                } +                else +                { +                    if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGT) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                }  +                pILInst[i].SrcReg[0] = SrcRegSave[0]; +                pILInst[i].SrcReg[1] = SrcRegSave[1]; +            } +            break; + +        case OPCODE_SLE:  +            { +                struct prog_src_register SrcRegSave[2]; +                SrcRegSave[0] = pILInst[i].SrcReg[0]; +                SrcRegSave[1] = pILInst[i].SrcReg[1]; +                pILInst[i].SrcReg[0] = SrcRegSave[1]; +                pILInst[i].SrcReg[1] = SrcRegSave[0]; +                if(OPCODE_IF == pILInst[i+1].Opcode) +                { +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +                    if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                else if(OPCODE_BRK == pILInst[i+1].Opcode) +                { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK; +#endif +                    if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                else if(OPCODE_CONT == pILInst[i+1].Opcode) +                { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                    pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE; +#endif + +                    if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETGE) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode)) +                { +                    if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLGE) )  +                    { +                        return GL_FALSE; +                    } +                } +                else +                { +                    if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETGE) )  +                    { +                        pILInst[i].SrcReg[0] = SrcRegSave[0]; +                        pILInst[i].SrcReg[1] = SrcRegSave[1]; +                        return GL_FALSE; +                    } +                } +                pILInst[i].SrcReg[0] = SrcRegSave[0]; +                pILInst[i].SrcReg[1] = SrcRegSave[1]; +            } +            break; + +        case OPCODE_SNE:  +            if(OPCODE_IF == pILInst[i+1].Opcode) +            { +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETNE) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_BRK == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_BREAK; +#endif +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETNE) )  +                { +                    return GL_FALSE; +                } +            } +            else if(OPCODE_CONT == pILInst[i+1].Opcode) +            { +#ifdef USE_CF_FOR_CONTINUE_BREAK +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_PUSH_BEFORE; +#else +                pR700AsmCode->alu_x_opcode = SQ_CF_INST_ALU_CONTINUE; +#endif +                if ( GL_FALSE == assemble_LOGIC_PRED(pR700AsmCode, SQ_OP2_INST_PRED_SETNE) )  +                { +                    return GL_FALSE; +                } +            } +            else if((OPCODE_KIL == pILInst[i+1].Opcode)||(OPCODE_KIL_NV == pILInst[i+1].Opcode)) +            { +                if ( GL_FALSE == assemble_KIL(pR700AsmCode, SQ_OP2_INST_KILLNE) )  +                { +                    return GL_FALSE; +                } +            } +            else +            { +                if ( GL_FALSE == assemble_LOGIC(pR700AsmCode, SQ_OP2_INST_SETNE) )  +                { +                    return GL_FALSE; +                } +            } +            break;          //case OP_STP:           //    if ( GL_FALSE == assemble_STP(pR700AsmCode) )  @@ -4465,30 +6342,102 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,                  return GL_FALSE;              break; +        case OPCODE_TRUNC: +            if ( GL_FALSE == assemble_math_function(pR700AsmCode, SQ_OP2_INST_TRUNC) ) +                return GL_FALSE; +            break; +          case OPCODE_XPD:               if ( GL_FALSE == assemble_XPD(pR700AsmCode) )                   return GL_FALSE;              break;            case OPCODE_IF   :  -            if ( GL_FALSE == assemble_IF(pR700AsmCode) )  -                return GL_FALSE; +            {                 +                GLboolean bHasElse = GL_FALSE; + +                if(pILInst[pILInst[i].BranchTarget - 1].Opcode == OPCODE_ELSE) +                { +                    bHasElse = GL_TRUE; +                } + +                if ( GL_FALSE == assemble_IF(pR700AsmCode, bHasElse) )  +                { +                    return GL_FALSE; +                } +            }              break; +          case OPCODE_ELSE :  -            radeon_error("Not yet implemented instruction OPCODE_ELSE \n"); -            //if ( GL_FALSE == assemble_BAD("ELSE") )  +            if ( GL_FALSE == assemble_ELSE(pR700AsmCode) )                   return GL_FALSE;              break; +          case OPCODE_ENDIF:               if ( GL_FALSE == assemble_ENDIF(pR700AsmCode) )                   return GL_FALSE;              break; +        case OPCODE_BGNLOOP: +            if( GL_FALSE == assemble_BGNLOOP(pR700AsmCode) ) +            { +                return GL_FALSE; +            } +            break; + +        case OPCODE_BRK: +            if( GL_FALSE == assemble_BRK(pR700AsmCode) ) +            { +                return GL_FALSE; +            } +            break; + +        case OPCODE_CONT: +            if( GL_FALSE == assemble_CONT(pR700AsmCode) ) +            { +                return GL_FALSE; +            } +            break; + +        case OPCODE_ENDLOOP: +            if( GL_FALSE == assemble_ENDLOOP(pR700AsmCode) ) +            { +                return GL_FALSE; +            } +            break; + +        case OPCODE_BGNSUB: +            if( GL_FALSE == assemble_BGNSUB(pR700AsmCode, i) ) +            { +                return GL_FALSE; +            } +            break; +         +        case OPCODE_RET: +            if( GL_FALSE == assemble_RET(pR700AsmCode) ) +            { +                return GL_FALSE; +            } +            break; +         +        case OPCODE_CAL: +            if( GL_FALSE == assemble_CAL(pR700AsmCode,  +                                         pILInst[i].BranchTarget,                                          +                                         uiNumberInsts, +                                         pILInst) ) +            { +                return GL_FALSE; +            } +            break; +          //case OPCODE_EXPORT:           //    if ( GL_FALSE == assemble_EXPORT() )           //        return GL_FALSE;          //    break; +        case OPCODE_ENDSUB: +            return assemble_ENDSUB(pR700AsmCode); +          case OPCODE_END:   			//pR700AsmCode->uiCurInst = i;  			//This is to remaind that if in later exoort there is depth/stencil @@ -4505,6 +6454,122 @@ GLboolean AssembleInstr(GLuint uiNumberInsts,      return GL_TRUE;  } +GLboolean InitShaderProgram(r700_AssemblerBase * pAsm) +{ +    setRetInLoopFlag(pAsm, SQ_SEL_0); +    return GL_TRUE; +} + +GLboolean RelocProgram(r700_AssemblerBase * pAsm) +{ +    GLuint i; +    GLuint unCFoffset; +    TypedShaderList * plstCFmain; +    TypedShaderList * plstCFsub; + +    R700ShaderInstruction *        pInst; +    R700ControlFlowGenericClause * pCFInst; + +    plstCFmain = pAsm->CALLSTACK[0].plstCFInstructions_local; + +    /* remove flags init if they are not used */ +    if((pAsm->unCFflags & HAS_LOOPRET) == 0) +    { +        R700ControlFlowALUClause * pCF_ALU; +        pInst = plstCFmain->pHead; +        while(pInst) +        { +            if(SIT_CF_ALU == pInst->m_ShaderInstType) +            { +                pCF_ALU = (R700ControlFlowALUClause *)pInst; +                if(1 == pCF_ALU->m_Word1.f.count) +                { +                    pCF_ALU->m_Word1.f.cf_inst = SQ_CF_INST_NOP; +                } +                else +                { +                    R700ALUInstruction * pALU = pCF_ALU->m_pLinkedALUInstruction; +                     +                    pALU->m_pLinkedALUClause = NULL; +                    pALU = (R700ALUInstruction *)(pALU->pNextInst); +                    pALU->m_pLinkedALUClause = pCF_ALU; +                    pCF_ALU->m_pLinkedALUInstruction = pALU; + +                    pCF_ALU->m_Word1.f.count--; +                } +                break; +            } +            pInst = pInst->pNextInst; +        }; +    } + +    if(0 == pAsm->unSubArrayPointer) +    { +        return GL_TRUE; +    } + +    if(pAsm->CALLSTACK[0].max > 0) +    { +        pAsm->pR700Shader->uStackSize = ((pAsm->CALLSTACK[0].max + 3)>>2) + 2; +    } + +    unCFoffset = plstCFmain->uNumOfNode; + +    /* Reloc subs */ +    for(i=0; i<pAsm->unSubArrayPointer; i++) +    { +        pAsm->subs[i].unCFoffset = unCFoffset; +        plstCFsub = &(pAsm->subs[i].lstCFInstructions_local); + +        pInst = plstCFsub->pHead; + +        /* reloc instructions */ +        while(pInst) +        { +            if(SIT_CF_GENERIC == pInst->m_ShaderInstType) +            { +                pCFInst = (R700ControlFlowGenericClause *)pInst; + +                switch (pCFInst->m_Word1.f.cf_inst) +                { +                case SQ_CF_INST_POP: +                case SQ_CF_INST_JUMP: +                case SQ_CF_INST_ELSE: +                case SQ_CF_INST_LOOP_END: +                case SQ_CF_INST_LOOP_START: +                case SQ_CF_INST_LOOP_START_NO_AL: +                case SQ_CF_INST_LOOP_CONTINUE: +                case SQ_CF_INST_LOOP_BREAK: +                    pCFInst->m_Word0.f.addr += unCFoffset; +                    break; +                default: +                    break; +                } +            }   +             +            pInst->m_uIndex += unCFoffset; + +            pInst = pInst->pNextInst; +        }; + +        /* Put sub into main */ +        plstCFmain->pTail->pNextInst = plstCFsub->pHead; +        plstCFmain->pTail            = plstCFsub->pTail; +        plstCFmain->uNumOfNode      += plstCFsub->uNumOfNode; + +        unCFoffset += plstCFsub->uNumOfNode; +    } + +    /* reloc callers */ +    for(i=0; i<pAsm->unCallerArrayPointer; i++) +    { +        pAsm->callers[i].cf_ptr->m_Word0.f.addr +            = pAsm->subs[pAsm->callers[i].subDescIndex].unCFoffset;  +    } + +    return GL_TRUE; +} +  GLboolean Process_Export(r700_AssemblerBase* pAsm,                           GLuint type,                           GLuint export_starting_index, @@ -4800,6 +6865,25 @@ GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode,  		}  	} +    for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++) +	{ +        unBit = 1 << i; +        if(OutputsWritten & unBit) +		{ +            if( GL_FALSE == Process_Export(pR700AsmCode, +                                          SQ_EXPORT_PARAM,  +                                          export_starting_index,  +                                          1,  +                                          pR700AsmCode->ucVP_OutputMap[i], +                                          GL_FALSE) ) +            { +                return GL_FALSE; +            } + +            export_starting_index++; +		} +    } +      // At least one param should be exported      if (export_count)       { @@ -4833,6 +6917,16 @@ GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode)  {      FREE(pR700AsmCode->pucOutMask);      FREE(pR700AsmCode->pInstDeps); + +    if(NULL != pR700AsmCode->subs) +    { +        FREE(pR700AsmCode->subs); +    } +    if(NULL != pR700AsmCode->callers) +    { +        FREE(pR700AsmCode->callers); +    } +      return GL_TRUE;  } diff --git a/src/mesa/drivers/dri/r600/r700_assembler.h b/src/mesa/drivers/dri/r600/r700_assembler.h index c66db502a1..130fc89dae 100644 --- a/src/mesa/drivers/dri/r600/r700_assembler.h +++ b/src/mesa/drivers/dri/r600/r700_assembler.h @@ -72,7 +72,8 @@ typedef enum SrcRegisterType      SRC_REG_INPUT          = 1,      SRC_REG_CONSTANT       = 2,      SRC_REG_ALT_TEMPORARY  = 3, -    NUMBER_OF_SRC_REG_TYPE = 4 +    SRC_REC_LITERAL        = 4,  +    NUMBER_OF_SRC_REG_TYPE = 5  } SrcRegisterType;  typedef enum DstRegisterType  @@ -111,6 +112,12 @@ typedef struct PVSDSTtag  	BITS addrmode1:1; //32  } PVSDST; +typedef struct PVSINSTtag +{ +    BITS literal      :2;  +    BITS SaturateMode :2;  +} PVSINST; +  typedef struct PVSSRCtag   {  	BITS rtype:4;             @@ -148,6 +155,7 @@ typedef union PVSDWORDtag  {  	BITS    bits;  	PVSDST  dst; +    PVSINST dst2;  	PVSSRC  src;  	PVSMATH math;  	float   f; @@ -251,6 +259,8 @@ enum      FC_IF = 1,      FC_LOOP = 2,      FC_REP = 3, +    FC_PUSH_VPM = 4, +    FC_PUSH_WQM = 5,      COND_NONE = 0,      COND_BOOL = 1, @@ -263,22 +273,52 @@ enum  typedef struct FC_LEVEL   { -	unsigned int           first; ///< first fc instruction on level (if, rep, loop) -	unsigned int*          mid; ///< middle instructions - else or all breaks on this level -	unsigned int           midLen; -	unsigned int           type; -	unsigned int           cond; -	unsigned int           inv; -	unsigned int           bpush; ///< 1 if first instruction does branch stack push -			 int           id; ///< id of bool or int variable +    R700ControlFlowGenericClause *  first; +    R700ControlFlowGenericClause ** mid; +    unsigned int unNumMid; +    unsigned int midLen; +    unsigned int type; +    unsigned int cond; +    unsigned int inv; +    int id; ///< id of bool or int variable  } FC_LEVEL;  typedef struct VTX_FETCH_METHOD   { -	GLboolean bEnableMini; -	GLuint mega_fetch_remainder; +    GLboolean bEnableMini; +    GLuint mega_fetch_remainder;  } VTX_FETCH_METHOD; +typedef struct SUB_OFFSET +{ +    GLint  subIL_Offset; +    GLuint unCFoffset; +    GLuint unStackDepthMax; +    TypedShaderList lstCFInstructions_local; +} SUB_OFFSET; + +typedef struct CALLER_POINTER +{ +    GLint  subIL_Offset; +    GLint  subDescIndex; +    R700ControlFlowGenericClause* cf_ptr; +} CALLER_POINTER; + +#define SQ_MAX_CALL_DEPTH 0x00000020 + +typedef struct CALL_LEVEL +{ +    unsigned int      FCSP_BeforeEntry; +    GLint             subDescIndex; +    GLushort          current; +    GLushort          max; +    TypedShaderList * plstCFInstructions_local; +} CALL_LEVEL; + +#define HAS_CURRENT_LOOPRET 0x1L +#define HAS_LOOPRET         0x2L +#define LOOPRET_FLAGS       HAS_LOOPRET | HAS_CURRENT_LOOPRET +  typedef struct r700_AssemblerBase   {  	R700ControlFlowSXClause*      cf_last_export_ptr; @@ -294,11 +334,14 @@ typedef struct r700_AssemblerBase  	// No clause has been created yet  	CF_CLAUSE_TYPE cf_current_clause_type; +    BITS alu_x_opcode; +  	GLuint number_of_exports;  	GLuint number_of_colorandz_exports;  	GLuint number_of_export_opcodes;  	PVSDWORD D; +    PVSDWORD D2;  	PVSDWORD S[3];  	unsigned int uLastPosUpdate; @@ -310,6 +353,8 @@ typedef struct r700_AssemblerBase  	unsigned int number_used_registers;  	unsigned int uUsedConsts;  +    unsigned int flag_reg_index; +  	// Fragment programs  	unsigned int uiFP_AttributeMap[FRAG_ATTRIB_MAX];  	unsigned int uiFP_OutputMap[FRAG_RESULT_MAX]; @@ -330,9 +375,6 @@ typedef struct r700_AssemblerBase  	unsigned int FCSP;  	FC_LEVEL fc_stack[32]; -	unsigned int branch_depth; -	unsigned int max_branch_depth; -  	//-----------------------------------------------------------------------------------  	// ArgSubst used in Assemble_Source() function  	//----------------------------------------------------------------------------------- @@ -378,6 +420,18 @@ typedef struct r700_AssemblerBase      GLboolean is_tex;      /* we inserted helper intructions and need barrier on next TEX ins */       GLboolean need_tex_barrier;  + +    SUB_OFFSET     * subs; +    GLuint           unSubArraySize; +    GLuint           unSubArrayPointer; +    CALLER_POINTER * callers; +    GLuint           unCallerArraySize; +    GLuint           unCallerArrayPointer; +    unsigned int     CALLSP; +    CALL_LEVEL       CALLSTACK[SQ_MAX_CALL_DEPTH]; + +    GLuint unCFflags; +  } r700_AssemblerBase;  //Internal use @@ -446,6 +500,10 @@ GLboolean assemble_alu_src(R700ALUInstruction*  alu_instruction_ptr,  GLboolean add_alu_instruction(r700_AssemblerBase* pAsm,                                R700ALUInstruction* alu_instruction_ptr,                                GLuint              contiguous_slots_needed); + +GLboolean add_cf_instruction(r700_AssemblerBase* pAsm); +void add_return_inst(r700_AssemblerBase *pAsm); +  void get_src_properties(R700ALUInstruction*  alu_instruction_ptr,                          int                  source_index,                          BITS*                psrc_sel, @@ -467,6 +525,21 @@ GLboolean check_vector(r700_AssemblerBase* pAsm,                         R700ALUInstruction* alu_instruction_ptr);  GLboolean assemble_alu_instruction(r700_AssemblerBase *pAsm);  GLboolean next_ins(r700_AssemblerBase *pAsm); + +GLboolean next_ins2(r700_AssemblerBase *pAsm); +GLboolean assemble_alu_instruction2(r700_AssemblerBase *pAsm); + +/* TODO : merge next_ins/2/literal, assemble_alu_instruction/2/literal */ +GLboolean next_ins_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral); +GLboolean assemble_alu_instruction_literal(r700_AssemblerBase *pAsm, GLfloat * pLiteral); + +GLboolean pops(r700_AssemblerBase *pAsm, GLuint pops); +GLboolean jumpToOffest(r700_AssemblerBase *pAsm, GLuint pops, GLint offset); +GLboolean setRetInLoopFlag(r700_AssemblerBase *pAsm, GLuint flagValue); +GLboolean testFlag(r700_AssemblerBase *pAsm); +GLboolean breakLoopOnFlag(r700_AssemblerBase *pAsm, GLuint unFCSP); +GLboolean returnOnFlag(r700_AssemblerBase *pAsm, GLuint unIF); +  GLboolean assemble_math_function(r700_AssemblerBase* pAsm, BITS opcode);  GLboolean assemble_ABS(r700_AssemblerBase *pAsm);  GLboolean assemble_ADD(r700_AssemblerBase *pAsm); @@ -481,7 +554,7 @@ GLboolean assemble_EXP(r700_AssemblerBase *pAsm);  GLboolean assemble_FLR(r700_AssemblerBase *pAsm);  GLboolean assemble_FLR_INT(r700_AssemblerBase *pAsm);  GLboolean assemble_FRC(r700_AssemblerBase *pAsm); -GLboolean assemble_KIL(r700_AssemblerBase *pAsm); +GLboolean assemble_KIL(r700_AssemblerBase *pAsm, GLuint opcode);  GLboolean assemble_LG2(r700_AssemblerBase *pAsm);  GLboolean assemble_LRP(r700_AssemblerBase *pAsm);  GLboolean assemble_LOG(r700_AssemblerBase *pAsm); @@ -497,14 +570,32 @@ GLboolean assemble_RSQ(r700_AssemblerBase *pAsm);  GLboolean assemble_SIN(r700_AssemblerBase *pAsm);  GLboolean assemble_SCS(r700_AssemblerBase *pAsm);  GLboolean assemble_SGE(r700_AssemblerBase *pAsm); + +GLboolean assemble_LOGIC(r700_AssemblerBase *pAsm, BITS opcode); +GLboolean assemble_LOGIC_PRED(r700_AssemblerBase *pAsm, BITS opcode);  +  GLboolean assemble_SLT(r700_AssemblerBase *pAsm);  GLboolean assemble_STP(r700_AssemblerBase *pAsm);  GLboolean assemble_TEX(r700_AssemblerBase *pAsm);  GLboolean assemble_XPD(r700_AssemblerBase *pAsm);  GLboolean assemble_EXPORT(r700_AssemblerBase *pAsm); -GLboolean assemble_IF(r700_AssemblerBase *pAsm); +GLboolean assemble_IF(r700_AssemblerBase *pAsm, GLboolean bHasElse); +GLboolean assemble_ELSE(r700_AssemblerBase *pAsm);  GLboolean assemble_ENDIF(r700_AssemblerBase *pAsm); +GLboolean assemble_BGNLOOP(r700_AssemblerBase *pAsm); +GLboolean assemble_BRK(r700_AssemblerBase *pAsm); +GLboolean assemble_COND(r700_AssemblerBase *pAsm); +GLboolean assemble_ENDLOOP(r700_AssemblerBase *pAsm); + +GLboolean assemble_BGNSUB(r700_AssemblerBase *pAsm, GLint nILindex); +GLboolean assemble_ENDSUB(r700_AssemblerBase *pAsm); +GLboolean assemble_RET(r700_AssemblerBase *pAsm); +GLboolean assemble_CAL(r700_AssemblerBase *pAsm,  +                       GLint nILindex, +                       GLuint uiNumberInsts, +                       struct prog_instruction *pILInst); +  GLboolean Process_Export(r700_AssemblerBase* pAsm,                           GLuint type,                            GLuint export_starting_index, @@ -516,12 +607,16 @@ GLboolean Move_Depth_Exports_To_Correct_Channels(r700_AssemblerBase *pAsm,  //Interface -GLboolean AssembleInstr(GLuint uiNumberInsts, +GLboolean AssembleInstr(GLuint uiFirstInst, +                        GLuint uiNumberInsts,                          struct prog_instruction *pILInst,   						r700_AssemblerBase *pR700AsmCode);  GLboolean Process_Fragment_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten);    GLboolean Process_Vertex_Exports(r700_AssemblerBase *pR700AsmCode, GLbitfield OutputsWritten); +GLboolean RelocProgram(r700_AssemblerBase * pAsm); +GLboolean InitShaderProgram(r700_AssemblerBase * pAsm); +  int       Init_r700_AssemblerBase(SHADER_PIPE_TYPE spt, r700_AssemblerBase* pAsm, R700_Shader* pShader);  GLboolean Clean_Up_Assembler(r700_AssemblerBase *pR700AsmCode); diff --git a/src/mesa/drivers/dri/r600/r700_chip.c b/src/mesa/drivers/dri/r600/r700_chip.c index 2b2b4d748f..8126777bf4 100644 --- a/src/mesa/drivers/dri/r600/r700_chip.c +++ b/src/mesa/drivers/dri/r600/r700_chip.c @@ -446,68 +446,77 @@ static void r700SendRenderTargetState(GLcontext *ctx, struct radeon_state_atom *  static void r700SendPSState(GLcontext *ctx, struct radeon_state_atom *atom)  { -	context_t *context = R700_CONTEXT(ctx); -	R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); -	struct radeon_bo * pbo; -	BATCH_LOCALS(&context->radeon); -	radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); +    context_t *context = R700_CONTEXT(ctx); +    R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); +    struct radeon_bo * pbo; +    BATCH_LOCALS(&context->radeon); +    radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); -	pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context)); +    pbo = (struct radeon_bo *)r700GetActiveFpShaderBo(GL_CONTEXT(context)); -	if (!pbo) -		return; +    if (!pbo) +	    return; -	r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); +    r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); -        BEGIN_BATCH_NO_AUTOSTATE(3 + 2); -	R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1); -	R600_OUT_BATCH(r700->ps.SQ_PGM_START_PS.u32All); -	R600_OUT_BATCH_RELOC(r700->ps.SQ_PGM_START_PS.u32All, -			     pbo, -			     r700->ps.SQ_PGM_START_PS.u32All, -			     RADEON_GEM_DOMAIN_GTT, 0, 0); -	END_BATCH(); +    BEGIN_BATCH_NO_AUTOSTATE(3 + 2); +    R600_OUT_BATCH_REGSEQ(SQ_PGM_START_PS, 1); +    R600_OUT_BATCH(r700->ps.SQ_PGM_START_PS.u32All); +    R600_OUT_BATCH_RELOC(r700->ps.SQ_PGM_START_PS.u32All, +		         pbo, +		         r700->ps.SQ_PGM_START_PS.u32All, +		         RADEON_GEM_DOMAIN_GTT, 0, 0); +    END_BATCH(); -        BEGIN_BATCH_NO_AUTOSTATE(9); -	R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_PS, r700->ps.SQ_PGM_RESOURCES_PS.u32All); -	R600_OUT_BATCH_REGVAL(SQ_PGM_EXPORTS_PS, r700->ps.SQ_PGM_EXPORTS_PS.u32All); -	R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_PS, r700->ps.SQ_PGM_CF_OFFSET_PS.u32All); -        END_BATCH(); +    BEGIN_BATCH_NO_AUTOSTATE(9); +    R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_PS, r700->ps.SQ_PGM_RESOURCES_PS.u32All); +    R600_OUT_BATCH_REGVAL(SQ_PGM_EXPORTS_PS, r700->ps.SQ_PGM_EXPORTS_PS.u32All); +    R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_PS, r700->ps.SQ_PGM_CF_OFFSET_PS.u32All); +    END_BATCH(); -	COMMIT_BATCH(); +    BEGIN_BATCH_NO_AUTOSTATE(3); +    R600_OUT_BATCH_REGVAL(SQ_LOOP_CONST_0, 0x01000FFF); +    END_BATCH(); + +    COMMIT_BATCH();  }  static void r700SendVSState(GLcontext *ctx, struct radeon_state_atom *atom)  { -	context_t *context = R700_CONTEXT(ctx); -	R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); -	struct radeon_bo * pbo; -	BATCH_LOCALS(&context->radeon); -	radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); +    context_t *context = R700_CONTEXT(ctx); +    R700_CHIP_CONTEXT *r700 = R700_CONTEXT_STATES(context); +    struct radeon_bo * pbo; +    BATCH_LOCALS(&context->radeon); +    radeon_print(RADEON_STATE, RADEON_VERBOSE, "%s\n", __func__); -	pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context)); +    pbo = (struct radeon_bo *)r700GetActiveVpShaderBo(GL_CONTEXT(context)); -	if (!pbo) -		return; +    if (!pbo) +	    return; -	r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); +    r700SyncSurf(context, pbo, RADEON_GEM_DOMAIN_GTT, 0, SH_ACTION_ENA_bit); -        BEGIN_BATCH_NO_AUTOSTATE(3 + 2); -	R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1); -	R600_OUT_BATCH(r700->vs.SQ_PGM_START_VS.u32All); -	R600_OUT_BATCH_RELOC(r700->vs.SQ_PGM_START_VS.u32All, -			     pbo, -			     r700->vs.SQ_PGM_START_VS.u32All, -			     RADEON_GEM_DOMAIN_GTT, 0, 0); -	END_BATCH(); +    BEGIN_BATCH_NO_AUTOSTATE(3 + 2); +    R600_OUT_BATCH_REGSEQ(SQ_PGM_START_VS, 1); +    R600_OUT_BATCH(r700->vs.SQ_PGM_START_VS.u32All); +    R600_OUT_BATCH_RELOC(r700->vs.SQ_PGM_START_VS.u32All, +		         pbo, +		         r700->vs.SQ_PGM_START_VS.u32All, +		         RADEON_GEM_DOMAIN_GTT, 0, 0); +    END_BATCH(); -        BEGIN_BATCH_NO_AUTOSTATE(6); -	R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_VS, r700->vs.SQ_PGM_RESOURCES_VS.u32All); -	R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_VS, r700->vs.SQ_PGM_CF_OFFSET_VS.u32All); -        END_BATCH(); +    BEGIN_BATCH_NO_AUTOSTATE(6); +    R600_OUT_BATCH_REGVAL(SQ_PGM_RESOURCES_VS, r700->vs.SQ_PGM_RESOURCES_VS.u32All); +    R600_OUT_BATCH_REGVAL(SQ_PGM_CF_OFFSET_VS, r700->vs.SQ_PGM_CF_OFFSET_VS.u32All); +    END_BATCH(); -	COMMIT_BATCH(); +    BEGIN_BATCH_NO_AUTOSTATE(3); +    R600_OUT_BATCH_REGVAL((SQ_LOOP_CONST_0 + 32*4), 0x0100000F); +    //R600_OUT_BATCH_REGVAL((SQ_LOOP_CONST_0 + (SQ_LOOP_CONST_vs<2)), 0x0100000F); +    END_BATCH(); + +    COMMIT_BATCH();  }  static void r700SendFSState(GLcontext *ctx, struct radeon_state_atom *atom) @@ -1305,8 +1314,8 @@ void r600InitAtoms(context_t *context)  	ALLOC_STATE(spi, always, (59 + R700_MAX_SHADER_EXPORTS), r700SendSPIState);  	ALLOC_STATE(vpt, always, 16, r700SendViewportState);  	ALLOC_STATE(fs, always, 18, r700SendFSState); -	ALLOC_STATE(vs, always, 18, r700SendVSState); -	ALLOC_STATE(ps, always, 21, r700SendPSState); +	ALLOC_STATE(vs, always, 21, r700SendVSState); +	ALLOC_STATE(ps, always, 24, r700SendPSState);  	ALLOC_STATE(vs_consts, vs_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendVSConsts);  	ALLOC_STATE(ps_consts, ps_consts, (2 + (R700_MAX_DX9_CONSTS * 4)), r700SendPSConsts);  	ALLOC_STATE(vtx, vtx, (6 + (VERT_ATTRIB_MAX * 18)), r700SendVTXState); diff --git a/src/mesa/drivers/dri/r600/r700_fragprog.c b/src/mesa/drivers/dri/r600/r700_fragprog.c index ccafd433bf..21ac46e7b8 100644 --- a/src/mesa/drivers/dri/r600/r700_fragprog.c +++ b/src/mesa/drivers/dri/r600/r700_fragprog.c @@ -73,11 +73,11 @@ void Map_Fragment_Program(r700_AssemblerBase         *pAsm,  		pAsm->uiFP_AttributeMap[FRAG_ATTRIB_COL1] = pAsm->number_used_registers++;  	} -        unBit = 1 << FRAG_ATTRIB_FOGC; -        if(mesa_fp->Base.InputsRead & unBit) -        { -                pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++; -        } +    unBit = 1 << FRAG_ATTRIB_FOGC; +    if(mesa_fp->Base.InputsRead & unBit) +    { +            pAsm->uiFP_AttributeMap[FRAG_ATTRIB_FOGC] = pAsm->number_used_registers++; +    }  	for(i=0; i<8; i++)  	{ @@ -88,6 +88,62 @@ void Map_Fragment_Program(r700_AssemblerBase         *pAsm,  		}  	} +/* order has been taken care of */ +#if 1 +    for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++) +    { +        unBit = 1 << i; +        if(mesa_fp->Base.InputsRead & unBit) +		{ +            pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers++; +        } +    } +#else +    if( (mesa_fp->Base.InputsRead >> FRAG_ATTRIB_VAR0) > 0 ) +    { +	    struct r700_vertex_program_cont *vpc = +		       (struct r700_vertex_program_cont *)ctx->VertexProgram._Current; +        struct gl_program_parameter_list * VsVarying = vpc->mesa_program.Base.Varying; +        struct gl_program_parameter_list * PsVarying = mesa_fp->Base.Varying; +        struct gl_program_parameter      * pVsParam; +        struct gl_program_parameter      * pPsParam; +        GLuint j, k; +        GLuint unMaxVarying = 0; + +        for(i=0; i<VsVarying->NumParameters; i++) +        { +            pAsm->uiFP_AttributeMap[i + FRAG_ATTRIB_VAR0] = 0; +        } + +        for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++) +	    { +            unBit = 1 << i; +            if(mesa_fp->Base.InputsRead & unBit) +		    { +                j = i - FRAG_ATTRIB_VAR0; +                pPsParam = PsVarying->Parameters + j; + +                for(k=0; k<VsVarying->NumParameters; k++) +                {					 +                    pVsParam = VsVarying->Parameters + k; + +			        if( strcmp(pPsParam->Name, pVsParam->Name) == 0) +                    { +                        pAsm->uiFP_AttributeMap[i] = pAsm->number_used_registers + k;                   +                        if(k > unMaxVarying) +                        { +                            unMaxVarying = k; +                        } +                        break; +                    } +                } +		    } +        } + +        pAsm->number_used_registers += unMaxVarying + 1; +    } +#endif +  /* Map temporary registers (GPRs) */      pAsm->starting_temp_register_number = pAsm->number_used_registers; @@ -127,6 +183,8 @@ void Map_Fragment_Program(r700_AssemblerBase         *pAsm,          pAsm->pucOutMask[ui] = 0x0;      } +    pAsm->flag_reg_index = pAsm->number_used_registers++; +      pAsm->uFirstHelpReg = pAsm->number_used_registers;  } @@ -247,8 +305,11 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,  	{  		return GL_FALSE;      } + +    InitShaderProgram(&(fp->r700AsmCode)); -	if( GL_FALSE == AssembleInstr(mesa_fp->Base.NumInstructions, +	if( GL_FALSE == AssembleInstr(0, +                                  mesa_fp->Base.NumInstructions,                                    &(mesa_fp->Base.Instructions[0]),                                     &(fp->r700AsmCode)) )  	{ @@ -260,6 +321,11 @@ GLboolean r700TranslateFragmentShader(struct r700_fragment_program *fp,          return GL_FALSE;      } +    if( GL_FALSE == RelocProgram(&(fp->r700AsmCode)) ) +    { +        return GL_FALSE; +    } +      fp->r700Shader.nRegs = (fp->r700AsmCode.number_used_registers == 0) ? 0                            : (fp->r700AsmCode.number_used_registers - 1); @@ -459,6 +525,22 @@ GLboolean r700SetupFragmentProgram(GLcontext * ctx)  	    }      } +    for(i=FRAG_ATTRIB_VAR0; i<FRAG_ATTRIB_MAX; i++) +	{ +		unBit = 1 << i; +		if(mesa_fp->Base.InputsRead & unBit) +		{ +            ui = pAsm->uiFP_AttributeMap[i]; +            SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, SEL_CENTROID_bit); +            SETfield(r700->SPI_PS_INPUT_CNTL[ui].u32All, ui, +		             SEMANTIC_shift, SEMANTIC_mask); +            if (r700->SPI_INTERP_CONTROL_0.u32All & FLAT_SHADE_ENA_bit) +		        SETbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); +            else +		        CLEARbit(r700->SPI_PS_INPUT_CNTL[ui].u32All, FLAT_SHADE_bit); +		} +	} +      exportCount = (r700->ps.SQ_PGM_EXPORTS_PS.u32All & EXPORT_MODE_mask) / (1 << EXPORT_MODE_shift);      if (r700->CB_SHADER_CONTROL.u32All != ((1 << exportCount) - 1))      { diff --git a/src/mesa/drivers/dri/r600/r700_shader.c b/src/mesa/drivers/dri/r600/r700_shader.c index 955ea4e4e1..2eed1acc2f 100644 --- a/src/mesa/drivers/dri/r600/r700_shader.c +++ b/src/mesa/drivers/dri/r600/r700_shader.c @@ -159,13 +159,18 @@ void Init_R700_Shader(R700_Shader * pShader)  	pShader->lstVTXInstructions.uNumOfNode=0;  } +void SetActiveCFlist(R700_Shader *pShader, TypedShaderList * plstCF) +{ +    pShader->plstCFInstructions_active = plstCF; +} +  void AddCFInstruction(R700_Shader *pShader, R700ControlFlowInstruction *pCFInst)  {      R700ControlFlowSXClause*  pSXClause;       R700ControlFlowSMXClause* pSMXClause; -    pCFInst->m_uIndex = pShader->lstCFInstructions.uNumOfNode; -    AddInstToList(&(pShader->lstCFInstructions),  +    pCFInst->m_uIndex = pShader->plstCFInstructions_active->uNumOfNode; +    AddInstToList(pShader->plstCFInstructions_active,                     (R700ShaderInstruction*)pCFInst);      pShader->uShaderBinaryDWORDSize += GetInstructionSize(pCFInst->m_ShaderInstType); diff --git a/src/mesa/drivers/dri/r600/r700_shader.h b/src/mesa/drivers/dri/r600/r700_shader.h index c6a058617e..0599ffd901 100644 --- a/src/mesa/drivers/dri/r600/r700_shader.h +++ b/src/mesa/drivers/dri/r600/r700_shader.h @@ -109,6 +109,7 @@ typedef struct R700_Shader      GLuint  uStackSize;      GLuint  uMaxCallDepth; +    TypedShaderList * plstCFInstructions_active;  	TypedShaderList lstCFInstructions;  	TypedShaderList lstALUInstructions;  	TypedShaderList lstTEXInstructions; @@ -132,13 +133,13 @@ void TakeInstOutFromList(TypedShaderList * plstCFInstructions, R700ShaderInstruc  void ResolveLinks(R700_Shader *pShader);  void Assemble(R700_Shader *pShader); -  //Interface  void Init_R700_Shader(R700_Shader * pShader);  void AddCFInstruction(R700_Shader *pShader, R700ControlFlowInstruction *pCFInst);  void AddVTXInstruction(R700_Shader *pShader, R700VertexInstruction *pVTXInst);  void AddTEXInstruction(R700_Shader *pShader, R700TextureInstruction *pTEXInst);  void AddALUInstruction(R700_Shader *pShader, R700ALUInstruction *pALUInst); +void SetActiveCFlist(R700_Shader *pShader, TypedShaderList * plstCF);  void LoadProgram(R700_Shader *pShader);  void UpdateShaderRegisters(R700_Shader *pShader); diff --git a/src/mesa/drivers/dri/r600/r700_vertprog.c b/src/mesa/drivers/dri/r600/r700_vertprog.c index ffc6068bd8..c8f72d588b 100644 --- a/src/mesa/drivers/dri/r600/r700_vertprog.c +++ b/src/mesa/drivers/dri/r600/r700_vertprog.c @@ -111,6 +111,15 @@ unsigned int Map_Vertex_Output(r700_AssemblerBase       *pAsm,  		}  	} +    for(i=VERT_RESULT_VAR0; i<VERT_RESULT_MAX; i++) +	{ +		unBit = 1 << i; +		if(mesa_vp->Base.OutputsWritten & unBit) +		{ +			pAsm->ucVP_OutputMap[i] = unTotal++; +		} +	} +  	return (unTotal - unStart);  } @@ -235,6 +244,8 @@ void Map_Vertex_Program(GLcontext *ctx,          pAsm->number_used_registers += mesa_vp->Base.NumTemporaries;      } +    pAsm->flag_reg_index = pAsm->number_used_registers++; +      pAsm->uFirstHelpReg = pAsm->number_used_registers;  } @@ -324,7 +335,10 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,  		return NULL;  	} -	if(GL_FALSE == AssembleInstr(vp->mesa_program->Base.NumInstructions, +    InitShaderProgram(&(vp->r700AsmCode)); + +	if(GL_FALSE == AssembleInstr(0, +                                 vp->mesa_program->Base.NumInstructions,                                   &(vp->mesa_program->Base.Instructions[0]),                                   &(vp->r700AsmCode)) )  	{ @@ -336,6 +350,11 @@ struct r700_vertex_program* r700TranslateVertexShader(GLcontext *ctx,          return NULL;      } +    if( GL_FALSE == RelocProgram(&(vp->r700AsmCode)) ) +    { +        return GL_FALSE; +    } +      vp->r700Shader.nRegs = (vp->r700AsmCode.number_used_registers == 0) ? 0                            : (vp->r700AsmCode.number_used_registers - 1); diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c index 08e1c5d00d..de18d2ddd6 100644 --- a/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c +++ b/src/mesa/drivers/dri/radeon/radeon_maos_arrays.c @@ -196,12 +196,12 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )        if (!rmesa->tcl.obj.buf)   	rcommon_emit_vector( ctx,   			     &(rmesa->tcl.aos[nr]), -			     (char *)VB->ObjPtr->data, -			     VB->ObjPtr->size, -			     VB->ObjPtr->stride, +			     (char *)VB->AttribPtr[_TNL_ATTRIB_POS]->data, +			     VB->AttribPtr[_TNL_ATTRIB_POS]->size, +			     VB->AttribPtr[_TNL_ATTRIB_POS]->stride,  			     count); -      switch( VB->ObjPtr->size ) { +      switch( VB->AttribPtr[_TNL_ATTRIB_POS]->size ) {        case 4: vfmt |= RADEON_CP_VC_FRMT_W0;        case 3: vfmt |= RADEON_CP_VC_FRMT_Z;        case 2: vfmt |= RADEON_CP_VC_FRMT_XY; @@ -216,9 +216,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )        if (!rmesa->tcl.norm.buf)  	 rcommon_emit_vector( ctx,   			      &(rmesa->tcl.aos[nr]), -			      (char *)VB->NormalPtr->data, +			      (char *)VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data,  			      3, -			      VB->NormalPtr->stride, +			      VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride,  			      count);        vfmt |= RADEON_CP_VC_FRMT_N0; @@ -227,9 +227,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )     if (inputs & VERT_BIT_COLOR0) {        int emitsize; -      if (VB->ColorPtr[0]->size == 4 && -	  (VB->ColorPtr[0]->stride != 0 || -	   VB->ColorPtr[0]->data[0][3] != 1.0)) { +      if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size == 4 && +	  (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0 || +	   VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data[0][3] != 1.0)) {  	 vfmt |= RADEON_CP_VC_FRMT_FPCOLOR | RADEON_CP_VC_FRMT_FPALPHA;  	 emitsize = 4;        } @@ -242,9 +242,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )        if (!rmesa->tcl.rgba.buf)  	rcommon_emit_vector( ctx,  			     &(rmesa->tcl.aos[nr]), -			     (char *)VB->ColorPtr[0]->data, +			     (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data,  			     emitsize, -			     VB->ColorPtr[0]->stride, +			     VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride,  			     count);        nr++; @@ -256,9 +256,9 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )  	rcommon_emit_vector( ctx,  			     &(rmesa->tcl.aos[nr]), -			     (char *)VB->SecondaryColorPtr[0]->data, +			     (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data,  			     3, -			     VB->SecondaryColorPtr[0]->stride, +			     VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride,  			     count);        } @@ -273,8 +273,8 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )        if (!rmesa->tcl.fog.buf)  	 emit_vecfog( ctx,  		      &(rmesa->tcl.aos[nr]), -		      (char *)VB->FogCoordPtr->data, -		      VB->FogCoordPtr->stride, +		      (char *)VB->AttribPtr[_TNL_ATTRIB_FOG]->data, +		      VB->AttribPtr[_TNL_ATTRIB_FOG]->stride,  		      count);        vfmt |= RADEON_CP_VC_FRMT_FPFOG; @@ -290,24 +290,24 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )  	 if (!rmesa->tcl.tex[unit].buf)  	    emit_tex_vector( ctx,  			     &(rmesa->tcl.aos[nr]), -			     (char *)VB->TexCoordPtr[unit]->data, -			     VB->TexCoordPtr[unit]->size, -			     VB->TexCoordPtr[unit]->stride, +			     (char *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->data, +			     VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size, +			     VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->stride,  			     count );  	 nr++;  	 vfmt |= RADEON_ST_BIT(unit);           /* assume we need the 3rd coord if texgen is active for r/q OR at least  	    3 coords are submitted. This may not be 100% correct */ -         if (VB->TexCoordPtr[unit]->size >= 3) { +         if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) {  	    vtx |= RADEON_Q_BIT(unit);  	    vfmt |= RADEON_Q_BIT(unit);  	 }  	 if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )  	    vtx |= RADEON_Q_BIT(unit); -	 else if ((VB->TexCoordPtr[unit]->size >= 3) && +	 else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) &&  	          ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) { -	    GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3); +	    GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3);  	    if (((rmesa->NeedTexMatrix >> unit) & 1) &&  		 (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))  	       radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ; diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h index 515783135d..d764ccb982 100644 --- a/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h +++ b/src/mesa/drivers/dri/radeon/radeon_maos_vbtmp.h @@ -56,18 +56,18 @@ static void TAG(emit)( GLcontext *ctx,     radeon_print(RADEON_SWRENDER, RADEON_VERBOSE, "%s\n", __FUNCTION__); -   coord = (GLuint (*)[4])VB->ObjPtr->data; -   coord_stride = VB->ObjPtr->stride; +   coord = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_POS]->data; +   coord_stride = VB->AttribPtr[_TNL_ATTRIB_POS]->stride;     if (DO_TEX2) { -      if (VB->TexCoordPtr[2]) { +      if (VB->AttribPtr[_TNL_ATTRIB_TEX2]) {  	 const GLuint t2 = GET_TEXSOURCE(2); -	 tc2 = (GLuint (*)[4])VB->TexCoordPtr[t2]->data; -	 tc2_stride = VB->TexCoordPtr[t2]->stride; -	 if (DO_PTEX && VB->TexCoordPtr[t2]->size < 3) { +	 tc2 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; +	 tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride; +	 if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 3) {  	    fill_tex |= (1<<2);  	 } -	 else if (DO_PTEX && VB->TexCoordPtr[t2]->size < 4) { +	 else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size < 4) {  	    rqcoordsnoswap |= (1<<2);  	 }        } else { @@ -77,14 +77,14 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_TEX1) { -      if (VB->TexCoordPtr[1]) { +      if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) {  	 const GLuint t1 = GET_TEXSOURCE(1); -	 tc1 = (GLuint (*)[4])VB->TexCoordPtr[t1]->data; -	 tc1_stride = VB->TexCoordPtr[t1]->stride; -	 if (DO_PTEX && VB->TexCoordPtr[t1]->size < 3) { +	 tc1 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; +	 tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride; +	 if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 3) {  	    fill_tex |= (1<<1);  	 } -	 else if (DO_PTEX && VB->TexCoordPtr[t1]->size < 4) { +	 else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size < 4) {  	    rqcoordsnoswap |= (1<<1);  	 }        } else { @@ -94,14 +94,14 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_TEX0) { -      if (VB->TexCoordPtr[0]) { +      if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) {  	 const GLuint t0 = GET_TEXSOURCE(0); -	 tc0_stride = VB->TexCoordPtr[t0]->stride; -	 tc0 = (GLuint (*)[4])VB->TexCoordPtr[t0]->data; -	 if (DO_PTEX && VB->TexCoordPtr[t0]->size < 3) { +	 tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; +	 tc0 = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data; +	 if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 3) {  	    fill_tex |= (1<<0);  	 } -	 else if (DO_PTEX && VB->TexCoordPtr[t0]->size < 4) { +	 else if (DO_PTEX && VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size < 4) {  	    rqcoordsnoswap |= (1<<0);  	 }        } else { @@ -112,9 +112,9 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_NORM) { -      if (VB->NormalPtr) { -	 norm_stride = VB->NormalPtr->stride; -	 norm = (GLuint (*)[4])VB->NormalPtr->data; +      if (VB->AttribPtr[_TNL_ATTRIB_NORMAL]) { +	 norm_stride = VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride; +	 norm = (GLuint (*)[4])VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data;        } else {  	 norm_stride = 0;  	 norm = (GLuint (*)[4])&ctx->Current.Attrib[VERT_ATTRIB_NORMAL]; @@ -122,9 +122,9 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_RGBA) { -      if (VB->ColorPtr[0]) { -	 col = VB->ColorPtr[0]->data; -	 col_stride = VB->ColorPtr[0]->stride; +      if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]) { +	 col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +	 col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride;        } else {  	 col = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR0];  	 col_stride = 0; @@ -132,9 +132,9 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_SPEC_OR_FOG) { -      if (VB->SecondaryColorPtr[0]) { -	 spec = VB->SecondaryColorPtr[0]->data; -	 spec_stride = VB->SecondaryColorPtr[0]->stride; +      if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { +	 spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; +	 spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;        } else {  	 spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];  	 spec_stride = 0; @@ -142,9 +142,9 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_SPEC_OR_FOG) { -      if (VB->FogCoordPtr) { -	 fog = VB->FogCoordPtr->data; -	 fog_stride = VB->FogCoordPtr->stride; +      if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { +	 fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; +	 fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;        } else {  	 fog = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_FOG];  	 fog_stride = 0; diff --git a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c index 78ec119302..5ed11d0a9d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_maos_verts.c +++ b/src/mesa/drivers/dri/radeon/radeon_maos_verts.c @@ -326,7 +326,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )     if (1) {        req |= RADEON_CP_VC_FRMT_Z; -      if (VB->ObjPtr->size == 4) { +      if (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 4) {  	 req |= RADEON_CP_VC_FRMT_W0;        }     } @@ -348,15 +348,15 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )  	 req |= RADEON_ST_BIT(unit);  	 /* assume we need the 3rd coord if texgen is active for r/q OR at least  	    3 coords are submitted. This may not be 100% correct */ -	 if (VB->TexCoordPtr[unit]->size >= 3) { +	 if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) {  	    req |= RADEON_Q_BIT(unit);  	    vtx |= RADEON_Q_BIT(unit);  	 }  	 if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) )  	    vtx |= RADEON_Q_BIT(unit); -	 else if ((VB->TexCoordPtr[unit]->size >= 3) && +	 else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) &&  	          ((ctx->Texture.Unit[unit]._ReallyEnabled & (TEXTURE_CUBE_BIT)) == 0)) { -	    GLuint swaptexmatcol = (VB->TexCoordPtr[unit]->size - 3); +	    GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3);  	    if (((rmesa->NeedTexMatrix >> unit) & 1) &&  		 (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1)))  	       radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ; @@ -390,19 +390,19 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )      * this, add more vertex code (for obj-2, obj-3) or preferably move      * to maos.        */ -   if (VB->ObjPtr->size < 3 ||  -       (VB->ObjPtr->size == 3 &&  +   if (VB->AttribPtr[_TNL_ATTRIB_POS]->size < 3 || +       (VB->AttribPtr[_TNL_ATTRIB_POS]->size == 3 &&  	(setup_tab[i].vertex_format & RADEON_CP_VC_FRMT_W0))) {        _math_trans_4f( rmesa->tcl.ObjClean.data, -		      VB->ObjPtr->data, -		      VB->ObjPtr->stride, +		      VB->AttribPtr[_TNL_ATTRIB_POS]->data, +		      VB->AttribPtr[_TNL_ATTRIB_POS]->stride,  		      GL_FLOAT, -		      VB->ObjPtr->size, +		      VB->AttribPtr[_TNL_ATTRIB_POS]->size,  		      0,  		      VB->Count ); -      switch (VB->ObjPtr->size) { +      switch (VB->AttribPtr[_TNL_ATTRIB_POS]->size) {        case 1:  	    _mesa_vector4f_clean_elem(&rmesa->tcl.ObjClean, VB->Count, 1);        case 2: @@ -416,7 +416,7 @@ void radeonEmitArrays( GLcontext *ctx, GLuint inputs )  	 break;        } -      VB->ObjPtr = &rmesa->tcl.ObjClean; +      VB->AttribPtr[_TNL_ATTRIB_POS] = &rmesa->tcl.ObjClean;     } diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index e61f59eaea..6bbe8e252e 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -179,7 +179,7 @@ static void radeonSetVertexFormat( GLcontext *ctx )        for (i = 0; i < ctx->Const.MaxTextureUnits; i++) {  	 if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX(i) )) { -	    GLuint sz = VB->TexCoordPtr[i]->size; +	    GLuint sz = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size;  	    switch (sz) {  	    case 1: diff --git a/src/mesa/drivers/dri/savage/savagerender.c b/src/mesa/drivers/dri/savage/savagerender.c index 32c74f9467..8221edf387 100644 --- a/src/mesa/drivers/dri/savage/savagerender.c +++ b/src/mesa/drivers/dri/savage/savagerender.c @@ -252,13 +252,13 @@ static GLboolean run_texnorm_stage( GLcontext *ctx,           const GLboolean normalizeS = (texObj->WrapS == GL_REPEAT);           const GLboolean normalizeT = (reallyEnabled & TEXTURE_2D_BIT) &&              (texObj->WrapT == GL_REPEAT); -         const GLfloat *in = (GLfloat *)VB->TexCoordPtr[i]->data; -         const GLint instride = VB->TexCoordPtr[i]->stride; +         const GLfloat *in = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->data; +         const GLint instride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->stride;           GLfloat (*out)[4] = store->texcoord[i].data;           GLint j;           if (!ctx->Texture.Unit[i]._ReallyEnabled || -             VB->TexCoordPtr[i]->size == 4) +             VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]->size == 4)              /* Never try to normalize homogenous tex coords! */              continue; @@ -297,7 +297,7 @@ static GLboolean run_texnorm_stage( GLcontext *ctx,           }           if (normalizeS || normalizeT) -            VB->AttribPtr[VERT_ATTRIB_TEX0+i] = VB->TexCoordPtr[i] = &store->texcoord[i]; +            VB->AttribPtr[_TNL_ATTRIB_TEX0 + i] = &store->texcoord[i];        }     } diff --git a/src/mesa/drivers/dri/savage/savagetris.c b/src/mesa/drivers/dri/savage/savagetris.c index c04763b40e..e9529d1939 100644 --- a/src/mesa/drivers/dri/savage/savagetris.c +++ b/src/mesa/drivers/dri/savage/savagetris.c @@ -879,13 +879,13 @@ static GLboolean savageCheckPTexHack( GLcontext *ctx )     RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); -   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) { +   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) {        if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX ))  	 return GL_TRUE; /* apply ptex hack */        else  	 FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE);     } -   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4) +   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)        FALLBACK(ctx, SAVAGE_FALLBACK_PROJ_TEXTURE, GL_TRUE);     return GL_FALSE; /* don't apply ptex hack */ @@ -976,13 +976,13 @@ static INLINE GLuint savageChooseVertexFormat_s3d( GLcontext *ctx )     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {        if (imesa->ptexHack)  	 EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_3F_XYW, SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0); -      else if (VB->TexCoordPtr[0]->size == 4) +      else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)  	 assert (0); /* should be caught by savageCheckPTexHack */ -      else if (VB->TexCoordPtr[0]->size >= 2) +      else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2)  	 /* The chromium menu emits some 3D tex coords even though no  	  * 3D texture is enabled. Ignore the 3rd coordinate. */  	 EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_2F, SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 ); -      else if (VB->TexCoordPtr[0]->size == 1) { +      else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 1) {  	 EMIT_ATTR( _TNL_ATTRIB_TEX0, EMIT_1F, SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 );  	 EMIT_PAD( 4 );        } else @@ -1025,9 +1025,9 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) {        if (imesa->ptexHack)  	 NEED_ATTR( SAVAGE_EMIT_STQ0, SAVAGE_SKIP_ST0); -      else if (VB->TexCoordPtr[0]->size == 4) +      else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)  	 assert (0); /* should be caught by savageCheckPTexHack */ -      else if (VB->TexCoordPtr[0]->size >= 2) +      else if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size >= 2)  	 /* The chromium menu emits some 3D tex coords even though no  	  * 3D texture is enabled. Ignore the 3rd coordinate. */  	 NEED_ATTR( SAVAGE_EMIT_ST0, SAVAGE_SKIP_ST0 ); @@ -1035,10 +1035,10 @@ static INLINE GLuint savageChooseVertexFormat_s4( GLcontext *ctx )  	 NEED_ATTR( SAVAGE_EMIT_S0, SAVAGE_SKIP_S0 );     }     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { -      if (VB->TexCoordPtr[1]->size == 4) +      if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)  	 /* projective textures are not supported by the hardware */  	 assert (0); /* should be caught by savageCheckPTexHack */ -      else if (VB->TexCoordPtr[1]->size >= 2) +      else if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size >= 2)  	 NEED_ATTR( SAVAGE_EMIT_ST1, SAVAGE_SKIP_ST1 );        else  	 NEED_ATTR( SAVAGE_EMIT_S1, SAVAGE_SKIP_S1 ); diff --git a/src/mesa/drivers/dri/sis/sis_tris.c b/src/mesa/drivers/dri/sis/sis_tris.c index 76d12d07b3..3cf10007b5 100644 --- a/src/mesa/drivers/dri/sis/sis_tris.c +++ b/src/mesa/drivers/dri/sis/sis_tris.c @@ -903,14 +903,14 @@ static void sisRenderStart( GLcontext *ctx )     /* projective textures are not supported by the hardware */     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 )) { -      if (VB->TexCoordPtr[0]->size > 2) +      if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size > 2)  	 tex_fallback = GL_TRUE;        EMIT_ATTR(_TNL_ATTRIB_TEX0, EMIT_2F);        AGPParseSet |= SiS_PS_HAS_UV0;     }     /* Will only hit tex1 on SiS300 */     if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 )) { -      if (VB->TexCoordPtr[1]->size > 2) +      if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size > 2)  	 tex_fallback = GL_TRUE;        EMIT_ATTR(_TNL_ATTRIB_TEX1, EMIT_2F);        AGPParseSet |= SiS_PS_HAS_UV1; diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vb.c b/src/mesa/drivers/dri/tdfx/tdfx_vb.c index 4928802232..c200ba3255 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_vb.c +++ b/src/mesa/drivers/dri/tdfx/tdfx_vb.c @@ -69,11 +69,11 @@ static void interp_extras( GLcontext *ctx,     /*fprintf(stderr, "%s\n", __FUNCTION__);*/ -   if (VB->ColorPtr[1]) { +   if (VB->BackfaceColorPtr) {        INTERP_4F( t, -		    GET_COLOR(VB->ColorPtr[1], dst), -		    GET_COLOR(VB->ColorPtr[1], out), -		    GET_COLOR(VB->ColorPtr[1], in) ); +		 GET_COLOR(VB->BackfaceColorPtr, dst), +		 GET_COLOR(VB->BackfaceColorPtr, out), +		 GET_COLOR(VB->BackfaceColorPtr, in) );     }     if (VB->EdgeFlag) { @@ -88,9 +88,9 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src )  {     struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -	 COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),  -		     GET_COLOR(VB->ColorPtr[1], src) ); +   if (VB->BackfaceColorPtr) { +      COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), +		GET_COLOR(VB->BackfaceColorPtr, src) );     }     setup_tab[TDFX_CONTEXT(ctx)->SetupIndex].copy_pv(ctx, dst, src); diff --git a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h index 9b780761f4..19baf7d0d2 100644 --- a/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h +++ b/src/mesa/drivers/dri/tdfx/tdfx_vbtmp.h @@ -58,32 +58,32 @@ static void TAG(emit)( GLcontext *ctx,  /*     fprintf(stderr, "%s\n", __FUNCTION__); */     if (IND & TDFX_TEX0_BIT) { -      tc0_stride = VB->TexCoordPtr[tmu0_source]->stride; -      tc0 = VB->TexCoordPtr[tmu0_source]->data; +      tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride; +      tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data;        u0scale = fxMesa->sScale0;        v0scale = fxMesa->tScale0;        if (IND & TDFX_PTEX_BIT) -	 tc0_size = VB->TexCoordPtr[tmu0_source]->size; +	 tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size;     }     if (IND & TDFX_TEX1_BIT) { -      tc1 = VB->TexCoordPtr[tmu1_source]->data; -      tc1_stride = VB->TexCoordPtr[tmu1_source]->stride; +      tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data; +      tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride;        u1scale = fxMesa->sScale1;        v1scale = fxMesa->tScale1;        if (IND & TDFX_PTEX_BIT) -	 tc1_size = VB->TexCoordPtr[tmu1_source]->size; +	 tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size;     }     if (IND & TDFX_RGBA_BIT) { -      col = VB->ColorPtr[0]->data; -      col_stride = VB->ColorPtr[0]->stride; -      col_size = VB->ColorPtr[0]->size; +      col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +      col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; +      col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;     }     if (IND & TDFX_FOGC_BIT) { -      fog = VB->FogCoordPtr->data; -      fog_stride = VB->FogCoordPtr->stride; +      fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; +      fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;     }     { @@ -168,14 +168,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )        struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;        if (IND & TDFX_TEX1_BIT) { -	 if (VB->TexCoordPtr[0] == 0) -	    VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +	 if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) +	    VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; -	 if (VB->TexCoordPtr[1]->size == 4) +	 if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)  	    return GL_FALSE;        } -      if (VB->TexCoordPtr[0]->size == 4) +      if (VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)  	 return GL_FALSE;     } diff --git a/src/mesa/drivers/dri/unichrome/via_tris.c b/src/mesa/drivers/dri/unichrome/via_tris.c index 79e67620c9..ab457d41dc 100644 --- a/src/mesa/drivers/dri/unichrome/via_tris.c +++ b/src/mesa/drivers/dri/unichrome/via_tris.c @@ -832,13 +832,13 @@ static GLboolean viaCheckPTexHack( GLcontext *ctx )     RENDERINPUTS_COPY( index_bitset, tnl->render_inputs_bitset ); -   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->TexCoordPtr[0]->size == 4) { +   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX0 ) && VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4) {        if (!RENDERINPUTS_TEST_RANGE( index_bitset, _TNL_ATTRIB_TEX1, _TNL_LAST_TEX ))  	 ptexHack = GL_TRUE;         else  	 fallback = GL_TRUE;     } -   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->TexCoordPtr[1]->size == 4) +   if (RENDERINPUTS_TEST( index_bitset, _TNL_ATTRIB_TEX1 ) && VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)        fallback = GL_TRUE;     FALLBACK(VIA_CONTEXT(ctx), VIA_FALLBACK_PROJ_TEXTURE, fallback); diff --git a/src/mesa/drivers/glide/fxvb.c b/src/mesa/drivers/glide/fxvb.c index 1dc5f9891a..cc9ad0e8b8 100644 --- a/src/mesa/drivers/glide/fxvb.c +++ b/src/mesa/drivers/glide/fxvb.c @@ -104,24 +104,24 @@ static void interp_extras( GLcontext *ctx,  {     struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -      /* If stride is zero, ColorPtr[1] is constant across the VB, so +   if (VB->BackfaceColorPtr) { +      /* If stride is zero, BackfaceColorPtr is constant across the VB, so         * there is no point interpolating between two values as they will         * be identical.  This case is handled in t_dd_tritmp.h         */ -      if (VB->ColorPtr[1]->stride) { -	 assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); +      if (VB->BackfaceColorPtr->stride) { +	 assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));  	 INTERP_4F( t, -		    GET_COLOR(VB->ColorPtr[1], dst), -		    GET_COLOR(VB->ColorPtr[1], out), -		    GET_COLOR(VB->ColorPtr[1], in) ); +		    GET_COLOR(VB->BackfaceColorPtr, dst), +		    GET_COLOR(VB->BackfaceColorPtr, out), +		    GET_COLOR(VB->BackfaceColorPtr, in) );        } -      if (VB->SecondaryColorPtr[1]) { +      if (VB->BackfaceSecondaryColorPtr) {  	 INTERP_3F( t, -		    GET_COLOR(VB->SecondaryColorPtr[1], dst), -		    GET_COLOR(VB->SecondaryColorPtr[1], out), -		    GET_COLOR(VB->SecondaryColorPtr[1], in) ); +		    GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), +		    GET_COLOR(VB->BackfaceSecondaryColorPtr, out), +		    GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );        }     } @@ -137,13 +137,13 @@ static void copy_pv_extras( GLcontext *ctx, GLuint dst, GLuint src )  {     struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -	 COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst), -		   GET_COLOR(VB->ColorPtr[1], src) ); +   if (VB->BackfaceColorPtr) { +	 COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), +		   GET_COLOR(VB->BackfaceColorPtr, src) ); -	 if (VB->SecondaryColorPtr[1]) { -	    COPY_3FV( GET_COLOR(VB->SecondaryColorPtr[1], dst), -		      GET_COLOR(VB->SecondaryColorPtr[1], src) ); +	 if (VB->BackfaceSecondaryColorPtr) { +	    COPY_3FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), +		      GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );  	 }     } diff --git a/src/mesa/drivers/glide/fxvbtmp.h b/src/mesa/drivers/glide/fxvbtmp.h index f7970c78e2..f7893c1573 100644 --- a/src/mesa/drivers/glide/fxvbtmp.h +++ b/src/mesa/drivers/glide/fxvbtmp.h @@ -62,37 +62,37 @@ static void TAG(emit)( GLcontext *ctx,     }     if (IND & SETUP_TMU0) { -      tc0 = VB->TexCoordPtr[tmu0_source]->data; -      tc0_stride = VB->TexCoordPtr[tmu0_source]->stride; +      tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->data; +      tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->stride;        u0scale = fxMesa->s0scale;        v0scale = fxMesa->t0scale;        if (IND & SETUP_PTEX) -	 tc0_size = VB->TexCoordPtr[tmu0_source]->size; +	 tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu0_source]->size;     }     if (IND & SETUP_TMU1) { -      tc1 = VB->TexCoordPtr[tmu1_source]->data; -      tc1_stride = VB->TexCoordPtr[tmu1_source]->stride; +      tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->data; +      tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->stride;        u1scale = fxMesa->s1scale; /* wrong if tmu1_source == 0, possible? */        v1scale = fxMesa->t1scale;        if (IND & SETUP_PTEX) -	 tc1_size = VB->TexCoordPtr[tmu1_source]->size; +	 tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + tmu1_source]->size;     }     if (IND & SETUP_RGBA) { -      col = VB->ColorPtr[0]->data; -      col_stride = VB->ColorPtr[0]->stride; -      col_size = VB->ColorPtr[0]->size; +      col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +      col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; +      col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;     }     if (IND & SETUP_SPEC) { -      spec = VB->SecondaryColorPtr[0]->data; -      spec_stride = VB->SecondaryColorPtr[0]->stride; +      spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data; +      spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride;     }     if (IND & SETUP_FOGC) { -      fog = VB->FogCoordPtr->data; -      fog_stride = VB->FogCoordPtr->stride; +      fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; +      fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;     }     if (start) { @@ -220,14 +220,15 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )        struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb;        if (IND & SETUP_TMU1) { -	 if (VB->TexCoordPtr[0] == 0) -	    VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +	 if (VB->AttribPtr[_TNL_ATTRIB_TEX0] == 0) +	    VB->AttribPtr[_TNL_ATTRIB_TEX0] = VB->AttribPtr[_TNL_ATTRIB_TEX1]; -	 if (VB->TexCoordPtr[1]->size == 4) +	 if (VB->AttribPtr[_TNL_ATTRIB_TEX1]->size == 4)  	    return GL_FALSE;        } -      if (VB->TexCoordPtr[0] && VB->TexCoordPtr[0]->size == 4) +      if (VB->AttribPtr[_TNL_ATTRIB_TEX0] && +	  VB->AttribPtr[_TNL_ATTRIB_TEX0]->size == 4)  	 return GL_FALSE;     } diff --git a/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c b/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c index c99ba0bba5..0b373814fe 100644 --- a/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c +++ b/src/mesa/drivers/windows/gldirect/dx7/gld_primitive_dx7.c @@ -189,9 +189,9 @@  		GLfloat		ex,ey,fx,fy,cc;							\  		/* Get vars for later */							\  		VB		= &TNL_CONTEXT(ctx)->vb;					\ -		vbcolor	= (GLchan (*)[4])VB->ColorPtr[1]->data;		\ -		if (VB->SecondaryColorPtr[1]) {						\ -			vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data;	\ +		vbcolor	= (GLchan (*)[4])VB->BackfaceColorPtr->data;	\ +		if (VB->BackfaceSecondaryColorPtr) {			\ +			vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data;	\  		} else {													\  			vbspec = NULL;											\  		}															\ @@ -241,33 +241,33 @@  	DWORD					dwColor;  #define GLD_SETUP_3D_VERTEX(v)					\ -	p4f				= VB->ObjPtr->data;			\ +	p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data;		\  	pV->Position.x	= p4f[##v][0];				\  	pV->Position.y	= p4f[##v][1];				\  	pV->Position.z	= p4f[##v][2];  #define GLD_SETUP_SMOOTH_COLOUR_3D(v)															\ -	p4f			= (GLfloat (*)[4])VB->ColorPtr[0]->data;										\ +	p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;										\  	pV->Diffuse	= D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);  #define GLD_SETUP_GET_FLAT_COLOUR_3D(v)													\ -	p4f		= (GLfloat (*)[4])VB->ColorPtr[0]->data;										\ +	p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;	\  	dwColor	= D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);  #define GLD_SETUP_USE_FLAT_COLOUR_3D			\  	pV->Diffuse = dwColor;  #define GLD_SETUP_TEX0_3D(v)						\ -	if (VB->TexCoordPtr[0]) {						\ -		tc				= VB->TexCoordPtr[0]->data;	\ +	if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) {				\ +		tc = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data;		\  		pV->TexUnit0.x	= tc[##v][0];				\  		pV->TexUnit0.y	= tc[##v][1];				\  	}  #define GLD_SETUP_TEX1_3D(v)						\ -	if (VB->TexCoordPtr[1]) {						\ -		tc				= VB->TexCoordPtr[1]->data;	\ +	if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) {				\ +		tc = VB->AttribPtr[_TNL_ATTRIB_TEX1]->data;		\  		pV->TexUnit1.x	= tc[##v][0];				\  		pV->TexUnit1.y	= tc[##v][1];				\  	} diff --git a/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c b/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c index a85620dde8..c39775cad3 100644 --- a/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c +++ b/src/mesa/drivers/windows/gldirect/dx7/gld_vb_d3d_render_dx7.c @@ -151,7 +151,7 @@ static GLboolean gld_d3d_render_stage_run(  #if 0     // For debugging: Useful to see if an app passes colour data in     // an unusual format. -   switch (VB->ColorPtr[0]->Type) { +   switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) {     case GL_FLOAT:  	   ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n");  	   break; diff --git a/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c b/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c index a5b5462f03..990922580a 100644 --- a/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c +++ b/src/mesa/drivers/windows/gldirect/dx8/gld_primitive_dx8.c @@ -189,9 +189,9 @@  		GLfloat		ex,ey,fx,fy,cc;							\  		/* Get vars for later */							\  		VB		= &TNL_CONTEXT(ctx)->vb;					\ -		vbcolor	= (GLchan (*)[4])VB->ColorPtr[1]->data;		\ -		if (VB->SecondaryColorPtr[1]) {						\ -			vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data;	\ +		vbcolor	= (GLchan (*)[4])VB->BackfaceColorPtr->data;	\ +		if (VB->BackfaceSecondaryColorPtr) {			\ +			vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data;	\  		} else {													\  			vbspec = NULL;											\  		}															\ @@ -241,33 +241,33 @@  	DWORD					dwColor;  #define GLD_SETUP_3D_VERTEX(v)					\ -	p4f				= VB->ObjPtr->data;			\ +	p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data;		\  	pV->Position.x	= p4f[##v][0];				\  	pV->Position.y	= p4f[##v][1];				\  	pV->Position.z	= p4f[##v][2];  #define GLD_SETUP_SMOOTH_COLOUR_3D(v)															\ -	p4f			= (GLfloat (*)[4])VB->ColorPtr[0]->data;										\ +	p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;	\  	pV->Diffuse	= D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);  #define GLD_SETUP_GET_FLAT_COLOUR_3D(v)													\ -	p4f		= (GLfloat (*)[4])VB->ColorPtr[0]->data;										\ +	p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;	\  	dwColor	= D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);  #define GLD_SETUP_USE_FLAT_COLOUR_3D			\  	pV->Diffuse = dwColor;  #define GLD_SETUP_TEX0_3D(v)						\ -	if (VB->TexCoordPtr[0]) {						\ -		tc				= VB->TexCoordPtr[0]->data;	\ +	if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) {				\ +		tc = VB->TnlAttribPtr[_TNL_ATTRIB_TEX0]->data;		\  		pV->TexUnit0.x	= tc[##v][0];				\  		pV->TexUnit0.y	= tc[##v][1];				\  	}  #define GLD_SETUP_TEX1_3D(v)						\ -	if (VB->TexCoordPtr[1]) {						\ -		tc				= VB->TexCoordPtr[1]->data;	\ +	if (VB->TnlAttribPtr[_TNL_ATTRIB_TEX1]) {			\ +		tc = VB->TnlAttribPtr[_TNL_ATTRIB_TEX1]->data;		\  		pV->TexUnit1.x	= tc[##v][0];				\  		pV->TexUnit1.y	= tc[##v][1];				\  	} diff --git a/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c b/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c index cafbf4f5c5..265c81fb4a 100644 --- a/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c +++ b/src/mesa/drivers/windows/gldirect/dx8/gld_vb_d3d_render_dx8.c @@ -149,7 +149,7 @@ static GLboolean gld_d3d_render_stage_run(  #if 0     // For debugging: Useful to see if an app passes colour data in     // an unusual format. -   switch (VB->ColorPtr[0]->Type) { +   switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) {     case GL_FLOAT:  	   ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n");  	   break; diff --git a/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c b/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c index 403a9d5f86..fd4dd4ed75 100644 --- a/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c +++ b/src/mesa/drivers/windows/gldirect/dx9/gld_primitive_dx9.c @@ -189,9 +189,9 @@  		GLfloat		ex,ey,fx,fy,cc;							\  		/* Get vars for later */							\  		VB		= &TNL_CONTEXT(ctx)->vb;					\ -		vbcolor	= (GLchan (*)[4])VB->ColorPtr[1]->data;		\ -		if (VB->SecondaryColorPtr[1]) {						\ -			vbspec = (GLchan (*)[4])VB->SecondaryColorPtr[1]->data;	\ +		vbcolor	= (GLchan (*)[4])VB->BackfaceColorPtr->data;	\ +		if (VB->BackfaceSecondaryColorPtr) {			\ +			vbspec = (GLchan (*)[4])VB->BackfaceSecondaryColorPtr->data;	\  		} else {													\  			vbspec = NULL;											\  		}															\ @@ -241,33 +241,33 @@  	DWORD					dwColor;  #define GLD_SETUP_3D_VERTEX(v)					\ -	p4f				= VB->ObjPtr->data;			\ +	p4f = VB->AttribPtr[_TNL_ATTRIB_POS]->data;		\  	pV->Position.x	= p4f[##v][0];				\  	pV->Position.y	= p4f[##v][1];				\  	pV->Position.z	= p4f[##v][2];  #define GLD_SETUP_SMOOTH_COLOUR_3D(v)															\ -	p4f			= (GLfloat (*)[4])VB->ColorPtr[0]->data;										\ +	p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data;										\  	pV->Diffuse	= D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);  #define GLD_SETUP_GET_FLAT_COLOUR_3D(v)													\ -	p4f		= (GLfloat (*)[4])VB->ColorPtr[0]->data;										\ +	p4f = (GLfloat (*)[4])VB->AttribPtr[_TNL_ATTRIB_COLOR00]->data;	\  	dwColor	= D3DCOLOR_COLORVALUE(p4f[##v][0], p4f[##v][1], p4f[##v][2], p4f[##v][3]);  #define GLD_SETUP_USE_FLAT_COLOUR_3D			\  	pV->Diffuse = dwColor;  #define GLD_SETUP_TEX0_3D(v)						\ -	if (VB->TexCoordPtr[0]) {						\ -		tc				= VB->TexCoordPtr[0]->data;	\ +	if (VB->AttribPtr[_TNL_ATTRIB_TEX0]) {				\ +		tc = VB->AttribPtr[_TNL_ATTRIB_TEX0]->data;		\  		pV->TexUnit0.x	= tc[##v][0];				\  		pV->TexUnit0.y	= tc[##v][1];				\  	}  #define GLD_SETUP_TEX1_3D(v)						\ -	if (VB->TexCoordPtr[1]) {						\ -		tc				= VB->TexCoordPtr[1]->data;	\ +	if (VB->AttribPtr[_TNL_ATTRIB_TEX1]) {				\ +		tc = VB->AttribPtr[_TNL_ATTRIB_TEX1]->data;		\  		pV->TexUnit1.x	= tc[##v][0];				\  		pV->TexUnit1.y	= tc[##v][1];				\  	} diff --git a/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c b/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c index 4fa6bcaf1a..91a68b3f2d 100644 --- a/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c +++ b/src/mesa/drivers/windows/gldirect/dx9/gld_vb_d3d_render_dx9.c @@ -149,7 +149,7 @@ static GLboolean gld_d3d_render_stage_run(  #if 0     // For debugging: Useful to see if an app passes colour data in     // an unusual format. -   switch (VB->ColorPtr[0]->Type) { +   switch (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->Type) {     case GL_FLOAT:  	   ddlogMessage(GLDLOG_SYSTEM, "ColorPtr: GL_FLOAT\n");  	   break; diff --git a/src/mesa/main/ffvertex_prog.c b/src/mesa/main/ffvertex_prog.c index fe2416d894..5cfa898031 100644 --- a/src/mesa/main/ffvertex_prog.c +++ b/src/mesa/main/ffvertex_prog.c @@ -523,7 +523,6 @@ static void emit_dst( struct prog_dst_register *dst,     dst->CondMask = COND_TR;  /* always pass cond test */     dst->CondSwizzle = SWIZZLE_NOOP;     dst->CondSrc = 0; -   dst->pad = 0;     /* Check that bitfield sizes aren't exceeded */     ASSERT(dst->Index == reg.idx);  } diff --git a/src/mesa/main/version.h b/src/mesa/main/version.h index 0cae1860a3..dc55cb7ccc 100644 --- a/src/mesa/main/version.h +++ b/src/mesa/main/version.h @@ -1,6 +1,6 @@  /*   * Mesa 3-D graphics library - * Version:  7.7 + * Version:  7.8   *   * Copyright (C) 1999-2008  Brian Paul   All Rights Reserved.   * Copyright (C) 2009  VMware, Inc.  All Rights Reserved. @@ -30,9 +30,9 @@  /* Mesa version */  #define MESA_MAJOR 7 -#define MESA_MINOR 7 +#define MESA_MINOR 8  #define MESA_PATCH 0 -#define MESA_VERSION_STRING "7.7-devel" +#define MESA_VERSION_STRING "7.8-devel"  /* To make version comparison easy */  #define MESA_VERSION(a,b,c) (((a) << 16) + ((b) << 8) + (c)) diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 1c687bc16c..224350caac 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -312,7 +312,6 @@ struct prog_dst_register      */     GLuint CondSrc:1;     /*@}*/ -   GLuint pad:28;  }; diff --git a/src/mesa/shader/slang/slang_emit.c b/src/mesa/shader/slang/slang_emit.c index c0e4b27aa5..fe39b46dbb 100644 --- a/src/mesa/shader/slang/slang_emit.c +++ b/src/mesa/shader/slang/slang_emit.c @@ -551,6 +551,9 @@ emit_instruction(slang_emit_info *emitInfo,                                         &srcRelAddr,                                         NULL,                                         NULL); +               if (!inst) { +                  return NULL; +               }                 src[i] = &newSrc[i];              } @@ -948,6 +951,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                n->Children[0]->Store,                                n->Children[1]->Store,                                NULL); +      if (!inst) { +         return NULL; +      }        inst_comment(inst, "Compare values");        /* Compute val = DOT(temp, temp)  (reduction) */ @@ -957,6 +963,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                &tempStore,                                &tempStore,                                NULL); +      if (!inst) { +         return NULL; +      }        inst->SrcReg[0].Swizzle = inst->SrcReg[1].Swizzle = swizzle; /*override*/        inst_comment(inst, "Reduce vec to bool"); @@ -972,6 +981,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                   n->Store,                                   &zero,                                   NULL); +         if (!inst) { +            return NULL; +         }           inst_comment(inst, "Invert true/false");        }     } @@ -1001,6 +1013,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                      &srcStore0,                                      &srcStore1,                                      NULL); +            if (!inst) { +               return NULL; +            }              inst_comment(inst, "Begin struct/array comparison");           }           else { @@ -1010,12 +1025,18 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                      &srcStore0,                                      &srcStore1,                                      NULL); +            if (!inst) { +               return NULL; +            }              /* ADD accTemp, accTemp, sneTemp; # like logical-OR */              inst = emit_instruction(emitInfo, OPCODE_ADD,                                      &accTemp, /* dest */                                      &accTemp,                                      &sneTemp,                                      NULL); +            if (!inst) { +               return NULL; +            }           }        } @@ -1025,6 +1046,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                &accTemp,                                &accTemp,                                NULL); +      if (!inst) { +         return NULL; +      }        inst_comment(inst, "End struct/array comparison");        if (n->Opcode == IR_EQUAL) { @@ -1036,6 +1060,9 @@ emit_compare(slang_emit_info *emitInfo, slang_ir_node *n)                                   n->Store,                                   &zero,                                   NULL); +         if (!inst) { +            return NULL; +         }           inst_comment(inst, "Invert true/false");        } @@ -1119,6 +1146,9 @@ emit_clamp(slang_emit_info *emitInfo, slang_ir_node *n)                             n->Children[0]->Store,                             n->Children[1]->Store,                             NULL); +   if (!inst) { +      return NULL; +   }     /* n->dest = min(tmp, ch[2]) */     inst = emit_instruction(emitInfo, OPCODE_MIN, @@ -1153,7 +1183,9 @@ emit_negation(slang_emit_info *emitInfo, slang_ir_node *n)                             n->Children[0]->Store,                             NULL,                             NULL); -   inst->SrcReg[0].Negate = NEGATE_XYZW; +   if (inst) { +      inst->SrcReg[0].Negate = NEGATE_XYZW; +   }     return inst;  } @@ -1356,6 +1388,9 @@ emit_tex(slang_emit_info *emitInfo, slang_ir_node *n)                             n->Children[1]->Store,                             NULL,                             NULL); +   if (!inst) { +      return NULL; +   }     inst->TexShadow = shadow; @@ -1458,6 +1493,9 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)                                      &srcStore,                                      NULL,                                      NULL); +            if (!inst) { +               return NULL; +            }              inst_comment(inst, "IR_COPY block");              srcStore.Index++;              dstStore.Index++; @@ -1473,6 +1511,9 @@ emit_copy(slang_emit_info *emitInfo, slang_ir_node *n)                                   n->Children[1]->Store,                                   NULL,                                   NULL); +         if (!inst) { +            return NULL; +         }           dstAnnot = storage_annotation(n->Children[0], emitInfo->prog);           srcAnnot = storage_annotation(n->Children[1], emitInfo->prog);           inst->Comment = instruction_annotation(inst->Opcode, dstAnnot, @@ -1534,6 +1575,9 @@ emit_cond(slang_emit_info *emitInfo, slang_ir_node *n)                                   n->Children[0]->Store,                                   NULL,                                   NULL); +         if (!inst) { +            return NULL; +         }           inst->CondUpdate = GL_TRUE;           inst_comment(inst, "COND expr");           _slang_free_temp(emitInfo->vt, n->Store); @@ -1596,6 +1640,9 @@ emit_not(slang_emit_info *emitInfo, slang_ir_node *n)                             n->Children[0]->Store,                             &zero,                             NULL); +   if (!inst) { +      return NULL; +   }     inst_comment(inst, "NOT");     free_node_storage(emitInfo->vt, n->Children[0]); @@ -1646,12 +1693,17 @@ emit_if(slang_emit_info *emitInfo, slang_ir_node *n)           ifInst->DstReg.CondSwizzle = writemask_to_swizzle(condWritemask);        }        else { +         struct prog_instruction *inst; +           /* IF src[0] THEN ... */ -         emit_instruction(emitInfo, OPCODE_IF, -                          NULL, /* dst */ -                          n->Children[0]->Store, /* op0 */ -                          NULL, -                          NULL); +         inst = emit_instruction(emitInfo, OPCODE_IF, +                                 NULL, /* dst */ +                                 n->Children[0]->Store, /* op0 */ +                                 NULL, +                                 NULL); +         if (!inst) { +            return NULL; +         }        }     }     else { @@ -1875,6 +1927,9 @@ emit_cont_break_if_true(slang_emit_info *emitInfo, slang_ir_node *n)                                   n->Children[0]->Store,                                   NULL,                                   NULL); +         if (!inst) { +            return NULL; +         }           n->InstLocation = emitInfo->prog->NumInstructions;           inst = new_instruction(emitInfo, opcode); @@ -2045,6 +2100,9 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)                                   indexStore, /* the index */                                   &elemSizeStore,                                   NULL); +         if (!inst) { +            return NULL; +         }           indexStore = indexTemp;        } @@ -2071,6 +2129,9 @@ emit_array_element(slang_emit_info *emitInfo, slang_ir_node *n)                                   indexStore,     /* the index */                                   &indirectArray, /* indirect array base */                                   NULL); +         if (!inst) { +            return NULL; +         }           indexStore = indexTemp;        } diff --git a/src/mesa/shader/slang/slang_link.c b/src/mesa/shader/slang/slang_link.c index 0a2bc49780..ed27821a95 100644 --- a/src/mesa/shader/slang/slang_link.c +++ b/src/mesa/shader/slang/slang_link.c @@ -590,11 +590,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType)  {     struct gl_shader *newShader;     const struct gl_shader *firstShader = NULL; -   GLuint shaderLengths[100]; +   GLuint *shaderLengths;     GLchar *source;     GLuint totalLen = 0, len = 0;     GLuint i; +   shaderLengths = (GLuint *)_mesa_malloc(shProg->NumShaders * sizeof(GLuint)); +   if (!shaderLengths) { +      return NULL; +   } +     /* compute total size of new shader source code */     for (i = 0; i < shProg->NumShaders; i++) {        const struct gl_shader *shader = shProg->Shaders[i]; @@ -606,12 +611,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType)        }     } -   if (totalLen == 0) +   if (totalLen == 0) { +      _mesa_free(shaderLengths);        return NULL; +   }     source = (GLchar *) _mesa_malloc(totalLen + 1); -   if (!source) +   if (!source) { +      _mesa_free(shaderLengths);        return NULL; +   }     /* concatenate shaders */     for (i = 0; i < shProg->NumShaders; i++) { @@ -626,9 +635,16 @@ concat_shaders(struct gl_shader_program *shProg, GLenum shaderType)     _mesa_printf("---NEW CONCATENATED SHADER---:\n%s\n------------\n", source);     */ +   _mesa_free(shaderLengths); +     remove_extra_version_directives(source);     newShader = CALLOC_STRUCT(gl_shader); +   if (!newShader) { +      _mesa_free(source); +      return NULL; +   } +     newShader->Type = shaderType;     newShader->Source = source;     newShader->Pragmas = firstShader->Pragmas; diff --git a/src/mesa/swrast_setup/ss_tritmp.h b/src/mesa/swrast_setup/ss_tritmp.h index 724b5e94fa..17f3863956 100644 --- a/src/mesa/swrast_setup/ss_tritmp.h +++ b/src/mesa/swrast_setup/ss_tritmp.h @@ -67,8 +67,8 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  	 if (facing == 1) {  	    if (IND & SS_TWOSIDE_BIT) {  	       if (IND & SS_RGBA_BIT) { -                  if (VB->ColorPtr[1]) { -                     GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data; +                  if (VB->BackfaceColorPtr) { +                     GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data;                       if (swsetup->intColors) {                          COPY_CHAN4(saved_color[0], v[0]->color); @@ -81,7 +81,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )                          COPY_4V(saved_col0[2], v[2]->attrib[FRAG_ATTRIB_COL0]);                       } -                     if (VB->ColorPtr[1]->stride) { +                     if (VB->BackfaceColorPtr->stride) {                          if (swsetup->intColors) {                             SS_COLOR(v[0]->color, vbcolor[e0]);                             SS_COLOR(v[1]->color, vbcolor[e1]); @@ -108,14 +108,14 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )                       }                    } -		  if (VB->SecondaryColorPtr[1]) { -		     GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data; +		  if (VB->BackfaceSecondaryColorPtr) { +		     GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data;  		     COPY_4V(saved_spec[0], v[0]->attrib[FRAG_ATTRIB_COL1]);  		     COPY_4V(saved_spec[1], v[1]->attrib[FRAG_ATTRIB_COL1]);  		     COPY_4V(saved_spec[2], v[2]->attrib[FRAG_ATTRIB_COL1]); -		     if (VB->SecondaryColorPtr[1]->stride) { +		     if (VB->BackfaceSecondaryColorPtr->stride) {  			SS_SPEC(v[0]->attrib[FRAG_ATTRIB_COL1], vbspec[e0]);  			SS_SPEC(v[1]->attrib[FRAG_ATTRIB_COL1], vbspec[e1]);  			SS_SPEC(v[2]->attrib[FRAG_ATTRIB_COL1], vbspec[e2]); @@ -127,7 +127,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  		     }  		  }  	       } else { -		  GLfloat *vbindex = (GLfloat *)VB->IndexPtr[1]->data; +		  GLfloat *vbindex = (GLfloat *)VB->BackfaceIndexPtr->data;  		  saved_index[0] = v[0]->attrib[FRAG_ATTRIB_CI][0];  		  saved_index[1] = v[1]->attrib[FRAG_ATTRIB_CI][0];  		  saved_index[2] = v[2]->attrib[FRAG_ATTRIB_CI][0]; @@ -200,7 +200,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )     if (IND & SS_TWOSIDE_BIT) {        if (facing == 1) {  	 if (IND & SS_RGBA_BIT) { -            if (VB->ColorPtr[1]) { +            if (VB->BackfaceColorPtr) {                 if (swsetup->intColors) {                    COPY_CHAN4(v[0]->color, saved_color[0]);                    COPY_CHAN4(v[1]->color, saved_color[1]); @@ -213,7 +213,7 @@ static void TAG(triangle)(GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )                 }              } -	    if (VB->SecondaryColorPtr[1]) { +	    if (VB->BackfaceSecondaryColorPtr) {  	       COPY_4V(v[0]->attrib[FRAG_ATTRIB_COL1], saved_spec[0]);  	       COPY_4V(v[1]->attrib[FRAG_ATTRIB_COL1], saved_spec[1]);  	       COPY_4V(v[2]->attrib[FRAG_ATTRIB_COL1], saved_spec[2]); diff --git a/src/mesa/tnl/t_context.h b/src/mesa/tnl/t_context.h index 6137c2d2fe..ebaae6335b 100644 --- a/src/mesa/tnl/t_context.h +++ b/src/mesa/tnl/t_context.h @@ -198,26 +198,23 @@ struct vertex_buffer      */     GLuint Count;  /**< Number of vertices currently in buffer */ -   /* Pointers to current data. -    * XXX some of these fields alias AttribPtr below and should be removed -    * such as NormalPtr, TexCoordPtr, FogCoordPtr, etc. +   /* Pointers to current data.  Most of the data is in AttribPtr -- all of +    * it that is one of VERT_ATTRIB_X.  For things only produced by TNL, +    * such as backface color or eye-space coordinates, they are stored +    * here.      */     GLuint      *Elts;		                 -   GLvector4f  *ObjPtr;		                /* _TNL_BIT_POS */     GLvector4f  *EyePtr;		                /* _TNL_BIT_POS */     GLvector4f  *ClipPtr;	                /* _TNL_BIT_POS */     GLvector4f  *NdcPtr;                         /* _TNL_BIT_POS */     GLubyte     ClipOrMask;	                /* _TNL_BIT_POS */     GLubyte     ClipAndMask;	                /* _TNL_BIT_POS */     GLubyte     *ClipMask;		        /* _TNL_BIT_POS */ -   GLvector4f  *NormalPtr;	                /* _TNL_BIT_NORMAL */     GLfloat     *NormalLengthPtr;	        /* _TNL_BIT_NORMAL */     GLboolean   *EdgeFlag;	                /* _TNL_BIT_EDGEFLAG */ -   GLvector4f  *TexCoordPtr[MAX_TEXTURE_COORD_UNITS]; /* VERT_TEX_0..n */ -   GLvector4f  *IndexPtr[2];	                /* _TNL_BIT_INDEX */ -   GLvector4f  *ColorPtr[2];	                /* _TNL_BIT_COLOR0 */ -   GLvector4f  *SecondaryColorPtr[2];           /* _TNL_BIT_COLOR1 */ -   GLvector4f  *FogCoordPtr;	                /* _TNL_BIT_FOG */ +   GLvector4f  *BackfaceIndexPtr; +   GLvector4f  *BackfaceColorPtr; +   GLvector4f  *BackfaceSecondaryColorPtr;     const struct _mesa_prim  *Primitive;	                   GLuint      PrimitiveCount;	       @@ -402,11 +399,6 @@ struct tnl_device_driver     /* Alert tnl-aware drivers of changes to material.      */ -   void (*NotifyInputChanges)(GLcontext *ctx, GLuint bitmask); -   /* Alert tnl-aware drivers of changes to size and stride of input -    * arrays. -    */ -     /***      *** Rendering -- These functions called only from t_vb_render.c      ***/ diff --git a/src/mesa/tnl/t_draw.c b/src/mesa/tnl/t_draw.c index 04fa106300..1c7c733883 100644 --- a/src/mesa/tnl/t_draw.c +++ b/src/mesa/tnl/t_draw.c @@ -251,22 +251,10 @@ static void bind_inputs( GLcontext *ctx,      */     VB->Count = count; - -   /* Legacy pointers -- remove one day. -    */ -   VB->ObjPtr = VB->AttribPtr[_TNL_ATTRIB_POS]; -   VB->NormalPtr = VB->AttribPtr[_TNL_ATTRIB_NORMAL]; -   VB->ColorPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR0]; -   VB->ColorPtr[1] = NULL; -   VB->IndexPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX]; -   VB->IndexPtr[1] = NULL; -   VB->SecondaryColorPtr[0] = VB->AttribPtr[_TNL_ATTRIB_COLOR1]; -   VB->SecondaryColorPtr[1] = NULL; -   VB->FogCoordPtr = VB->AttribPtr[_TNL_ATTRIB_FOG]; - -   for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { -      VB->TexCoordPtr[i] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]; -   } +   /* These should perhaps be part of _TNL_ATTRIB_* */ +   VB->BackfaceColorPtr = NULL; +   VB->BackfaceIndexPtr = NULL; +   VB->BackfaceSecondaryColorPtr = NULL;     /* Clipping and drawing code still requires this to be a packed      * array of ubytes which can be written into.  TODO: Fix and diff --git a/src/mesa/tnl/t_pipeline.c b/src/mesa/tnl/t_pipeline.c index 357ef1e24b..01b30babb4 100644 --- a/src/mesa/tnl/t_pipeline.c +++ b/src/mesa/tnl/t_pipeline.c @@ -86,10 +86,6 @@ static GLuint check_input_changes( GLcontext *ctx )        }     } -   if (tnl->pipeline.input_changes && -      tnl->Driver.NotifyInputChanges)  -      tnl->Driver.NotifyInputChanges( ctx, tnl->pipeline.input_changes ); -     return tnl->pipeline.input_changes;  } diff --git a/src/mesa/tnl/t_vb_fog.c b/src/mesa/tnl/t_vb_fog.c index f3a7bd49f4..4a0e6ad4f9 100644 --- a/src/mesa/tnl/t_vb_fog.c +++ b/src/mesa/tnl/t_vb_fog.c @@ -156,7 +156,7 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)        GLuint i;        GLfloat *coord;        /* Fog is computed from vertex or fragment Z values */ -      /* source = VB->ObjPtr or VB->EyePtr coords */ +      /* source = VB->AttribPtr[_TNL_ATTRIB_POS] or VB->EyePtr coords */        /* dest = VB->AttribPtr[_TNL_ATTRIB_FOG] = fog stage private storage */        VB->AttribPtr[_TNL_ATTRIB_FOG] = &store->fogcoord; @@ -176,11 +176,12 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)  	 /* Full eye coords weren't required, just calculate the  	  * eye Z values.  	  */ -	 _mesa_dotprod_tab[VB->ObjPtr->size]( (GLfloat *) input->data, -					      4 * sizeof(GLfloat), -					      VB->ObjPtr, plane ); +	 _mesa_dotprod_tab[VB->AttribPtr[_TNL_ATTRIB_POS]->size] +	    ( (GLfloat *) input->data, +	      4 * sizeof(GLfloat), +	      VB->AttribPtr[_TNL_ATTRIB_POS], plane ); -	 input->count = VB->ObjPtr->count; +	 input->count = VB->AttribPtr[_TNL_ATTRIB_POS]->count;  	 /* make sure coords are really positive  	    NOTE should avoid going through array twice */ @@ -213,7 +214,7 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)        /* input->count may be one if glFogCoord was only called once         * before glBegin.  But we need to compute fog for all vertices.         */ -      input->count = VB->ObjPtr->count; +      input->count = VB->AttribPtr[_TNL_ATTRIB_POS]->count;        VB->AttribPtr[_TNL_ATTRIB_FOG] = &store->fogcoord;  /* dest data */     } @@ -227,7 +228,6 @@ run_fog_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)        VB->AttribPtr[_TNL_ATTRIB_FOG] = input;     } -   VB->FogCoordPtr = VB->AttribPtr[_TNL_ATTRIB_FOG];     return GL_TRUE;  } diff --git a/src/mesa/tnl/t_vb_light.c b/src/mesa/tnl/t_vb_light.c index f47f99397c..8a0fe63fd8 100644 --- a/src/mesa/tnl/t_vb_light.c +++ b/src/mesa/tnl/t_vb_light.c @@ -127,7 +127,7 @@ prepare_materials(GLcontext *ctx,        const GLuint bitmask = ctx->Light.ColorMaterialBitmask;        for (i = 0 ; i < MAT_ATTRIB_MAX ; i++)  	 if (bitmask & (1<<i)) -	    VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->ColorPtr[0]; +	    VB->AttribPtr[_TNL_ATTRIB_MAT_FRONT_AMBIENT + i] = VB->AttribPtr[_TNL_ATTRIB_COLOR0];     }     /* Now, for each material attribute that's tracking vertex color, save @@ -200,7 +200,7 @@ static GLboolean run_lighting( GLcontext *ctx,     struct light_stage_data *store = LIGHT_STAGE_DATA(stage);     TNLcontext *tnl = TNL_CONTEXT(ctx);     struct vertex_buffer *VB = &tnl->vb; -   GLvector4f *input = ctx->_NeedEyeCoords ? VB->EyePtr : VB->ObjPtr; +   GLvector4f *input = ctx->_NeedEyeCoords ? VB->EyePtr : VB->AttribPtr[_TNL_ATTRIB_POS];     GLuint idx;     if (!ctx->Light.Enabled || ctx->VertexProgram._Current) @@ -208,13 +208,13 @@ static GLboolean run_lighting( GLcontext *ctx,     /* Make sure we can talk about position x,y and z:      */ -   if (input->size <= 2 && input == VB->ObjPtr) { +   if (input->size <= 2 && input == VB->AttribPtr[_TNL_ATTRIB_POS]) {        _math_trans_4f( store->Input.data, -		      VB->ObjPtr->data, -		      VB->ObjPtr->stride, +		      VB->AttribPtr[_TNL_ATTRIB_POS]->data, +		      VB->AttribPtr[_TNL_ATTRIB_POS]->stride,  		      GL_FLOAT, -		      VB->ObjPtr->size, +		      VB->AttribPtr[_TNL_ATTRIB_POS]->size,  		      0,  		      VB->Count ); @@ -246,10 +246,6 @@ static GLboolean run_lighting( GLcontext *ctx,      */     store->light_func_tab[idx]( ctx, VB, stage, input ); -   VB->AttribPtr[_TNL_ATTRIB_COLOR0] = VB->ColorPtr[0]; -   VB->AttribPtr[_TNL_ATTRIB_COLOR1] = VB->SecondaryColorPtr[0]; -   VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX] = VB->IndexPtr[0]; -     return GL_TRUE;  } diff --git a/src/mesa/tnl/t_vb_lighttmp.h b/src/mesa/tnl/t_vb_lighttmp.h index 124ca3c74f..4ebef2356f 100644 --- a/src/mesa/tnl/t_vb_lighttmp.h +++ b/src/mesa/tnl/t_vb_lighttmp.h @@ -72,13 +72,13 @@ static void TAG(light_rgba_spec)( GLcontext *ctx,     fprintf(stderr, "%s\n", __FUNCTION__ );  #endif -   VB->ColorPtr[0] = &store->LitColor[0]; -   VB->SecondaryColorPtr[0] = &store->LitSecondary[0]; +   VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0]; +   VB->AttribPtr[_TNL_ATTRIB_COLOR1] = &store->LitSecondary[0];     sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3];  #if IDX & LIGHT_TWOSIDE -   VB->ColorPtr[1] = &store->LitColor[1]; -   VB->SecondaryColorPtr[1] = &store->LitSecondary[1]; +   VB->BackfaceColorPtr = &store->LitColor[1]; +   VB->BackfaceSecondaryColorPtr = &store->LitSecondary[1];     sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3];  #endif @@ -259,11 +259,11 @@ static void TAG(light_rgba)( GLcontext *ctx,     fprintf(stderr, "%s\n", __FUNCTION__ );  #endif -   VB->ColorPtr[0] = &store->LitColor[0]; +   VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];     sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3];  #if IDX & LIGHT_TWOSIDE -   VB->ColorPtr[1] = &store->LitColor[1]; +   VB->BackfaceColorPtr = &store->LitColor[1];     sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3];  #endif @@ -449,9 +449,9 @@ static void TAG(light_fast_rgba_single)( GLcontext *ctx,     (void) input;		/* doesn't refer to Eye or Obj */ -   VB->ColorPtr[0] = &store->LitColor[0]; +   VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];  #if IDX & LIGHT_TWOSIDE -   VB->ColorPtr[1] = &store->LitColor[1]; +   VB->BackfaceColorPtr = &store->LitColor[1];  #endif     if (nr > 1) { @@ -559,9 +559,9 @@ static void TAG(light_fast_rgba)( GLcontext *ctx,     sumA[0] = ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_DIFFUSE][3];     sumA[1] = ctx->Light.Material.Attrib[MAT_ATTRIB_BACK_DIFFUSE][3]; -   VB->ColorPtr[0] = &store->LitColor[0]; +   VB->AttribPtr[_TNL_ATTRIB_COLOR0] = &store->LitColor[0];  #if IDX & LIGHT_TWOSIDE -   VB->ColorPtr[1] = &store->LitColor[1]; +   VB->BackfaceColorPtr = &store->LitColor[1];  #endif     if (nr > 1) { @@ -665,14 +665,14 @@ static void TAG(light_ci)( GLcontext *ctx,     fprintf(stderr, "%s\n", __FUNCTION__ );  #endif -   VB->IndexPtr[0] = &store->LitIndex[0]; +   VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX] = &store->LitIndex[0];  #if IDX & LIGHT_TWOSIDE -   VB->IndexPtr[1] = &store->LitIndex[1]; +   VB->BackfaceIndexPtr = &store->LitIndex[1];  #endif -   indexResult[0] = (GLfloat *)VB->IndexPtr[0]->data; +   indexResult[0] = (GLfloat *)VB->AttribPtr[_TNL_ATTRIB_COLOR_INDEX]->data;  #if IDX & LIGHT_TWOSIDE -   indexResult[1] = (GLfloat *)VB->IndexPtr[1]->data; +   indexResult[1] = (GLfloat *)VB->BackfaceIndexPtr->data;  #endif     /* loop over vertices */ diff --git a/src/mesa/tnl/t_vb_normals.c b/src/mesa/tnl/t_vb_normals.c index a4821cc1cc..693d3dc118 100644 --- a/src/mesa/tnl/t_vb_normals.c +++ b/src/mesa/tnl/t_vb_normals.c @@ -79,7 +79,6 @@ run_normal_stage(GLcontext *ctx, struct tnl_pipeline_stage *stage)     }     VB->AttribPtr[_TNL_ATTRIB_NORMAL] = &store->normal; -   VB->NormalPtr = &store->normal;     VB->NormalLengthPtr = NULL;	/* no longer valid */     return GL_TRUE; diff --git a/src/mesa/tnl/t_vb_program.c b/src/mesa/tnl/t_vb_program.c index e69f7d5766..c289cdfbaa 100644 --- a/src/mesa/tnl/t_vb_program.c +++ b/src/mesa/tnl/t_vb_program.c @@ -454,19 +454,14 @@ run_vp( GLcontext *ctx, struct tnl_pipeline_stage *stage )        VB->ClipPtr->count = VB->Count;     } -   VB->ColorPtr[0] = &store->results[VERT_RESULT_COL0]; -   VB->ColorPtr[1] = &store->results[VERT_RESULT_BFC0]; -   VB->SecondaryColorPtr[0] = &store->results[VERT_RESULT_COL1]; -   VB->SecondaryColorPtr[1] = &store->results[VERT_RESULT_BFC1]; -   VB->FogCoordPtr = &store->results[VERT_RESULT_FOGC]; -     VB->AttribPtr[VERT_ATTRIB_COLOR0] = &store->results[VERT_RESULT_COL0];     VB->AttribPtr[VERT_ATTRIB_COLOR1] = &store->results[VERT_RESULT_COL1];     VB->AttribPtr[VERT_ATTRIB_FOG] = &store->results[VERT_RESULT_FOGC];     VB->AttribPtr[_TNL_ATTRIB_POINTSIZE] = &store->results[VERT_RESULT_PSIZ]; +   VB->BackfaceColorPtr = &store->results[VERT_RESULT_BFC0]; +   VB->BackfaceSecondaryColorPtr = &store->results[VERT_RESULT_BFC1];     for (i = 0; i < ctx->Const.MaxTextureCoordUnits; i++) { -      VB->TexCoordPtr[i] =         VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]           = &store->results[VERT_RESULT_TEX0 + i];     } diff --git a/src/mesa/tnl/t_vb_texgen.c b/src/mesa/tnl/t_vb_texgen.c index 7c1819b223..9ef13bc96d 100644 --- a/src/mesa/tnl/t_vb_texgen.c +++ b/src/mesa/tnl/t_vb_texgen.c @@ -341,7 +341,7 @@ static void texgen( GLcontext *ctx,     GLvector4f *in = VB->AttribPtr[VERT_ATTRIB_TEX0 + unit];     GLvector4f *out = &store->texcoord[unit];     const struct gl_texture_unit *texUnit = &ctx->Texture.Unit[unit]; -   const GLvector4f *obj = VB->ObjPtr; +   const GLvector4f *obj = VB->AttribPtr[_TNL_ATTRIB_POS];     const GLvector4f *eye = VB->EyePtr;     const GLvector4f *normal = VB->AttribPtr[_TNL_ATTRIB_NORMAL];     const GLfloat *m = store->tmp_m; @@ -498,7 +498,6 @@ static GLboolean run_texgen_stage( GLcontext *ctx,  	 store->TexgenFunc[i]( ctx, store, i ); -         VB->TexCoordPtr[i] =           VB->AttribPtr[VERT_ATTRIB_TEX0 + i] = &store->texcoord[i];        }     } diff --git a/src/mesa/tnl/t_vb_texmat.c b/src/mesa/tnl/t_vb_texmat.c index 0abe8cc35d..83688290e5 100644 --- a/src/mesa/tnl/t_vb_texmat.c +++ b/src/mesa/tnl/t_vb_texmat.c @@ -73,7 +73,6 @@ static GLboolean run_texmat_stage( GLcontext *ctx,  			      ctx->TextureMatrixStack[i].Top,  			      VB->AttribPtr[_TNL_ATTRIB_TEX0 + i]); -         VB->TexCoordPtr[i] =   	 VB->AttribPtr[VERT_ATTRIB_TEX0+i] = &store->texcoord[i];        }     } diff --git a/src/mesa/tnl/t_vb_vertex.c b/src/mesa/tnl/t_vb_vertex.c index 4734754ea4..bc7e0951ec 100644 --- a/src/mesa/tnl/t_vb_vertex.c +++ b/src/mesa/tnl/t_vb_vertex.c @@ -152,16 +152,16 @@ static GLboolean run_vertex_stage( GLcontext *ctx,         * Use combined ModelProject to avoid some depth artifacts         */        if (ctx->ModelviewMatrixStack.Top->type == MATRIX_IDENTITY) -	 VB->EyePtr = VB->ObjPtr; +	 VB->EyePtr = VB->AttribPtr[_TNL_ATTRIB_POS];        else  	 VB->EyePtr = TransformRaw( &store->eye,  				    ctx->ModelviewMatrixStack.Top, -				    VB->ObjPtr); +				    VB->AttribPtr[_TNL_ATTRIB_POS]);     }     VB->ClipPtr = TransformRaw( &store->clip,  			       &ctx->_ModelProjectMatrix, -			       VB->ObjPtr ); +			       VB->AttribPtr[_TNL_ATTRIB_POS] );     /* Drivers expect this to be clean to element 4...      */ diff --git a/src/mesa/tnl/t_vertex_generic.c b/src/mesa/tnl/t_vertex_generic.c index 9812f8c808..fa34d11d7b 100644 --- a/src/mesa/tnl/t_vertex_generic.c +++ b/src/mesa/tnl/t_vertex_generic.c @@ -1092,33 +1092,33 @@ void _tnl_generic_interp_extras( GLcontext *ctx,  {     struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   /* If stride is zero, ColorPtr[1] is constant across the VB, so +   /* If stride is zero, BackfaceColorPtr is constant across the VB, so      * there is no point interpolating between two values as they will      * be identical.  In all other cases, this value is generated by      * t_vb_lighttmp.h and has a stride of 4 dwords.      */ -   if (VB->ColorPtr[1] && VB->ColorPtr[1]->stride) { -      assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); +   if (VB->BackfaceColorPtr && VB->BackfaceColorPtr->stride) { +      assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));        INTERP_4F( t, -		 VB->ColorPtr[1]->data[dst], -		 VB->ColorPtr[1]->data[out], -		 VB->ColorPtr[1]->data[in] ); +		 VB->BackfaceColorPtr->data[dst], +		 VB->BackfaceColorPtr->data[out], +		 VB->BackfaceColorPtr->data[in] );     } -   if (VB->SecondaryColorPtr[1]) { -      assert(VB->SecondaryColorPtr[1]->stride == 4 * sizeof(GLfloat)); +   if (VB->BackfaceSecondaryColorPtr) { +      assert(VB->BackfaceSecondaryColorPtr->stride == 4 * sizeof(GLfloat));        INTERP_3F( t, -		 VB->SecondaryColorPtr[1]->data[dst], -		 VB->SecondaryColorPtr[1]->data[out], -		 VB->SecondaryColorPtr[1]->data[in] ); +		 VB->BackfaceSecondaryColorPtr->data[dst], +		 VB->BackfaceSecondaryColorPtr->data[out], +		 VB->BackfaceSecondaryColorPtr->data[in] );     } -   if (VB->IndexPtr[1]) { -      VB->IndexPtr[1]->data[dst][0] = LINTERP( t, -					       VB->IndexPtr[1]->data[out][0], -					       VB->IndexPtr[1]->data[in][0] ); +   if (VB->BackfaceIndexPtr) { +      VB->BackfaceIndexPtr->data[dst][0] = LINTERP( t, +					       VB->BackfaceIndexPtr->data[out][0], +					       VB->BackfaceIndexPtr->data[in][0] );     }     if (VB->EdgeFlag) { @@ -1135,18 +1135,18 @@ void _tnl_generic_copy_pv_extras( GLcontext *ctx,     /* See above comment:      */ -   if (VB->ColorPtr[1] && VB->ColorPtr[1]->stride) { -      COPY_4FV( VB->ColorPtr[1]->data[dst],  -		VB->ColorPtr[1]->data[src] ); +   if (VB->BackfaceColorPtr && VB->BackfaceColorPtr->stride) { +      COPY_4FV( VB->BackfaceColorPtr->data[dst], +		VB->BackfaceColorPtr->data[src] );     } -   if (VB->SecondaryColorPtr[1]) { -      COPY_4FV( VB->SecondaryColorPtr[1]->data[dst],  -		VB->SecondaryColorPtr[1]->data[src] ); +   if (VB->BackfaceSecondaryColorPtr) { +      COPY_4FV( VB->BackfaceSecondaryColorPtr->data[dst], +		VB->BackfaceSecondaryColorPtr->data[src] );     } -   if (VB->IndexPtr[1]) { -      VB->IndexPtr[1]->data[dst][0] = VB->IndexPtr[1]->data[src][0]; +   if (VB->BackfaceIndexPtr) { +      VB->BackfaceIndexPtr->data[dst][0] = VB->BackfaceIndexPtr->data[src][0];     }     _tnl_generic_copy_pv(ctx, dst, src); diff --git a/src/mesa/tnl_dd/t_dd_dmatmp.h b/src/mesa/tnl_dd/t_dd_dmatmp.h index e4b535fb68..e5885782c7 100644 --- a/src/mesa/tnl_dd/t_dd_dmatmp.h +++ b/src/mesa/tnl_dd/t_dd_dmatmp.h @@ -443,7 +443,7 @@ static void TAG(render_quad_strip_verts)( GLcontext *ctx,     } else if (HAVE_TRI_STRIPS &&   	      ctx->Light.ShadeModel == GL_FLAT && -	      TNL_CONTEXT(ctx)->vb.ColorPtr[0]->stride) { +	      TNL_CONTEXT(ctx)->vb.AttribPtr[_TNL_ATTRIB_COLOR0]->stride) {        if (HAVE_ELTS) {  	 LOCAL_VARS;  	 int dmasz = GET_SUBSEQUENT_VB_MAX_ELTS(); @@ -1221,7 +1221,7 @@ static GLboolean TAG(validate_render)( GLcontext *ctx,  	    ok = GL_TRUE;  	 } else if (HAVE_TRI_STRIPS &&   		    ctx->Light.ShadeModel == GL_FLAT && -		    VB->ColorPtr[0]->stride != 0) { +		    VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0) {  	    if (HAVE_ELTS) {  	       ok = (GLint) count < GET_SUBSEQUENT_VB_MAX_ELTS();  	    } diff --git a/src/mesa/tnl_dd/t_dd_tritmp.h b/src/mesa/tnl_dd/t_dd_tritmp.h index 1ae70f4059..8574fe618b 100644 --- a/src/mesa/tnl_dd/t_dd_tritmp.h +++ b/src/mesa/tnl_dd/t_dd_tritmp.h @@ -195,7 +195,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  		  }  	       }  	       else { -		  GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data; +		  GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data;  		  (void) vbcolor;  		  if (!DO_FLAT) { @@ -204,8 +204,8 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  		  }  		  VERT_SAVE_RGBA( 2 ); -		  if (VB->ColorPtr[1]->stride) { -		     ASSERT(VB->ColorPtr[1]->stride == 4*sizeof(GLfloat)); +		  if (VB->BackfaceColorPtr->stride) { +		     ASSERT(VB->BackfaceColorPtr->stride == 4*sizeof(GLfloat));  		     if (!DO_FLAT) {		    			VERT_SET_RGBA( v[0], vbcolor[e0] ); @@ -221,9 +221,9 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  		     VERT_SET_RGBA( v[2], vbcolor[0] );  		  } -		  if (HAVE_SPEC && VB->SecondaryColorPtr[1]) { -		     GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data; -		     ASSERT(VB->SecondaryColorPtr[1]->stride == 4*sizeof(GLfloat)); +		  if (HAVE_SPEC && VB->BackfaceSecondaryColorPtr) { +		     GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data; +		     ASSERT(VB->BackfaceSecondaryColorPtr->stride == 4*sizeof(GLfloat));  		     if (!DO_FLAT) {  			VERT_SAVE_SPEC( 0 ); @@ -237,7 +237,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  	       }  	    }  	    else { -	       GLfloat (*vbindex) = (GLfloat *)VB->IndexPtr[1]->data; +	       GLfloat (*vbindex) = (GLfloat *)VB->BackfaceIndexPtr->data;  	       if (!DO_FLAT) {  		  VERT_SAVE_IND( 0 );  		  VERT_SAVE_IND( 1 ); @@ -279,7 +279,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )  	 VERT_SAVE_RGBA( 1 );  	 VERT_COPY_RGBA( v[0], v[2] );  	 VERT_COPY_RGBA( v[1], v[2] ); -	 if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { +	 if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {  	    VERT_SAVE_SPEC( 0 );  	    VERT_SAVE_SPEC( 1 );  	    VERT_COPY_SPEC( v[0], v[2] ); @@ -374,7 +374,7 @@ static void TAG(triangle)( GLcontext *ctx, GLuint e0, GLuint e1, GLuint e2 )        if (HAVE_RGBA) {  	 VERT_RESTORE_RGBA( 0 );  	 VERT_RESTORE_RGBA( 1 ); -	 if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { +	 if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {  	    VERT_RESTORE_SPEC( 0 );  	    VERT_RESTORE_SPEC( 1 );  	 } @@ -436,7 +436,7 @@ static void TAG(quadr)( GLcontext *ctx,  	 if (DO_TWOSIDE && facing == 1)  	 {  	    if (HAVE_RGBA) { -	       GLfloat (*vbcolor)[4] = VB->ColorPtr[1]->data; +	       GLfloat (*vbcolor)[4] = VB->BackfaceColorPtr->data;  	       (void)vbcolor;  	       if (HAVE_BACK_COLORS) { @@ -471,7 +471,7 @@ static void TAG(quadr)( GLcontext *ctx,  		  }  	          VERT_SAVE_RGBA( 3 ); -		  if (VB->ColorPtr[1]->stride) { +		  if (VB->BackfaceColorPtr->stride) {  		     if (!DO_FLAT) {  			VERT_SET_RGBA( v[0], vbcolor[e0] );  			VERT_SET_RGBA( v[1], vbcolor[e1] ); @@ -488,9 +488,9 @@ static void TAG(quadr)( GLcontext *ctx,  		     VERT_SET_RGBA( v[3], vbcolor[0] );  		  } -	          if (HAVE_SPEC && VB->SecondaryColorPtr[1]) { -		     GLfloat (*vbspec)[4] = VB->SecondaryColorPtr[1]->data; -		     ASSERT(VB->SecondaryColorPtr[1]->stride==4*sizeof(GLfloat)); +	          if (HAVE_SPEC && VB->BackfaceSecondaryColorPtr) { +		     GLfloat (*vbspec)[4] = VB->BackfaceSecondaryColorPtr->data; +		     ASSERT(VB->BackfaceSecondaryColorPtr->stride==4*sizeof(GLfloat));  		     if (!DO_FLAT) {  		        VERT_SAVE_SPEC( 0 ); @@ -506,7 +506,7 @@ static void TAG(quadr)( GLcontext *ctx,  	       }  	    }  	    else { -	       GLfloat *vbindex = (GLfloat *)VB->IndexPtr[1]->data; +	       GLfloat *vbindex = (GLfloat *)VB->BackfaceIndexPtr->data;  	       if (!DO_FLAT) {  		  VERT_SAVE_IND( 0 );  		  VERT_SAVE_IND( 1 ); @@ -553,7 +553,7 @@ static void TAG(quadr)( GLcontext *ctx,  	 VERT_COPY_RGBA( v[0], v[3] );  	 VERT_COPY_RGBA( v[1], v[3] );  	 VERT_COPY_RGBA( v[2], v[3] ); -	 if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { +	 if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {  	    VERT_SAVE_SPEC( 0 );  	    VERT_SAVE_SPEC( 1 );  	    VERT_SAVE_SPEC( 2 ); @@ -659,7 +659,7 @@ static void TAG(quadr)( GLcontext *ctx,  	 VERT_RESTORE_RGBA( 0 );  	 VERT_RESTORE_RGBA( 1 );  	 VERT_RESTORE_RGBA( 2 ); -	 if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { +	 if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {  	    VERT_RESTORE_SPEC( 0 );  	    VERT_RESTORE_SPEC( 1 );  	    VERT_RESTORE_SPEC( 2 ); @@ -708,7 +708,7 @@ static void TAG(line)( GLcontext *ctx, GLuint e0, GLuint e1 )        if (HAVE_RGBA) {  	 VERT_SAVE_RGBA( 0 );  	 VERT_COPY_RGBA( v[0], v[1] ); -	 if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { +	 if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {  	    VERT_SAVE_SPEC( 0 );  	    VERT_COPY_SPEC( v[0], v[1] );  	 } @@ -725,7 +725,7 @@ static void TAG(line)( GLcontext *ctx, GLuint e0, GLuint e1 )        if (HAVE_RGBA) {  	 VERT_RESTORE_RGBA( 0 ); -	 if (HAVE_SPEC && VB->SecondaryColorPtr[0]) { +	 if (HAVE_SPEC && VB->AttribPtr[_TNL_ATTRIB_COLOR1]) {  	    VERT_RESTORE_SPEC( 0 );  	 }        } diff --git a/src/mesa/tnl_dd/t_dd_vb.c b/src/mesa/tnl_dd/t_dd_vb.c index b3937c29a0..a8a0a69768 100644 --- a/src/mesa/tnl_dd/t_dd_vb.c +++ b/src/mesa/tnl_dd/t_dd_vb.c @@ -297,19 +297,19 @@ INTERP_QUALIFIER void TAG(interp_extras)( GLcontext *ctx,     LOCALVARS     struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -      assert(VB->ColorPtr[1]->stride == 4 * sizeof(GLfloat)); +   if (VB->BackfaceColorPtr) { +      assert(VB->BackfaceColorPtr->stride == 4 * sizeof(GLfloat));        INTERP_4F( t, -		    GET_COLOR(VB->ColorPtr[1], dst), -		    GET_COLOR(VB->ColorPtr[1], out), -		    GET_COLOR(VB->ColorPtr[1], in) ); +		    GET_COLOR(VB->BackfaceColorPtr, dst), +		    GET_COLOR(VB->BackfaceColorPtr, out), +		    GET_COLOR(VB->BackfaceColorPtr, in) ); -      if (VB->SecondaryColorPtr[1]) { +      if (VB->BackfaceSecondaryColorPtr) {  	 INTERP_3F( t, -		       GET_COLOR(VB->SecondaryColorPtr[1], dst), -		       GET_COLOR(VB->SecondaryColorPtr[1], out), -		       GET_COLOR(VB->SecondaryColorPtr[1], in) ); +		       GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), +		       GET_COLOR(VB->BackfaceSecondaryColorPtr, out), +		       GET_COLOR(VB->BackfaceSecondaryColorPtr, in) );        }     } @@ -326,13 +326,13 @@ INTERP_QUALIFIER void TAG(copy_pv_extras)( GLcontext *ctx,     LOCALVARS        struct vertex_buffer *VB = &TNL_CONTEXT(ctx)->vb; -   if (VB->ColorPtr[1]) { -      COPY_4FV( GET_COLOR(VB->ColorPtr[1], dst),  -		GET_COLOR(VB->ColorPtr[1], src) ); +   if (VB->BackfaceColorPtr) { +      COPY_4FV( GET_COLOR(VB->BackfaceColorPtr, dst), +		GET_COLOR(VB->BackfaceColorPtr, src) ); -      if (VB->SecondaryColorPtr[1]) { -	 COPY_4FV( GET_COLOR(VB->SecondaryColorPtr[1], dst),  -		   GET_COLOR(VB->SecondaryColorPtr[1], src) ); +      if (VB->BackfaceSecondaryColorPtr) { +	 COPY_4FV( GET_COLOR(VB->BackfaceSecondaryColorPtr, dst), +		   GET_COLOR(VB->BackfaceSecondaryColorPtr, src) );        }     } diff --git a/src/mesa/tnl_dd/t_dd_vbtmp.h b/src/mesa/tnl_dd/t_dd_vbtmp.h index 92dd8931c3..85101b9ceb 100644 --- a/src/mesa/tnl_dd/t_dd_vbtmp.h +++ b/src/mesa/tnl_dd/t_dd_vbtmp.h @@ -153,46 +153,46 @@ static void TAG(emit)( GLcontext *ctx,     if (DO_TEX3) {        const GLuint t3 = GET_TEXSOURCE(3); -      tc3 = VB->TexCoordPtr[t3]->data; -      tc3_stride = VB->TexCoordPtr[t3]->stride; +      tc3 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->data; +      tc3_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->stride;        if (DO_PTEX) -	 tc3_size = VB->TexCoordPtr[t3]->size; +	 tc3_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t3]->size;     }     if (DO_TEX2) {        const GLuint t2 = GET_TEXSOURCE(2); -      tc2 = VB->TexCoordPtr[t2]->data; -      tc2_stride = VB->TexCoordPtr[t2]->stride; +      tc2 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->data; +      tc2_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->stride;        if (DO_PTEX) -	 tc2_size = VB->TexCoordPtr[t2]->size; +	 tc2_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t2]->size;     }     if (DO_TEX1) {        const GLuint t1 = GET_TEXSOURCE(1); -      tc1 = VB->TexCoordPtr[t1]->data; -      tc1_stride = VB->TexCoordPtr[t1]->stride; +      tc1 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->data; +      tc1_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->stride;        if (DO_PTEX) -	 tc1_size = VB->TexCoordPtr[t1]->size; +	 tc1_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t1]->size;     }     if (DO_TEX0) {        const GLuint t0 = GET_TEXSOURCE(0); -      tc0_stride = VB->TexCoordPtr[t0]->stride; -      tc0 = VB->TexCoordPtr[t0]->data; +      tc0_stride = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->stride; +      tc0 = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->data;        if (DO_PTEX)  -	 tc0_size = VB->TexCoordPtr[t0]->size; +	 tc0_size = VB->AttribPtr[_TNL_ATTRIB_TEX0 + t0]->size;     }     if (DO_RGBA) { -      col_stride = VB->ColorPtr[0]->stride; -      col = VB->ColorPtr[0]->data; -      col_size = VB->ColorPtr[0]->size; +      col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; +      col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +      col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;     }     if (DO_SPEC) { -      if (VB->SecondaryColorPtr[0]) { -	 spec_stride = VB->SecondaryColorPtr[0]->stride; -	 spec = VB->SecondaryColorPtr[0]->data; +      if (VB->AttribPtr[_TNL_ATTRIB_COLOR1]) { +	 spec_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride; +	 spec = VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data;        } else {  	 spec = (GLfloat (*)[4])ctx->Current.Attrib[VERT_ATTRIB_COLOR1];  	 spec_stride = 0; @@ -200,9 +200,9 @@ static void TAG(emit)( GLcontext *ctx,     }     if (DO_FOG) { -      if (VB->FogCoordPtr) { -	 fog = VB->FogCoordPtr->data; -	 fog_stride = VB->FogCoordPtr->stride; +      if (VB->AttribPtr[_TNL_ATTRIB_FOG]) { +	 fog = VB->AttribPtr[_TNL_ATTRIB_FOG]->data; +	 fog_stride = VB->AttribPtr[_TNL_ATTRIB_FOG]->stride;        }        else {  	 static GLfloat tmp[4] = {0, 0, 0, 0}; @@ -356,9 +356,9 @@ static void TAG(emit)( GLcontext *ctx, GLuint start, GLuint end,     ASSERT(stride == 4); -   col = VB->ColorPtr[0]->data; -   col_stride = VB->ColorPtr[0]->stride; -   col_size = VB->ColorPtr[0]->size; +   col = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data; +   col_stride = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride; +   col_size = VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size;  /*     fprintf(stderr, "%s(small) importable %x\n",  */  /*  	   __FUNCTION__, VB->importable_data); */ @@ -410,22 +410,22 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* Force 'missing' texcoords to something valid.      */ -   if (DO_TEX3 && VB->TexCoordPtr[2] == 0) -      VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; +   if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 3]; -   if (DO_TEX2 && VB->TexCoordPtr[1] == 0) -      VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; +   if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2]; -   if (DO_TEX1 && VB->TexCoordPtr[0] == 0) -      VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +   if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1];     if (DO_PTEX)        return GL_TRUE; -   if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || -       (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || -       (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4) || -       (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4)) +   if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || +       (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || +       (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4) || +       (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4))        return GL_FALSE;     return GL_TRUE; @@ -438,14 +438,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* Force 'missing' texcoords to something valid.      */ -   if (DO_TEX3 && VB->TexCoordPtr[2] == 0) -      VB->TexCoordPtr[2] = VB->TexCoordPtr[3]; +   if (DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 3]; -   if (DO_TEX2 && VB->TexCoordPtr[1] == 0) -      VB->TexCoordPtr[1] = VB->TexCoordPtr[2]; +   if (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 2]; -   if (DO_TEX1 && VB->TexCoordPtr[0] == 0) -      VB->TexCoordPtr[0] = VB->TexCoordPtr[1]; +   if (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] == 0) +      VB->AttribPtr[_TNL_ATTRIB_TEX0 + 0] = VB->AttribPtr[_TNL_ATTRIB_TEX0 + 1];     if (DO_PTEX)        return GL_TRUE; @@ -453,14 +453,14 @@ static GLboolean TAG(check_tex_sizes)( GLcontext *ctx )     /* No hardware support for projective texture.  Can fake it for      * TEX0 only.      */ -   if ((DO_TEX3 && VB->TexCoordPtr[GET_TEXSOURCE(3)]->size == 4) || -       (DO_TEX2 && VB->TexCoordPtr[GET_TEXSOURCE(2)]->size == 4) || -       (DO_TEX1 && VB->TexCoordPtr[GET_TEXSOURCE(1)]->size == 4)) { +   if ((DO_TEX3 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(3)]->size == 4) || +       (DO_TEX2 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(2)]->size == 4) || +       (DO_TEX1 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(1)]->size == 4)) {        PTEX_FALLBACK();        return GL_FALSE;     } -   if (DO_TEX0 && VB->TexCoordPtr[GET_TEXSOURCE(0)]->size == 4) { +   if (DO_TEX0 && VB->AttribPtr[_TNL_ATTRIB_TEX0 + GET_TEXSOURCE(0)]->size == 4) {        if (DO_TEX1 || DO_TEX2 || DO_TEX3) {  	 PTEX_FALLBACK();        } diff --git a/src/mesa/x86/gen_matypes.c b/src/mesa/x86/gen_matypes.c index d56b701aa8..0d7e0f1f98 100644 --- a/src/mesa/x86/gen_matypes.c +++ b/src/mesa/x86/gen_matypes.c @@ -120,22 +120,22 @@ int main( int argc, char **argv )     OFFSET( "VB_COUNT               ", struct vertex_buffer, Count );     printf( "\n" );     OFFSET( "VB_ELTS                ", struct vertex_buffer, Elts ); -   OFFSET( "VB_OBJ_PTR             ", struct vertex_buffer, ObjPtr ); +   OFFSET( "VB_OBJ_PTR             ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_POS] );     OFFSET( "VB_EYE_PTR             ", struct vertex_buffer, EyePtr );     OFFSET( "VB_CLIP_PTR            ", struct vertex_buffer, ClipPtr );     OFFSET( "VB_PROJ_CLIP_PTR       ", struct vertex_buffer, NdcPtr );     OFFSET( "VB_CLIP_OR_MASK        ", struct vertex_buffer, ClipOrMask );     OFFSET( "VB_CLIP_MASK           ", struct vertex_buffer, ClipMask ); -   OFFSET( "VB_NORMAL_PTR          ", struct vertex_buffer, NormalPtr ); +   OFFSET( "VB_NORMAL_PTR          ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_NORMAL] );     OFFSET( "VB_EDGE_FLAG           ", struct vertex_buffer, EdgeFlag ); -   OFFSET( "VB_TEX0_COORD_PTR      ", struct vertex_buffer, TexCoordPtr[0] ); -   OFFSET( "VB_TEX1_COORD_PTR      ", struct vertex_buffer, TexCoordPtr[1] ); -   OFFSET( "VB_TEX2_COORD_PTR      ", struct vertex_buffer, TexCoordPtr[2] ); -   OFFSET( "VB_TEX3_COORD_PTR      ", struct vertex_buffer, TexCoordPtr[3] ); -   OFFSET( "VB_INDEX_PTR           ", struct vertex_buffer, IndexPtr ); -   OFFSET( "VB_COLOR_PTR           ", struct vertex_buffer, ColorPtr ); -   OFFSET( "VB_SECONDARY_COLOR_PTR ", struct vertex_buffer, SecondaryColorPtr ); -   OFFSET( "VB_FOG_COORD_PTR       ", struct vertex_buffer, FogCoordPtr ); +   OFFSET( "VB_TEX0_COORD_PTR      ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX0] ); +   OFFSET( "VB_TEX1_COORD_PTR      ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX1] ); +   OFFSET( "VB_TEX2_COORD_PTR      ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX2] ); +   OFFSET( "VB_TEX3_COORD_PTR      ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_TEX3] ); +   OFFSET( "VB_INDEX_PTR           ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR_INDEX] ); +   OFFSET( "VB_COLOR_PTR           ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR0] ); +   OFFSET( "VB_SECONDARY_COLOR_PTR ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_COLOR1] ); +   OFFSET( "VB_FOG_COORD_PTR       ", struct vertex_buffer, AttribPtr[_TNL_ATTRIB_FOG] );     OFFSET( "VB_PRIMITIVE           ", struct vertex_buffer, Primitive );     printf( "\n" ); | 
