diff options
Diffstat (limited to 'src')
24 files changed, 27 insertions, 27 deletions
diff --git a/src/gallium/auxiliary/os/os_time.h b/src/gallium/auxiliary/os/os_time.h index 5b55c1b374..7e0f67a76b 100644 --- a/src/gallium/auxiliary/os/os_time.h +++ b/src/gallium/auxiliary/os/os_time.h @@ -71,7 +71,7 @@ os_time_sleep(int64_t usecs); /* * Helper function for detecting time outs, taking in account overflow. * - * Returns true the the current time has elapsed beyond the specified interval. + * Returns true if the current time has elapsed beyond the specified interval. */ static INLINE boolean os_time_timeout(int64_t start, diff --git a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c index 576d514741..c54576b3c3 100644 --- a/src/gallium/drivers/cell/ppu/cell_gen_fragment.c +++ b/src/gallium/drivers/cell/ppu/cell_gen_fragment.c @@ -1352,7 +1352,7 @@ gen_stencil_values(struct spe_function *f, */ ASSERT(fbS_reg != newS_reg); - /* The code also assumes the the stencil_max_value is of the form + /* The code also assumes that the stencil_max_value is of the form * 2^n-1 and can therefore be used as a mask for the valid bits in * addition to a maximum. Make sure this is the case as well. * The clever math below exploits the fact that incrementing a diff --git a/src/gallium/drivers/cell/ppu/cell_spu.c b/src/gallium/drivers/cell/ppu/cell_spu.c index 28e5e6d706..39284f3a5d 100644 --- a/src/gallium/drivers/cell/ppu/cell_spu.c +++ b/src/gallium/drivers/cell/ppu/cell_spu.c @@ -135,7 +135,7 @@ cell_thread_function(void *arg) /** * Create the SPU threads. This is done once during driver initialization. - * This involves setting the the "init" message which is sent to each SPU. + * This involves setting the "init" message which is sent to each SPU. * The init message specifies an SPU id, total number of SPUs, location * and number of batch buffers, etc. */ diff --git a/src/gallium/drivers/nv40/nv40_vertprog.c b/src/gallium/drivers/nv40/nv40_vertprog.c index b289eef0fc..c93c5d127c 100644 --- a/src/gallium/drivers/nv40/nv40_vertprog.c +++ b/src/gallium/drivers/nv40/nv40_vertprog.c @@ -742,7 +742,7 @@ nv40_vertprog_translate(struct nv40_context *nv40, } /* Redirect post-transform vertex position to a temp if user clip - * planes are enabled. We need to append code the the vtxprog + * planes are enabled. We need to append code to the vtxprog * to handle clip planes later. */ if (vp->ucp.nr) { diff --git a/src/gallium/drivers/r300/r300_reg.h b/src/gallium/drivers/r300/r300_reg.h index a249e8b36b..c67cc86871 100644 --- a/src/gallium/drivers/r300/r300_reg.h +++ b/src/gallium/drivers/r300/r300_reg.h @@ -540,7 +540,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_FIRST_INST(x) ((x) << 0) # define R300_PVS_XYZW_VALID_INST(x) ((x) << 10) # define R300_PVS_LAST_INST(x) ((x) << 20) -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 # define R300_PVS_MAX_CONST_ADDR_SHIFT 16 @@ -1857,7 +1857,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * The destination register index is in FPI1 (color) and FPI3 (alpha) * together with enable bits. * There are separate enable bits for writing into temporary registers - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_* * /DSTA_OUTPUT). You can write to both at once, or not write at all (the * same index must be used for both). * diff --git a/src/gallium/state_trackers/wgl/stw_framebuffer.h b/src/gallium/state_trackers/wgl/stw_framebuffer.h index 08cc4973bc..e61e9bf9c2 100644 --- a/src/gallium/state_trackers/wgl/stw_framebuffer.h +++ b/src/gallium/state_trackers/wgl/stw_framebuffer.h @@ -45,7 +45,7 @@ struct stw_framebuffer /** * This mutex has two purposes: * - protect the access to the mutable data members below - * - prevent the the framebuffer from being deleted while being accessed. + * - prevent the framebuffer from being deleted while being accessed. * * It is OK to lock this mutex while holding the stw_device::fb_mutex lock, * but the opposite must never happen. diff --git a/src/glu/sgi/libnurbs/nurbtess/partitionY.h b/src/glu/sgi/libnurbs/nurbtess/partitionY.h index 8dda409de1..5570c183d7 100644 --- a/src/glu/sgi/libnurbs/nurbtess/partitionY.h +++ b/src/glu/sgi/libnurbs/nurbtess/partitionY.h @@ -39,7 +39,7 @@ *or both at or below v. In addition, at least one of the ajacent verteces is *strictly below or above v. * A vertex is a relex vertex if the internals angle is strictly greater than - *180. In other words, if the the signed area is negative: + *180. In other words, if the signed area is negative: *(x1, y1), (x2, y2), (x3, y3) are the three vertices along a polygon, the *order is such that left hand side is inside the polygon. Then (x2,y2) is *reflex if: diff --git a/src/glu/sgi/libtess/normal.c b/src/glu/sgi/libtess/normal.c index 0a2494be34..7ab83167bb 100644 --- a/src/glu/sgi/libtess/normal.c +++ b/src/glu/sgi/libtess/normal.c @@ -142,7 +142,7 @@ static void CheckOrientation( GLUtesselator *tess ) GLUhalfEdge *e; /* When we compute the normal automatically, we choose the orientation - * so that the the sum of the signed areas of all contours is non-negative. + * so that the sum of the signed areas of all contours is non-negative. */ area = 0; for( f = fHead->next; f != fHead; f = f->next ) { diff --git a/src/mesa/drivers/dri/common/dri_util.c b/src/mesa/drivers/dri/common/dri_util.c index 890ae51339..75c98825b7 100644 --- a/src/mesa/drivers/dri/common/dri_util.c +++ b/src/mesa/drivers/dri/common/dri_util.c @@ -698,7 +698,7 @@ setupLoaderExtensions(__DRIscreen *psp, * \param drm_version Version of the kernel DRM. * \param frame_buffer Data describing the location and layout of the * framebuffer. - * \param pSAREA Pointer the the SAREA. + * \param pSAREA Pointer to the SAREA. * \param fd Device handle for the DRM. * \param extensions ?? * \param driver_modes Returns modes suppoted by the driver diff --git a/src/mesa/drivers/dri/r128/r128_tex.c b/src/mesa/drivers/dri/r128/r128_tex.c index 24fbf8f519..4ec4be9a47 100644 --- a/src/mesa/drivers/dri/r128/r128_tex.c +++ b/src/mesa/drivers/dri/r128/r128_tex.c @@ -468,7 +468,7 @@ static void r128TexEnv( GLcontext *ctx, GLenum target, * certain point. It is better than completely ignoring the LOD * bias. Unfortunately there isn't much range in the bias, the * spec mentions strides that vary between 0.5 and 2.0 but these - * numbers don't seem to relate the the GL LOD bias value at all. + * numbers don't seem to relate to the GL LOD bias value at all. */ if ( param[0] >= 1.0 ) { bias = -128; diff --git a/src/mesa/drivers/dri/r200/r200_reg.h b/src/mesa/drivers/dri/r200/r200_reg.h index 59115212ce..b3a4940a7a 100644 --- a/src/mesa/drivers/dri/r200/r200_reg.h +++ b/src/mesa/drivers/dri/r200/r200_reg.h @@ -690,7 +690,7 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. # define R200_PVS_CNTL_1_PROGRAM_START_SHIFT 0 # define R200_PVS_CNTL_1_POS_END_SHIFT 10 # define R200_PVS_CNTL_1_PROGRAM_END_SHIFT 20 -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R200_VAP_PVS_CNTL_2 0x22d4 # define R200_PVS_CNTL_2_PARAM_OFFSET_SHIFT 0 # define R200_PVS_CNTL_2_PARAM_COUNT_SHIFT 16 diff --git a/src/mesa/drivers/dri/r300/r300_reg.h b/src/mesa/drivers/dri/r300/r300_reg.h index d18ebab8ff..ac93563ed9 100644 --- a/src/mesa/drivers/dri/r300/r300_reg.h +++ b/src/mesa/drivers/dri/r300/r300_reg.h @@ -482,7 +482,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. # define R300_PVS_FIRST_INST_SHIFT 0 # define R300_PVS_XYZW_VALID_INST_SHIFT 10 # define R300_PVS_LAST_INST_SHIFT 20 -/* Addresses are relative the the vertex program parameters area. */ +/* Addresses are relative to the vertex program parameters area. */ #define R300_VAP_PVS_CONST_CNTL 0x22D4 # define R300_PVS_CONST_BASE_OFFSET_SHIFT 0 # define R300_PVS_MAX_CONST_ADDR_SHIFT 16 @@ -1760,7 +1760,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. * The destination register index is in FPI1 (color) and FPI3 (alpha) * together with enable bits. * There are separate enable bits for writing into temporary registers - * (DSTC_REG_* /DSTA_REG) and and program output registers (DSTC_OUTPUT_* + * (DSTC_REG_* /DSTA_REG) and program output registers (DSTC_OUTPUT_* * /DSTA_OUTPUT). You can write to both at once, or not write at all (the * same index must be used for both). * diff --git a/src/mesa/drivers/dri/radeon/radeon_state.c b/src/mesa/drivers/dri/radeon/radeon_state.c index 0ce97e8697..583751d64d 100644 --- a/src/mesa/drivers/dri/radeon/radeon_state.c +++ b/src/mesa/drivers/dri/radeon/radeon_state.c @@ -1900,7 +1900,7 @@ void radeonUploadTexMatrix( r100ContextPtr rmesa, So: if we need the q coord in the end (solely determined by the texture target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row. Additionally, if we don't have texgen but 4 tex coords submitted, we swap - column 3 and 4 (for the 2d / 1d / texrect targets) since the the q coord + column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord will get submitted in the "wrong", i.e. 3rd, slot. If an app submits 3 coords for 2d targets, we assume it is saving on vertex size and using the texture matrix to swap the r and q coords around (ut2k3 diff --git a/src/mesa/drivers/x11/xmesa.h b/src/mesa/drivers/x11/xmesa.h index 98139af833..f63626a970 100644 --- a/src/mesa/drivers/x11/xmesa.h +++ b/src/mesa/drivers/x11/xmesa.h @@ -287,7 +287,7 @@ extern void XMesaCopySubBuffer( XMesaBuffer b, /* - * Return a pointer to the the Pixmap or XImage being used as the back + * Return a pointer to the Pixmap or XImage being used as the back * color buffer of an XMesaBuffer. This function is a way to get "under * the hood" of X/Mesa so one can manipulate the back buffer directly. * Input: b - the XMesaBuffer diff --git a/src/mesa/drivers/x11/xmesaP.h b/src/mesa/drivers/x11/xmesaP.h index 3ffd7661e3..e0a6908228 100644 --- a/src/mesa/drivers/x11/xmesaP.h +++ b/src/mesa/drivers/x11/xmesaP.h @@ -431,7 +431,7 @@ extern const int xmesa_kernel8[DITH_DY * DITH_DX]; * If pixelformat==PF_HPCR: * * HP Color Recovery dithering (ad@lms.be 30/08/95) - * HP has on it's 8-bit 700-series computers, a feature called + * HP has on its 8-bit 700-series computers, a feature called * 'Color Recovery'. This allows near 24-bit output (so they say). * It is enabled by selecting the 8-bit TrueColor visual AND * corresponding colormap (see tkInitWindow) AND doing some special diff --git a/src/mesa/main/dd.h b/src/mesa/main/dd.h index 197de09b22..7c02faaa53 100644 --- a/src/mesa/main/dd.h +++ b/src/mesa/main/dd.h @@ -1072,7 +1072,7 @@ struct dd_function_table { * These are the initial values to be installed into dispatch by * mesa. If the T&L driver wants to modify the dispatch table * while installed, it must do so itself. It would be possible for - * the vertexformat to install it's own initial values for these + * the vertexformat to install its own initial values for these * functions, but this way there is an obvious list of what is * expected of the driver. * diff --git a/src/mesa/main/texcompress_fxt1.c b/src/mesa/main/texcompress_fxt1.c index 149853f7ac..04acf05e52 100644 --- a/src/mesa/main/texcompress_fxt1.c +++ b/src/mesa/main/texcompress_fxt1.c @@ -476,7 +476,7 @@ fxt1_lloyd (GLfloat vec[][MAX_COMP], GLint nv, * for each sample color * sort to nearest vector. * - * replace each vector with the centroid of it's matching colors. + * replace each vector with the centroid of its matching colors. * * repeat until RMS doesn't improve. * diff --git a/src/mesa/math/m_debug_util.h b/src/mesa/math/m_debug_util.h index 2e67db8e55..ed11c849ec 100644 --- a/src/mesa/math/m_debug_util.h +++ b/src/mesa/math/m_debug_util.h @@ -61,7 +61,7 @@ extern long counter_overhead; */ extern char *mesa_profile; -/* Modify the the number of tests if you like. +/* Modify the number of tests if you like. * We take the minimum of all results, because every error should be * positive (time used by other processes, task switches etc). * It is assumed that all calculations are done in the cache. diff --git a/src/mesa/math/m_matrix.c b/src/mesa/math/m_matrix.c index ef8a40fbec..4b33d0bbb3 100644 --- a/src/mesa/math/m_matrix.c +++ b/src/mesa/math/m_matrix.c @@ -889,7 +889,7 @@ _math_matrix_rotate( GLmatrix *mat, * Y-axis to bring the axis vector parallel with the X-axis. The * rotation about the X-axis is then performed. Ry and Rz are * simply the respective inverse transforms to bring the arbitrary - * axis back to it's original orientation. The first transforms + * axis back to its original orientation. The first transforms * Rz' and Ry' are considered inverses, since the data from the * arbitrary axis gives you info on how to get to it, not how * to get away from it, and an inverse must be applied. diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index 224350caac..28c797a4ba 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -97,8 +97,8 @@ #define COND_EQ 2 /**< equal to zero */ #define COND_LT 3 /**< less than zero */ #define COND_UN 4 /**< unordered (NaN) */ -#define COND_GE 5 /**< greater then or equal to zero */ -#define COND_LE 6 /**< less then or equal to zero */ +#define COND_GE 5 /**< greater than or equal to zero */ +#define COND_LE 6 /**< less than or equal to zero */ #define COND_NE 7 /**< not equal to zero */ #define COND_TR 8 /**< always true */ #define COND_FL 9 /**< always false */ diff --git a/src/mesa/shader/program_parser.h b/src/mesa/shader/program_parser.h index 730466c30f..be952d4b9c 100644 --- a/src/mesa/shader/program_parser.h +++ b/src/mesa/shader/program_parser.h @@ -62,7 +62,7 @@ struct asm_symbol { */ unsigned param_binding_swizzle; - /* This is how many entries in the the program_parameter_list we take up + /* This is how many entries in the program_parameter_list we take up * with our state tokens or constants. Note that this is _not_ the same as * the number of param registers we eventually use. */ diff --git a/src/mesa/shader/slang/library/slang_common_builtin.gc b/src/mesa/shader/slang/library/slang_common_builtin.gc index 8b7771c284..a25ca55bc4 100644 --- a/src/mesa/shader/slang/library/slang_common_builtin.gc +++ b/src/mesa/shader/slang/library/slang_common_builtin.gc @@ -695,7 +695,7 @@ vec3 normalize(const vec3 v) { // const float s = inversesqrt(dot(v, v)); // __retVal = v * s; -// XXX note, we _could_ use __retVal.w instead of tmp and and save a +// XXX note, we _could_ use __retVal.w instead of tmp and save a // register, but that's actually a compilation error because v is a vec3 // and the .w suffix is illegal. Oh well. float tmp; diff --git a/src/mesa/swrast/s_depth.c b/src/mesa/swrast/s_depth.c index 3e36cf9a7e..ed637cac12 100644 --- a/src/mesa/swrast/s_depth.c +++ b/src/mesa/swrast/s_depth.c @@ -526,7 +526,7 @@ _swrast_depth_clamp_span( GLcontext *ctx, SWspan *span ) /* Convert floating point values in [0,1] to device Z coordinates in * [0, DepthMax]. - * ex: If the the Z buffer has 24 bits, DepthMax = 0xffffff. + * ex: If the Z buffer has 24 bits, DepthMax = 0xffffff. * * XXX this all falls apart if we have 31 or more bits of Z because * the triangle rasterization code produces unsigned Z values. Negative diff --git a/src/mesa/vbo/vbo_save_loopback.c b/src/mesa/vbo/vbo_save_loopback.c index f253c854d2..3f581ea02d 100644 --- a/src/mesa/vbo/vbo_save_loopback.c +++ b/src/mesa/vbo/vbo_save_loopback.c @@ -78,7 +78,7 @@ struct loopback_attr { }; /* Don't emit ends and begins on wrapped primitives. Don't replay - * wrapped vertices. If we get here, it's probably because the the + * wrapped vertices. If we get here, it's probably because the * precalculated wrapping is wrong. */ static void loopback_prim( GLcontext *ctx, |