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-rw-r--r--src/glx/dri2_glx.c2
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/glx/dri2_glx.c b/src/glx/dri2_glx.c
index 1faaf08f36..9347611e7d 100644
--- a/src/glx/dri2_glx.c
+++ b/src/glx/dri2_glx.c
@@ -225,12 +225,14 @@ dri2CreateDrawable(__GLXscreenConfigs * psc,
return NULL;
}
+#ifdef X_DRI2SwapInterval
/*
* Make sure server has the same swap interval we do for the new
* drawable.
*/
if (pdp->swapAvailable)
DRI2SwapInterval(psc->dpy, xDrawable, pdraw->swap_interval);
+#endif
return &pdraw->base;
}
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index f8dc814ff0..4f59511a52 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -1137,6 +1137,7 @@ radeonCreateScreen( __DRIscreen *sPriv )
/* pipe overrides */
switch (dri_priv->deviceID) {
case PCI_CHIP_R300_AD: /* 9500 with 1 quadpipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
+ case PCI_CHIP_R350_AH: /* 9800 SE only have 1 quadpipe */
case PCI_CHIP_RV410_5E4C: /* RV410 SE only have 1 quadpipe */
case PCI_CHIP_RV410_5E4F: /* RV410 SE only have 1 quadpipe */
screen->num_gb_pipes = 1;
@@ -1346,6 +1347,7 @@ radeonCreateScreen2(__DRIscreen *sPriv)
/* pipe overrides */
switch (device_id) {
case PCI_CHIP_R300_AD: /* 9500 with 1 quadpipe verified by: Reid Linnemann <lreid@cs.okstate.edu> */
+ case PCI_CHIP_R350_AH: /* 9800 SE only have 1 quadpipe */
case PCI_CHIP_RV410_5E4C: /* RV410 SE only have 1 quadpipe */
case PCI_CHIP_RV410_5E4F: /* RV410 SE only have 1 quadpipe */
screen->num_gb_pipes = 1;