diff options
Diffstat (limited to 'src')
36 files changed, 380 insertions, 198 deletions
diff --git a/src/mesa/drivers/dri/intel_winsys/intel_screen.c b/src/mesa/drivers/dri/intel_winsys/intel_screen.c index bce6c5699a..9e31c013a9 100644 --- a/src/mesa/drivers/dri/intel_winsys/intel_screen.c +++ b/src/mesa/drivers/dri/intel_winsys/intel_screen.c @@ -297,10 +297,12 @@ intelCreateBuffer(__DRIscreenPrivate * driScrnPriv, else stencilFormat = PIPE_FORMAT_NONE; - intelfb->stfb = st_create_framebuffer(visual, GL_TRUE, + intelfb->stfb = st_create_framebuffer(visual, colorFormat, depthFormat, stencilFormat, + driDrawPriv->w, + driDrawPriv->h, (void*) intelfb); if (!intelfb->stfb) { free(intelfb); diff --git a/src/mesa/pipe/i965simple/brw_batch.h b/src/mesa/pipe/i965simple/brw_batch.h index bef69ac871..8605d7c108 100644 --- a/src/mesa/pipe/i965simple/brw_batch.h +++ b/src/mesa/pipe/i965simple/brw_batch.h @@ -53,4 +53,6 @@ brw->hardware_dirty = ~0; \ } while (0) +#define BRW_BATCH_STRUCT(brw, s) brw_batchbuffer_data( brw->winsys, (s), sizeof(*(s))) + #endif diff --git a/src/mesa/pipe/i965simple/brw_clip.c b/src/mesa/pipe/i965simple/brw_clip.c index fc86e0a446..268124cc53 100644 --- a/src/mesa/pipe/i965simple/brw_clip.c +++ b/src/mesa/pipe/i965simple/brw_clip.c @@ -154,6 +154,8 @@ static void upload_clip_prog(struct brw_context *brw) key.do_flat_shading = (brw->attribs.Raster->flatshade); /* BRW_NEW_CLIP */ key.nr_userclip = brw->attribs.Clip.nr; /* XXX */ + +#if 0 key.clip_mode = BRW_CLIPMODE_NORMAL; if (key.primitive == PIPE_PRIM_TRIANGLES) { @@ -185,6 +187,9 @@ static void upload_clip_prog(struct brw_context *brw) } } } +#else + key.clip_mode = BRW_CLIPMODE_ACCEPT_ALL; +#endif if (!search_cache(brw, &key)) compile_clip_prog( brw, &key ); diff --git a/src/mesa/pipe/i965simple/brw_context.h b/src/mesa/pipe/i965simple/brw_context.h index fc2cb055e9..139f13ad4e 100644 --- a/src/mesa/pipe/i965simple/brw_context.h +++ b/src/mesa/pipe/i965simple/brw_context.h @@ -327,6 +327,9 @@ struct brw_vs_prog_data { unsigned max_const; + float imm_buf[PIPE_MAX_CONSTANT][4]; + unsigned num_imm; + /* Used for calculating urb partitions: */ unsigned urb_entry_size; @@ -666,8 +669,6 @@ void brwUpdateTextureState( struct brw_context *brw ); void brw_upload_urb_fence(struct brw_context *brw); void brw_upload_constant_buffer_state(struct brw_context *brw); -void brw_upload_polygon_stipple(struct brw_context *brw); -void brw_upload_line_stipple(struct brw_context *brw); void brw_init_surface_functions(struct brw_context *brw); void brw_init_state_functions(struct brw_context *brw); diff --git a/src/mesa/pipe/i965simple/brw_curbe.c b/src/mesa/pipe/i965simple/brw_curbe.c index 66a04b9c38..603116c863 100644 --- a/src/mesa/pipe/i965simple/brw_curbe.c +++ b/src/mesa/pipe/i965simple/brw_curbe.c @@ -34,9 +34,11 @@ #include "brw_context.h" #include "brw_defines.h" #include "brw_state.h" +#include "brw_batch.h" #include "brw_util.h" #include "brw_wm.h" #include "pipe/p_state.h" +#include "pipe/p_winsys.h" #include "pipe/p_util.h" #define FILE_DEBUG_FLAG DEBUG_FALLBACKS @@ -174,7 +176,7 @@ static void upload_constant_buffer(struct brw_context *brw) { struct brw_mem_pool *pool = &brw->pool[BRW_GS_POOL]; unsigned sz = brw->curbe.total_size; - unsigned bufsz = sz * 16 * sizeof(float); + unsigned bufsz = sz * sizeof(float); float *buf; unsigned i; @@ -246,17 +248,31 @@ static void upload_constant_buffer(struct brw_context *brw) if (brw->curbe.vs_size) { -// unsigned offset = brw->curbe.vs_start * 16; -// unsigned nr = vp->max_const; - - /* map the vertex constant buffer and copy to curbe: */ - -// assert(nr == 0); - assert(0); + unsigned offset = brw->curbe.vs_start * 16; + /*unsigned nr = vp->max_const;*/ + const struct pipe_constant_buffer *cbuffer = brw->attribs.Constants[0]; + struct pipe_winsys *ws = brw->pipe.winsys; + if (cbuffer->size) { + /* map the vertex constant buffer and copy to curbe: */ + ws->buffer_map(ws, cbuffer->buffer, 0); + ws->buffer_get_subdata(ws, cbuffer->buffer, + 0, + cbuffer->size, + &buf[offset]); + ws->buffer_unmap(ws, cbuffer->buffer); + offset += cbuffer->size; + } + /*immediates*/ +#if 0 + if (brw->vs.prog_data->num_imm) { + memcpy(&buf[offset], brw->vs.prog_data->imm_buf, + brw->vs.prog_data->num_imm * 4 * sizeof(float)); + } +#endif } - if (0) { - for (i = 0; i < sz*16; i+=4) + if (1) { + for (i = 0; i < sz; i+=4) _mesa_printf("curbe %d.%d: %f %f %f %f\n", i/8, i&4, buf[i+0], buf[i+1], buf[i+2], buf[i+3]); diff --git a/src/mesa/pipe/i965simple/brw_flush.c b/src/mesa/pipe/i965simple/brw_flush.c index 1f11c5f164..5216c680cf 100644 --- a/src/mesa/pipe/i965simple/brw_flush.c +++ b/src/mesa/pipe/i965simple/brw_flush.c @@ -49,22 +49,18 @@ static void brw_flush( struct pipe_context *pipe, * caches? */ if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) { - unsigned flush = CMD_MI_FLUSH; - -#if 0 + struct brw_mi_flush flush; + + memset(&flush, 0, sizeof(flush)); + flush.opcode = CMD_MI_FLUSH; + if (!(flags & PIPE_FLUSH_RENDER_CACHE)) - flush |= INHIBIT_FLUSH_RENDER_CACHE; + flush.flags |= BRW_INHIBIT_FLUSH_RENDER_CACHE; if (flags & PIPE_FLUSH_TEXTURE_CACHE) - flush |= FLUSH_MAP_CACHE; -#endif + flush.flags |= BRW_FLUSH_READ_CACHE; - if (!BEGIN_BATCH(1, 0)) { - FLUSH_BATCH( &fence ); - assert(BEGIN_BATCH(1, 0)); - } - OUT_BATCH( flush ); - ADVANCE_BATCH(); + BRW_BATCH_STRUCT(brw, &flush); } /* If there are no flags, just flush pending commands to hardware: diff --git a/src/mesa/pipe/i965simple/brw_misc_state.c b/src/mesa/pipe/i965simple/brw_misc_state.c index e600e9d8de..13b3b1671d 100644 --- a/src/mesa/pipe/i965simple/brw_misc_state.c +++ b/src/mesa/pipe/i965simple/brw_misc_state.c @@ -42,7 +42,7 @@ * Blend color */ -void brw_upload_blend_constant_color(struct brw_context *brw) +static void upload_blend_constant_color(struct brw_context *brw) { struct brw_blend_constant_color bcc; @@ -58,6 +58,46 @@ void brw_upload_blend_constant_color(struct brw_context *brw) } +const struct brw_tracked_state brw_blend_constant_color = { + .dirty = { + .brw = BRW_NEW_BLEND, + .cache = 0 + }, + .update = upload_blend_constant_color +}; + + +/*********************************************************************** + * Drawing rectangle + */ +static void upload_drawing_rect(struct brw_context *brw) +{ + struct brw_drawrect bdr; + + memset(&bdr, 0, sizeof(bdr)); + bdr.header.opcode = CMD_DRAW_RECT; + bdr.header.length = sizeof(bdr)/4 - 2; + bdr.xmin = 0; + bdr.ymin = 0; + bdr.xmax = brw->attribs.FrameBuffer.cbufs[0]->width; + bdr.ymax = brw->attribs.FrameBuffer.cbufs[0]->height; + bdr.xorg = 0; + bdr.yorg = 0; + + /* Can't use BRW_CACHED_BATCH_STRUCT because this is also emitted + * uncached in brw_draw.c: + */ + BRW_BATCH_STRUCT(brw, &bdr); +} + +const struct brw_tracked_state brw_drawing_rect = { + .dirty = { + .brw = BRW_NEW_SCENE, + .cache = 0 + }, + .update = upload_drawing_rect +}; + /** * Upload the binding table pointers, which point each stage's array of surface * state pointers. @@ -117,7 +157,7 @@ static void upload_pipelined_state_pointers(struct brw_context *brw ) psp.gs.enable = 1; } - { + if (0) { psp.clp.offset = brw->clip.state_gs_offset >> 5; psp.clp.enable = 1; } @@ -216,7 +256,7 @@ static void upload_depthbuffer(struct brw_context *brw) const struct brw_tracked_state brw_depthbuffer = { .dirty = { - .brw = 0, + .brw = BRW_NEW_SCENE, .cache = 0 }, .update = upload_depthbuffer, @@ -224,50 +264,43 @@ const struct brw_tracked_state brw_depthbuffer = { -/*********************************************************************** - * Polygon stipple offset packet - */ - -static void upload_polygon_stipple_offset(struct brw_context *brw) -{ - struct brw_polygon_stipple_offset bpso; - - memset(&bpso, 0, sizeof(bpso)); - bpso.header.opcode = CMD_POLY_STIPPLE_OFFSET; - bpso.header.length = sizeof(bpso)/4-2; - - bpso.bits0.x_offset = 0; - bpso.bits0.y_offset = 0; - - BRW_CACHED_BATCH_STRUCT(brw, &bpso); -} /*********************************************************************** * Polygon stipple packet */ -void brw_upload_polygon_stipple(struct brw_context *brw) +static void upload_polygon_stipple(struct brw_context *brw) { struct brw_polygon_stipple bps; unsigned i; - /*update the offset at the same time it will always be 0*/ - upload_polygon_stipple_offset(brw); memset(&bps, 0, sizeof(bps)); bps.header.opcode = CMD_POLY_STIPPLE_PATTERN; bps.header.length = sizeof(bps)/4-2; - for (i = 0; i < 32; i++) - bps.stipple[i] = brw->attribs.PolygonStipple->stipple[31 - i]; /* invert */ + /* XXX: state tracker should send *all* state down initially! + */ + if (brw->attribs.PolygonStipple) + for (i = 0; i < 32; i++) + bps.stipple[i] = brw->attribs.PolygonStipple->stipple[31 - i]; /* invert */ BRW_CACHED_BATCH_STRUCT(brw, &bps); } +const struct brw_tracked_state brw_polygon_stipple = { + .dirty = { + .brw = BRW_NEW_STIPPLE, + .cache = 0 + }, + .update = upload_polygon_stipple +}; + + /*********************************************************************** * Line stipple packet */ -void brw_upload_line_stipple(struct brw_context *brw) +static void upload_line_stipple(struct brw_context *brw) { struct brw_line_stipple bls; float tmp; @@ -289,6 +322,14 @@ void brw_upload_line_stipple(struct brw_context *brw) BRW_CACHED_BATCH_STRUCT(brw, &bls); } +const struct brw_tracked_state brw_line_stipple = { + .dirty = { + .brw = BRW_NEW_STIPPLE, + .cache = 0 + }, + .update = upload_line_stipple +}; + /*********************************************************************** * Misc constant state packets @@ -329,6 +370,15 @@ const struct brw_tracked_state brw_pipe_control = { static void upload_invarient_state( struct brw_context *brw ) { { + struct brw_mi_flush flush; + + memset(&flush, 0, sizeof(flush)); + flush.opcode = CMD_MI_FLUSH; + flush.flags = BRW_FLUSH_STATE_CACHE | BRW_FLUSH_READ_CACHE; + BRW_BATCH_STRUCT(brw, &flush); + } + + { /* 0x61040000 Pipeline Select */ /* PipelineSelect : 0 */ struct brw_pipeline_select ps; @@ -376,6 +426,19 @@ static void upload_invarient_state( struct brw_context *brw ) BRW_BATCH_STRUCT(brw, &vfs); } + + + { + struct brw_polygon_stipple_offset bpso; + + memset(&bpso, 0, sizeof(bpso)); + bpso.header.opcode = CMD_POLY_STIPPLE_OFFSET; + bpso.header.length = sizeof(bpso)/4-2; + bpso.bits0.x_offset = 0; + bpso.bits0.y_offset = 0; + + BRW_BATCH_STRUCT(brw, &bpso); + } } const struct brw_tracked_state brw_invarient_state = { diff --git a/src/mesa/pipe/i965simple/brw_sf.c b/src/mesa/pipe/i965simple/brw_sf.c index e7c02beda5..7b6fd3fff6 100644 --- a/src/mesa/pipe/i965simple/brw_sf.c +++ b/src/mesa/pipe/i965simple/brw_sf.c @@ -128,6 +128,10 @@ static void upload_sf_prog( struct brw_context *brw ) /* CACHE_NEW_VS_PROG */ key.vp_output_count = brw->vs.prog_data->outputs_written; + /* BRW_NEW_FS */ + key.fp_input_count = brw->attribs.FragmentProgram->info.nr_regs[TGSI_FILE_INPUT]; + + /* BRW_NEW_REDUCED_PRIMITIVE */ switch (brw->reduced_primitive) { case PIPE_PRIM_TRIANGLES: diff --git a/src/mesa/pipe/i965simple/brw_sf_emit.c b/src/mesa/pipe/i965simple/brw_sf_emit.c index 834b5efdfe..0fa61f14b6 100644 --- a/src/mesa/pipe/i965simple/brw_sf_emit.c +++ b/src/mesa/pipe/i965simple/brw_sf_emit.c @@ -148,7 +148,7 @@ static boolean calculate_masks( struct brw_sf_compile *c, /* Maybe only processs one attribute on the final round: */ - if (reg*2+1 < c->nr_setup_attrs) { + if (1 || reg*2+1 < c->nr_setup_attrs) { *pc |= 0xf0; // if (persp_mask & (1 << c->idx_to_attr[reg*2+1])) diff --git a/src/mesa/pipe/i965simple/brw_sf_state.c b/src/mesa/pipe/i965simple/brw_sf_state.c index 0de6e7240e..9acd3ea61b 100644 --- a/src/mesa/pipe/i965simple/brw_sf_state.c +++ b/src/mesa/pipe/i965simple/brw_sf_state.c @@ -58,9 +58,9 @@ static void upload_sf_vp(struct brw_context *brw) /* _NEW_SCISSOR */ sfv.scissor.xmin = brw->attribs.Scissor.minx; - sfv.scissor.xmax = brw->attribs.Scissor.maxx; + sfv.scissor.xmax = brw->attribs.Scissor.maxx - 1; sfv.scissor.ymin = brw->attribs.Scissor.miny; - sfv.scissor.ymax = brw->attribs.Scissor.maxy; + sfv.scissor.ymax = brw->attribs.Scissor.maxy - 1; brw->sf.vp_gs_offset = brw_cache_data( &brw->cache[BRW_SF_VP], &sfv ); } @@ -133,7 +133,7 @@ static void upload_sf_unit( struct brw_context *brw ) else sf.sf6.cull_mode = BRW_CULLMODE_NONE; #else - sf.sf5.front_winding = BRW_FRONTWINDING_CW; + sf.sf5.front_winding = BRW_FRONTWINDING_CCW; sf.sf6.cull_mode = BRW_CULLMODE_NONE; #endif @@ -149,7 +149,7 @@ static void upload_sf_unit( struct brw_context *brw ) sf.sf7.sprite_point = brw->attribs.Raster->point_sprite; sf.sf7.point_size = CLAMP(brw->attribs.Raster->line_width, 1.0, 255.0) * (1<<3); - sf.sf7.use_point_size_state = brw->attribs.Raster->point_size_per_vertex; + sf.sf7.use_point_size_state = !brw->attribs.Raster->point_size_per_vertex; /* might be BRW_NEW_PRIMITIVE if we have to adjust pv for polygons: */ diff --git a/src/mesa/pipe/i965simple/brw_state.h b/src/mesa/pipe/i965simple/brw_state.h index d09711f6f0..8b4d7aabf0 100644 --- a/src/mesa/pipe/i965simple/brw_state.h +++ b/src/mesa/pipe/i965simple/brw_state.h @@ -65,7 +65,6 @@ const struct brw_tracked_state brw_urb_fence; const struct brw_tracked_state brw_vertex_state; const struct brw_tracked_state brw_vs_prog; const struct brw_tracked_state brw_vs_unit; -const struct brw_tracked_state brw_wm_input_sizes; const struct brw_tracked_state brw_wm_prog; const struct brw_tracked_state brw_wm_samplers; const struct brw_tracked_state brw_wm_surfaces; @@ -116,7 +115,6 @@ static inline struct pipe_buffer_handle *brw_cache_buffer(struct brw_context *br /*********************************************************************** * brw_state_batch.c */ -#define BRW_BATCH_STRUCT(brw, s) brw_batchbuffer_data( brw->winsys, (s), sizeof(*(s))) #define BRW_CACHED_BATCH_STRUCT(brw, s) brw_cached_batch_struct( brw, (s), sizeof(*(s)) ) boolean brw_cached_batch_struct( struct brw_context *brw, @@ -149,10 +147,6 @@ void brw_clear_all_caches( struct brw_context *brw ); void brw_invalidate_pools( struct brw_context *brw ); void brw_clear_batch_cache_flush( struct brw_context *brw ); -void brw_upload_cc_unit(struct brw_context *brw); -void brw_upload_clip_prog(struct brw_context *brw); -void brw_upload_blend_constant_color(struct brw_context *brw); -void brw_upload_wm_samplers(struct brw_context *brw); /* brw_shader_info.c */ diff --git a/src/mesa/pipe/i965simple/brw_state_upload.c b/src/mesa/pipe/i965simple/brw_state_upload.c index 2502e54929..e727601e1e 100644 --- a/src/mesa/pipe/i965simple/brw_state_upload.c +++ b/src/mesa/pipe/i965simple/brw_state_upload.c @@ -43,7 +43,6 @@ */ const struct brw_tracked_state *atoms[] = { - &brw_wm_input_sizes, &brw_vs_prog, &brw_gs_prog, &brw_clip_prog, @@ -84,8 +83,6 @@ const struct brw_tracked_state *atoms[] = &brw_depthbuffer, &brw_polygon_stipple, - &brw_polygon_stipple_offset, - &brw_line_stipple, &brw_psp_urb_cbs, @@ -192,6 +189,10 @@ void brw_validate_state( struct brw_context *brw ) for (i = 0; i < Elements(atoms); i++) { const struct brw_tracked_state *atom = atoms[i]; + assert(atom->dirty.brw || + atom->dirty.cache); + assert(atom->update); + if (check_state(state, &atom->dirty)) atom->update( brw ); } diff --git a/src/mesa/pipe/i965simple/brw_urb.c b/src/mesa/pipe/i965simple/brw_urb.c index 8cc86e26a3..b284526aa6 100644 --- a/src/mesa/pipe/i965simple/brw_urb.c +++ b/src/mesa/pipe/i965simple/brw_urb.c @@ -31,7 +31,8 @@ #include "brw_context.h" -#include "brw_state.h" +//#include "brw_state.h" +#include "brw_batch.h" #include "brw_defines.h" #define VS 0 diff --git a/src/mesa/pipe/i965simple/brw_vs_emit.c b/src/mesa/pipe/i965simple/brw_vs_emit.c index f4d61eade0..f3507f60f7 100644 --- a/src/mesa/pipe/i965simple/brw_vs_emit.c +++ b/src/mesa/pipe/i965simple/brw_vs_emit.c @@ -38,6 +38,7 @@ struct brw_prog_info { unsigned num_temps; unsigned num_addrs; + unsigned num_consts; unsigned writes_psize; @@ -74,25 +75,21 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c, /* Vertex program parameters from curbe: */ - nr_params = c->vp->program.num_inputs; /*FIXME: i think this is wrong... */ + nr_params = c->prog_data.max_const; for (i = 0; i < nr_params; i++) { - c->regs[TGSI_FILE_INPUT][i] = stride( brw_vec4_grf(reg+i/2, (i%2) * 4), 0, 4, 1); + c->regs[TGSI_FILE_CONSTANT][i] = stride(brw_vec4_grf(reg+i/2, (i%2) * 4), 0, 4, 1); } reg += (nr_params+1)/2; - c->prog_data.curb_read_length = reg - 1; /* Allocate input regs: */ - c->nr_inputs = 0; - for (i = 0; i < PIPE_ATTRIB_MAX; i++) { - if (c->prog_data.inputs_read & (1<<i)) { - c->nr_inputs++; + c->nr_inputs = c->vp->program.num_inputs; + for (i = 0; i < c->nr_inputs; i++) { c->regs[TGSI_FILE_INPUT][i] = brw_vec8_grf(reg, 0); reg++; - } } @@ -119,9 +116,14 @@ static void brw_vs_alloc_regs( struct brw_vs_compile *c, mrf++; } #else - /* for now stuff everything in grf */ - c->regs[TGSI_FILE_OUTPUT][i] = brw_vec8_grf(reg, 0); - reg++; + /*treat pos differently for now */ + if (i == info->pos_idx) { + c->regs[TGSI_FILE_OUTPUT][i] = brw_vec8_grf(reg, 0); + reg++; + } else { + c->regs[TGSI_FILE_OUTPUT][i] = brw_message_reg(mrf); + mrf++; + } #endif } @@ -625,9 +627,12 @@ static struct brw_reg get_reg( struct brw_vs_compile *c, case TGSI_FILE_TEMPORARY: case TGSI_FILE_INPUT: case TGSI_FILE_OUTPUT: - case TGSI_FILE_CONSTANT: assert(c->regs[file][index].nr != 0); return c->regs[file][index]; + case TGSI_FILE_CONSTANT: + case TGSI_FILE_IMMEDIATE: + assert(c->regs[TGSI_FILE_CONSTANT][index].nr != 0); + return c->regs[TGSI_FILE_CONSTANT][index]; case TGSI_FILE_ADDRESS: assert(index == 0); return c->regs[file][index]; @@ -983,6 +988,13 @@ static void process_declaration(const struct tgsi_full_declaration *decl, { switch(decl->Declaration.File) { case TGSI_FILE_CONSTANT: { + if (decl->Declaration.Declare == TGSI_DECLARE_MASK) { + printf("DECLARATION MASK = %d\n", + decl->u.DeclarationMask.Mask); + assert(0); + } else { /*range*/ + info->num_consts += decl->u.DeclarationRange.Last - decl->u.DeclarationRange.First + 1; + } } break; case TGSI_FILE_INPUT: { @@ -1061,7 +1073,7 @@ static void process_instruction(struct brw_vs_compile *c, struct tgsi_full_src_register *src = &inst->FullSrcRegisters[i]; index = src->SrcRegister.Index; file = src->SrcRegister.File; - if (file == TGSI_FILE_OUTPUT&&c->output_regs[index].used_in_src) + if (file == TGSI_FILE_OUTPUT && c->output_regs[index].used_in_src) args[i] = c->output_regs[index].reg; else args[i] = get_arg(c, &src->SrcRegister); @@ -1289,6 +1301,14 @@ void brw_vs_emit(struct brw_vs_compile *c) } break; case TGSI_TOKEN_TYPE_IMMEDIATE: { + int i; + struct tgsi_full_immediate *imm = &parse.FullToken.FullImmediate; + /*assert(imm->Immediate.Size == 4);*/ + c->prog_data.imm_buf[c->prog_data.num_imm][0] = imm->u.ImmediateFloat32[0].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][1] = imm->u.ImmediateFloat32[1].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][2] = imm->u.ImmediateFloat32[2].Float; + c->prog_data.imm_buf[c->prog_data.num_imm][3] = imm->u.ImmediateFloat32[3].Float; + c->prog_data.num_imm++; } break; case TGSI_TOKEN_TYPE_INSTRUCTION: { @@ -1297,12 +1317,12 @@ void brw_vs_emit(struct brw_vs_compile *c) /* first instruction (declerations finished). * now that we know what vars are being used allocate * registers for them.*/ + c->prog_data.max_const = prog_info.num_consts + c->prog_data.num_imm; brw_vs_alloc_regs(c, &prog_info); brw_set_access_mode(p, BRW_ALIGN_1); brw_MOV(p, get_addr_reg(stack_index), brw_address(c->stack)); brw_set_access_mode(p, BRW_ALIGN_16); - allocated_registers = 1; } process_instruction(c, inst, &prog_info); @@ -1315,4 +1335,5 @@ void brw_vs_emit(struct brw_vs_compile *c) emit_vertex_write(c, &prog_info); post_vs_emit(c, end_inst); tgsi_parse_free(&parse); + } diff --git a/src/mesa/pipe/i965simple/brw_wm_decl.c b/src/mesa/pipe/i965simple/brw_wm_decl.c index 392f17fad6..5b1abb9d48 100644 --- a/src/mesa/pipe/i965simple/brw_wm_decl.c +++ b/src/mesa/pipe/i965simple/brw_wm_decl.c @@ -9,7 +9,7 @@ static struct brw_reg alloc_tmp(struct brw_wm_compile *c) { c->tmp_index++; - c->reg_index = MAX2(c->reg_index, c->tmp_index); + c->reg_index = MAX2(c->reg_index, c->tmp_start + c->tmp_index); return brw_vec8_grf(c->tmp_start + c->tmp_index, 0); } diff --git a/src/mesa/pipe/i965simple/brw_wm_glsl.c b/src/mesa/pipe/i965simple/brw_wm_glsl.c index 37d5b216b2..f4b5c13c06 100644 --- a/src/mesa/pipe/i965simple/brw_wm_glsl.c +++ b/src/mesa/pipe/i965simple/brw_wm_glsl.c @@ -935,6 +935,7 @@ static void brw_wm_emit_instruction( struct brw_wm_compile *c, break; case TGSI_OPCODE_RET: +#if 0 brw_push_insn_state(p); brw_set_mask_control(p, BRW_MASK_DISABLE); brw_ADD(p, @@ -944,6 +945,9 @@ static void brw_wm_emit_instruction( struct brw_wm_compile *c, brw_MOV(p, brw_ip_reg(), deref_1ud(c->stack_index, 0)); brw_set_access_mode(p, BRW_ALIGN_16); brw_pop_insn_state(p); +#else + emit_fb_write(c, inst); +#endif break; case TGSI_OPCODE_LOOP: diff --git a/src/mesa/pipe/i965simple/brw_wm_sampler_state.c b/src/mesa/pipe/i965simple/brw_wm_sampler_state.c index fbeea8c809..cfb430eb09 100644 --- a/src/mesa/pipe/i965simple/brw_wm_sampler_state.c +++ b/src/mesa/pipe/i965simple/brw_wm_sampler_state.c @@ -236,7 +236,8 @@ static void upload_wm_samplers(struct brw_context *brw) /* BRW_NEW_SAMPLER */ for (unit = 0; unit < BRW_MAX_TEX_UNIT; unit++) { - if (brw->attribs.Samplers[unit]) { /* FIXME: correctly detect enabled ones */ + /* determine unit enable/disable by looking for a bound texture */ + if (brw->attribs.Texture[unit]) { const struct pipe_sampler_state *sampler = brw->attribs.Samplers[unit]; unsigned sdc_gs_offset = upload_default_color(brw, sampler->border_color); diff --git a/src/mesa/pipe/i965simple/brw_wm_surface_state.c b/src/mesa/pipe/i965simple/brw_wm_surface_state.c index db8f670970..5c7dee5790 100644 --- a/src/mesa/pipe/i965simple/brw_wm_surface_state.c +++ b/src/mesa/pipe/i965simple/brw_wm_surface_state.c @@ -155,13 +155,13 @@ void brw_update_texture_surface( struct brw_context *brw, surf.ss1.base_addr = brw_buffer_offset( brw, tObj->buffer ); surf.ss2.mip_count = tObj->base.last_level - tObj->base.first_level; - surf.ss2.width = tObj->base.width[0]; - surf.ss2.height = tObj->base.height[0]; + surf.ss2.width = tObj->base.width[0] - 1; + surf.ss2.height = tObj->base.height[0] - 1; surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR; surf.ss3.tiled_surface = 0; /* always zero */ - surf.ss3.pitch = tObj->pitch; - surf.ss3.depth = tObj->base.depth[0]; + surf.ss3.pitch = tObj->pitch - 1; + surf.ss3.depth = tObj->base.depth[0] - 1; surf.ss4.min_lod = 0; @@ -192,25 +192,25 @@ static void upload_wm_surfaces(struct brw_context *brw ) /* BRW_NEW_FRAMEBUFFER */ - struct pipe_surface *region = brw->attribs.FrameBuffer.cbufs[0];/*fixme*/ + struct pipe_surface *pipe_surface = brw->attribs.FrameBuffer.cbufs[0];/*fixme*/ memset(&surf, 0, sizeof(surf)); - if (region != NULL) { - if (region->cpp == 4) + if (pipe_surface != NULL) { + if (pipe_surface->cpp == 4) surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; else surf.ss0.surface_format = BRW_SURFACEFORMAT_B5G6R5_UNORM; surf.ss0.surface_type = BRW_SURFACE_2D; - surf.ss1.base_addr = brw_buffer_offset( brw, region->buffer ); + surf.ss1.base_addr = brw_buffer_offset( brw, pipe_surface->buffer ); - surf.ss2.width = region->width; - surf.ss2.height = region->height; + surf.ss2.width = pipe_surface->width - 1; + surf.ss2.height = pipe_surface->height - 1; surf.ss3.tile_walk = BRW_TILEWALK_XMAJOR; surf.ss3.tiled_surface = 0; - surf.ss3.pitch = region->pitch; + surf.ss3.pitch = (pipe_surface->pitch * pipe_surface->cpp) - 1; } else { surf.ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; surf.ss0.surface_type = BRW_SURFACE_NULL; @@ -221,10 +221,10 @@ static void upload_wm_surfaces(struct brw_context *brw ) brw->attribs.Blend->blend_enable); - surf.ss0.writedisable_red = !brw->attribs.BlendColor.color[0]; - surf.ss0.writedisable_green = !brw->attribs.BlendColor.color[1]; - surf.ss0.writedisable_blue = !brw->attribs.BlendColor.color[2]; - surf.ss0.writedisable_alpha = !brw->attribs.BlendColor.color[3]; + surf.ss0.writedisable_red = !(brw->attribs.Blend->colormask & PIPE_MASK_R); + surf.ss0.writedisable_green = !(brw->attribs.Blend->colormask & PIPE_MASK_G); + surf.ss0.writedisable_blue = !(brw->attribs.Blend->colormask & PIPE_MASK_B); + surf.ss0.writedisable_alpha = !(brw->attribs.Blend->colormask & PIPE_MASK_A); @@ -235,28 +235,18 @@ static void upload_wm_surfaces(struct brw_context *brw ) } + /* BRW_NEW_TEXTURE + */ for (i = 0; i < BRW_MAX_TEX_UNIT; i++) { const struct brw_texture *texUnit = brw->attribs.Texture[i]; - if (texUnit == NULL) - continue; - - /* BRW_NEW_TEXTURE - */ - if (texUnit->base.refcount/*(texUnit->refcount > 0) == really used */) { + if (texUnit && + texUnit->base.refcount/*(texUnit->refcount > 0) == really used */) { brw_update_texture_surface(brw, i); brw->wm.nr_surfaces = i+2; } -#if 0 - else if( texUnit->refcount && - texUnit->_Current == intel->frame_buffer_texobj ) - { - brw->wm.bind.surf_ss_offset[i+1] = brw->wm.bind.surf_ss_offset[0]; - brw->wm.nr_surfaces = i+2; - } -#endif else { brw->wm.bind.surf_ss_offset[i+1] = 0; } diff --git a/src/mesa/pipe/tgsi/exec/tgsi_exec.c b/src/mesa/pipe/tgsi/exec/tgsi_exec.c index 1f43f3643e..e469281d22 100644 --- a/src/mesa/pipe/tgsi/exec/tgsi_exec.c +++ b/src/mesa/pipe/tgsi/exec/tgsi_exec.c @@ -2415,6 +2415,7 @@ tgsi_exec_machine_run( struct tgsi_exec_machine *mach ) mach->FuncMask = 0xf; mach->ExecMask = 0xf; + mach->CondStackTop = 0; /* temporarily subvert this assertion */ assert(mach->CondStackTop == 0); assert(mach->LoopStackTop == 0); assert(mach->ContStackTop == 0); diff --git a/src/mesa/pipe/tgsi/util/tgsi_dump.c b/src/mesa/pipe/tgsi/util/tgsi_dump.c index 3f4d930dec..cdbc0dbc9c 100644 --- a/src/mesa/pipe/tgsi/util/tgsi_dump.c +++ b/src/mesa/pipe/tgsi/util/tgsi_dump.c @@ -453,7 +453,6 @@ static const char *TGSI_OPCODES[] = "OPCODE_CALLNZ", "OPCODE_IFC", "OPCODE_BREAKC", - "OPCODE_TXP", "OPCODE_KIL", "OPCODE_END" }; @@ -592,7 +591,6 @@ static const char *TGSI_OPCODES_SHORT[] = "CALLNZ", "IFC", "BREAKC", - "TXP", "KIL", "END" }; @@ -1518,6 +1516,15 @@ dump_gen( tgsi_parse_free( &parse ); } + +static void +sanity_checks(void) +{ + assert(strcmp(TGSI_OPCODES[TGSI_OPCODE_END], "OPCODE_END") == 0); + assert(strcmp(TGSI_OPCODES_SHORT[TGSI_OPCODE_END], "END") == 0); +} + + void tgsi_dump( const struct tgsi_token *tokens, @@ -1525,6 +1532,8 @@ tgsi_dump( { struct file_dump dump; + sanity_checks(); + dump.base.write = _file_dump_write; #if 0 { diff --git a/src/mesa/pipe/xlib/brw_aub.c b/src/mesa/pipe/xlib/brw_aub.c index 1b7fc3c20e..541d50c6e4 100644 --- a/src/mesa/pipe/xlib/brw_aub.c +++ b/src/mesa/pipe/xlib/brw_aub.c @@ -331,7 +331,7 @@ void brw_aub_dump_bmp( struct brw_aubfile *aubfile, db.format = format; db.bpp = surface->cpp * 8; db.pitch = surface->pitch; - db.xsize = surface->pitch; + db.xsize = surface->width; db.ysize = surface->height; db.addr = gtt_offset; db.unknown = /* surface->tiled ? 0x4 : */ 0x0; diff --git a/src/mesa/pipe/xlib/xm_api.c b/src/mesa/pipe/xlib/xm_api.c index 142074bc65..ebf4c21eaf 100644 --- a/src/mesa/pipe/xlib/xm_api.c +++ b/src/mesa/pipe/xlib/xm_api.c @@ -207,7 +207,7 @@ static GLboolean window_exists( XMesaDisplay *dpy, Window win ) } static Status -get_drawable_size( XMesaDisplay *dpy, Drawable d, GLuint *width, GLuint *height ) +get_drawable_size( XMesaDisplay *dpy, Drawable d, uint *width, uint *height ) { Window root; Status stat; @@ -323,6 +323,7 @@ create_xmesa_buffer(XMesaDrawable d, BufferType type, XMesaBuffer b; GLframebuffer *fb; enum pipe_format colorFormat, depthFormat, stencilFormat; + uint width, height; ASSERT(type == WINDOW || type == PIXMAP || type == PBUFFER); @@ -359,11 +360,14 @@ create_xmesa_buffer(XMesaDrawable d, BufferType type, } + get_drawable_size(vis->display, d, &width, &height); + /* * Create framebuffer, but we'll plug in our own renderbuffers below. */ - b->stfb = st_create_framebuffer(&vis->mesa_visual, GL_TRUE, + b->stfb = st_create_framebuffer(&vis->mesa_visual, colorFormat, depthFormat, stencilFormat, + width, height, (void *) b); fb = &b->stfb->Base; @@ -1067,12 +1071,12 @@ GLboolean XMesaMakeCurrent2( XMesaContext c, XMesaBuffer drawBuffer, */ _glapi_check_multithread(); + st_make_current(c->st, drawBuffer->stfb, readBuffer->stfb); + xmesa_check_and_update_buffer_size(c, drawBuffer); if (readBuffer != drawBuffer) xmesa_check_and_update_buffer_size(c, readBuffer); - st_make_current(c->st, drawBuffer->stfb, readBuffer->stfb); - /* Solution to Stephane Rehel's problem with glXReleaseBuffersMESA(): */ drawBuffer->wasCurrent = GL_TRUE; } diff --git a/src/mesa/pipe/xlib/xm_winsys_aub.c b/src/mesa/pipe/xlib/xm_winsys_aub.c index ef3d975afb..b207638390 100644 --- a/src/mesa/pipe/xlib/xm_winsys_aub.c +++ b/src/mesa/pipe/xlib/xm_winsys_aub.c @@ -35,9 +35,9 @@ #include "glxheader.h" #include "xmesaP.h" -#include "main/macros.h" #include "pipe/p_winsys.h" +#include "pipe/p_util.h" #include "pipe/i965simple/brw_winsys.h" #include "brw_aub.h" #include "xm_winsys_aub.h" @@ -159,13 +159,13 @@ static int aub_buffer_data(struct pipe_winsys *winsys, assert(iws->used + size < iws->size); sbo->data = iws->pool + iws->used; sbo->offset = AUB_BUF_START + iws->used; - iws->used += size; + iws->used += align(size, 4096); } sbo->size = size; if (data != NULL) { - memcpy(iws->pool, data, size); + memcpy(sbo->data, data, size); brw_aub_gtt_data( iws->aubfile, sbo->offset, @@ -226,10 +226,16 @@ void xmesa_commands_aub(struct pipe_winsys *winsys, unsigned nr_dwords) { struct aub_pipe_winsys *iws = aub_pipe_winsys(winsys); + unsigned size = nr_dwords * 4; + + assert(iws->used + size < iws->size); + brw_aub_gtt_cmds( iws->aubfile, - 0, /* ?? */ + AUB_BUF_START + iws->used, cmds, nr_dwords * sizeof(int) ); + + iws->used += align(size, 4096); } @@ -253,7 +259,7 @@ static int aub_buffer_get_subdata(struct pipe_winsys *winsys, void *data) { struct aub_buffer *sbo = aub_bo(buf); - assert(sbo->size > offset + size); + assert(sbo->size >= offset + size); memcpy(data, sbo->data + offset, size); return 0; } @@ -590,6 +596,14 @@ static void aub_i965_buffer_subdata_typed(struct brw_winsys *winsys, aub_type = DW_SURFACE_STATE; aub_sub_type = DWSS_BINDING_TABLE_STATE; break; + case BRW_CONSTANT_BUFFER: + aub_type = DW_CONSTANT_URB_ENTRY; + aub_sub_type = 0; + break; + + default: + assert(0); + break; } xmesa_buffer_subdata_aub( iws->pipe_winsys, diff --git a/src/mesa/state_tracker/st_atom_shader.c b/src/mesa/state_tracker/st_atom_shader.c index 33372b0f39..2a182c7d9c 100644 --- a/src/mesa/state_tracker/st_atom_shader.c +++ b/src/mesa/state_tracker/st_atom_shader.c @@ -228,12 +228,17 @@ find_translated_vp(struct st_context *st, xvp->output_to_slot[outAttr] = vpOutSlot; numVpOuts++; } - else if (outAttr == VERT_RESULT_BFC0 || + else if (outAttr == VERT_RESULT_PSIZ || + outAttr == VERT_RESULT_BFC0 || outAttr == VERT_RESULT_BFC1) { /* backface colors go into last slots */ xvp->output_to_slot[outAttr] = numVpOuts++; } } + /* + printf("output_to_slot[%d] = %d\n", outAttr, + xvp->output_to_slot[outAttr]); + */ } /* Unneeded vertex program outputs will go to this slot. diff --git a/src/mesa/state_tracker/st_cb_accum.c b/src/mesa/state_tracker/st_cb_accum.c index ea0b1187fc..cf2e9db51c 100644 --- a/src/mesa/state_tracker/st_cb_accum.c +++ b/src/mesa/state_tracker/st_cb_accum.c @@ -321,7 +321,7 @@ st_Accum(GLcontext *ctx, GLenum op, GLfloat value) const GLint height = ctx->DrawBuffer->_Ymax - ypos; /* make sure color bufs aren't cached */ - pipe->flush(pipe, 0); + pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE); switch (op) { case GL_ADD: diff --git a/src/mesa/state_tracker/st_cb_drawpixels.c b/src/mesa/state_tracker/st_cb_drawpixels.c index e70a5b49e1..2db12c653b 100644 --- a/src/mesa/state_tracker/st_cb_drawpixels.c +++ b/src/mesa/state_tracker/st_cb_drawpixels.c @@ -849,7 +849,7 @@ draw_stencil_pixels(GLcontext *ctx, GLint x, GLint y, GLint skipPixels; ubyte *stmap; - pipe->flush(pipe, 0); + pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE); /* map the stencil buffer */ stmap = pipe_surface_map(ps); @@ -1208,7 +1208,7 @@ st_CopyPixels(GLcontext *ctx, GLint srcx, GLint srcy, uint format; /* make sure rendering has completed */ - pipe->flush(pipe, 0x0); + pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE); st_validate_state(st); diff --git a/src/mesa/state_tracker/st_cb_fbo.c b/src/mesa/state_tracker/st_cb_fbo.c index c40f75417f..bc0f26ffb0 100644 --- a/src/mesa/state_tracker/st_cb_fbo.c +++ b/src/mesa/state_tracker/st_cb_fbo.c @@ -365,7 +365,7 @@ st_finish_render_texture(GLcontext *ctx, assert(strb); - ctx->st->pipe->flush(ctx->st->pipe, 0x0); + ctx->st->pipe->flush(ctx->st->pipe, PIPE_FLUSH_RENDER_CACHE); /* printf("FINISH RENDER TO TEXTURE surf=%p\n", strb->surface); diff --git a/src/mesa/state_tracker/st_cb_flush.c b/src/mesa/state_tracker/st_cb_flush.c index 95149a3200..9808b1f8f6 100644 --- a/src/mesa/state_tracker/st_cb_flush.c +++ b/src/mesa/state_tracker/st_cb_flush.c @@ -83,7 +83,7 @@ void st_flush( struct st_context *st, uint pipeFlushFlags ) */ static void st_Flush(GLcontext *ctx) { - st_flush(ctx->st, 0x0); + st_flush(ctx->st, PIPE_FLUSH_RENDER_CACHE); } @@ -92,7 +92,7 @@ static void st_Flush(GLcontext *ctx) */ static void st_Finish(GLcontext *ctx) { - st_flush(ctx->st, PIPE_FLUSH_WAIT); + st_flush(ctx->st, PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_WAIT); } diff --git a/src/mesa/state_tracker/st_cb_readpixels.c b/src/mesa/state_tracker/st_cb_readpixels.c index 96829fcfa0..b0c9275c6f 100644 --- a/src/mesa/state_tracker/st_cb_readpixels.c +++ b/src/mesa/state_tracker/st_cb_readpixels.c @@ -155,7 +155,7 @@ st_readpixels(GLcontext *ctx, GLint x, GLint y, GLsizei width, GLsizei height, } /* make sure rendering has completed */ - pipe->flush(pipe, 0x0); + pipe->flush(pipe, PIPE_FLUSH_RENDER_CACHE); if (pack->BufferObj && pack->BufferObj->Name) { /* reading into a PBO */ diff --git a/src/mesa/state_tracker/st_context.c b/src/mesa/state_tracker/st_context.c index 524e06fb00..1d26da474e 100644 --- a/src/mesa/state_tracker/st_context.c +++ b/src/mesa/state_tracker/st_context.c @@ -28,6 +28,8 @@ #include "main/imports.h" #include "main/context.h" #include "main/extensions.h" +#include "main/matrix.h" +#include "main/buffers.h" #include "vbo/vbo.h" #include "shader/shader_api.h" #include "st_public.h" @@ -163,7 +165,19 @@ void st_make_current(struct st_context *st, struct st_framebuffer *read) { if (st) { + GLboolean firstTime = st->ctx->FirstTimeCurrent; _mesa_make_current(st->ctx, &draw->Base, &read->Base); + /* Need to initialize viewport here since draw->Base->Width/Height + * will still be zero at this point. + * This could be improved, but would require rather extensive work + * elsewhere (allocate rb surface storage sooner) + */ + if (firstTime) { + GLuint w = draw->InitWidth, h = draw->InitHeight; + _mesa_set_viewport(st->ctx, 0, 0, w, h); + _mesa_set_scissor(st->ctx, 0, 0, w, h); + + } } else { _mesa_make_current(NULL, NULL, NULL); diff --git a/src/mesa/state_tracker/st_context.h b/src/mesa/state_tracker/st_context.h index c3919d474c..0f40f3ceee 100644 --- a/src/mesa/state_tracker/st_context.h +++ b/src/mesa/state_tracker/st_context.h @@ -191,6 +191,7 @@ struct st_framebuffer { GLframebuffer Base; void *Private; + GLuint InitWidth, InitHeight; }; diff --git a/src/mesa/state_tracker/st_draw.c b/src/mesa/state_tracker/st_draw.c index a3e061d604..b3d463043d 100644 --- a/src/mesa/state_tracker/st_draw.c +++ b/src/mesa/state_tracker/st_draw.c @@ -287,7 +287,7 @@ st_draw_vbo(GLcontext *ctx, /* common-case setup */ vbuffer[attr].pitch = arrays[mesaAttr]->StrideB; /* in bytes */ - vbuffer[attr].max_index = 0; /* need this? */ + vbuffer[attr].max_index = max_index; velement.vertex_buffer_index = attr; velement.nr_components = arrays[mesaAttr]->Size; velement.src_format = pipe_vertex_format(arrays[mesaAttr]->Type, @@ -545,7 +545,7 @@ st_feedback_draw_vbo(GLcontext *ctx, /* common-case setup */ vbuffer[attr].pitch = arrays[mesaAttr]->StrideB; /* in bytes */ - vbuffer[attr].max_index = 0; /* need this? */ + vbuffer[attr].max_index = max_index; velement.vertex_buffer_index = attr; velement.nr_components = arrays[mesaAttr]->Size; velement.src_format = pipe_vertex_format(arrays[mesaAttr]->Type, diff --git a/src/mesa/state_tracker/st_framebuffer.c b/src/mesa/state_tracker/st_framebuffer.c index b81a894ef1..7ddc74e355 100644 --- a/src/mesa/state_tracker/st_framebuffer.c +++ b/src/mesa/state_tracker/st_framebuffer.c @@ -33,84 +33,84 @@ #include "st_public.h" #include "st_context.h" #include "st_cb_fbo.h" +#include "pipe/p_defines.h" struct st_framebuffer * st_create_framebuffer( const __GLcontextModes *visual, - boolean createRenderbuffers, /* XXX remove? */ enum pipe_format colorFormat, enum pipe_format depthFormat, enum pipe_format stencilFormat, + uint width, uint height, void *private) { struct st_framebuffer *stfb = CALLOC_STRUCT(st_framebuffer); if (stfb) { _mesa_initialize_framebuffer(&stfb->Base, visual); - if (createRenderbuffers) { - { - /* fake frontbuffer */ - /* XXX allocation should only happen in the unusual case - it's actually needed */ - struct gl_renderbuffer *rb - = st_new_renderbuffer_fb(colorFormat); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_FRONT_LEFT, rb); - } + { + /* fake frontbuffer */ + /* XXX allocation should only happen in the unusual case + it's actually needed */ + struct gl_renderbuffer *rb + = st_new_renderbuffer_fb(colorFormat); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_FRONT_LEFT, rb); + } - if (visual->doubleBufferMode) { - struct gl_renderbuffer *rb - = st_new_renderbuffer_fb(colorFormat); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_BACK_LEFT, rb); - } + if (visual->doubleBufferMode) { + struct gl_renderbuffer *rb + = st_new_renderbuffer_fb(colorFormat); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_BACK_LEFT, rb); + } + + if (visual->depthBits == 24 && visual->stencilBits == 8) { + /* combined depth/stencil buffer */ + struct gl_renderbuffer *depthStencilRb + = st_new_renderbuffer_fb(depthFormat); + /* note: bind RB to two attachment points */ + _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthStencilRb); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_STENCIL, depthStencilRb); + } + else { + /* separate depth and/or stencil */ - if (visual->depthBits == 24 && visual->stencilBits == 8) { - /* combined depth/stencil buffer */ - struct gl_renderbuffer *depthStencilRb + if (visual->depthBits == 32) { + /* 32-bit depth buffer */ + struct gl_renderbuffer *depthRb = st_new_renderbuffer_fb(depthFormat); - /* note: bind RB to two attachment points */ - _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthStencilRb); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_STENCIL, depthStencilRb); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthRb); } - else { - /* separate depth and/or stencil */ - - if (visual->depthBits == 32) { - /* 32-bit depth buffer */ - struct gl_renderbuffer *depthRb - = st_new_renderbuffer_fb(depthFormat); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthRb); - } - else if (visual->depthBits == 24) { - /* 24-bit depth buffer, ignore stencil bits */ - struct gl_renderbuffer *depthRb - = st_new_renderbuffer_fb(depthFormat); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthRb); - } - else if (visual->depthBits > 0) { - /* 16-bit depth buffer */ - struct gl_renderbuffer *depthRb - = st_new_renderbuffer_fb(depthFormat); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthRb); - } - - if (visual->stencilBits > 0) { - /* 8-bit stencil */ - struct gl_renderbuffer *stencilRb - = st_new_renderbuffer_fb(stencilFormat); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_STENCIL, stencilRb); - } + else if (visual->depthBits == 24) { + /* 24-bit depth buffer, ignore stencil bits */ + struct gl_renderbuffer *depthRb + = st_new_renderbuffer_fb(depthFormat); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthRb); + } + else if (visual->depthBits > 0) { + /* 16-bit depth buffer */ + struct gl_renderbuffer *depthRb + = st_new_renderbuffer_fb(depthFormat); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_DEPTH, depthRb); } - if (visual->accumRedBits > 0) { - /* 16-bit/channel accum */ - struct gl_renderbuffer *accumRb - = st_new_renderbuffer_fb(PIPE_FORMAT_R16G16B16A16_SNORM); - _mesa_add_renderbuffer(&stfb->Base, BUFFER_ACCUM, accumRb); + if (visual->stencilBits > 0) { + /* 8-bit stencil */ + struct gl_renderbuffer *stencilRb + = st_new_renderbuffer_fb(stencilFormat); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_STENCIL, stencilRb); } } - stfb->Base.Initialized = GL_TRUE; + if (visual->accumRedBits > 0) { + /* 16-bit/channel accum */ + struct gl_renderbuffer *accumRb + = st_new_renderbuffer_fb(PIPE_FORMAT_R16G16B16A16_SNORM); + _mesa_add_renderbuffer(&stfb->Base, BUFFER_ACCUM, accumRb); + } + stfb->Base.Initialized = GL_TRUE; + stfb->InitWidth = width; + stfb->InitHeight = height; stfb->Private = private; } return stfb; @@ -171,7 +171,7 @@ st_notify_swapbuffers(struct st_framebuffer *stfb) GET_CURRENT_CONTEXT(ctx); if (ctx && ctx->DrawBuffer == &stfb->Base) { - st_flush(ctx->st, 0x0); + st_flush(ctx->st, PIPE_FLUSH_RENDER_CACHE); } } diff --git a/src/mesa/state_tracker/st_mesa_to_tgsi.c b/src/mesa/state_tracker/st_mesa_to_tgsi.c index c8b76978f1..325aa20173 100644 --- a/src/mesa/state_tracker/st_mesa_to_tgsi.c +++ b/src/mesa/state_tracker/st_mesa_to_tgsi.c @@ -47,7 +47,9 @@ */ static GLuint map_register_file( - enum register_file file ) + enum register_file file, + GLuint index, + const GLuint immediateMapping[] ) { switch( file ) { case PROGRAM_UNDEFINED: @@ -56,10 +58,20 @@ map_register_file( return TGSI_FILE_TEMPORARY; //case PROGRAM_LOCAL_PARAM: //case PROGRAM_ENV_PARAM: + + /* Because of the longstanding problem with mesa arb shaders + * where constants, immediates and state variables are all + * bundled together as PROGRAM_STATE_VAR, we can't tell from the + * mesa register file whether this is a CONSTANT or an + * IMMEDIATE, hence we need all the other information. + */ case PROGRAM_STATE_VAR: case PROGRAM_NAMED_PARAM: case PROGRAM_UNIFORM: - return TGSI_FILE_CONSTANT; + if (immediateMapping[index] != ~0) + return TGSI_FILE_IMMEDIATE; + else + return TGSI_FILE_CONSTANT; case PROGRAM_CONSTANT: return TGSI_FILE_IMMEDIATE; case PROGRAM_INPUT: @@ -180,7 +192,8 @@ compile_instruction( const GLuint outputMapping[], const GLuint immediateMapping[], GLuint preamble_size, - GLuint processor ) + GLuint processor, + GLboolean *insideSubroutine) { GLuint i; struct tgsi_full_dst_register *fulldst; @@ -193,7 +206,7 @@ compile_instruction( fullinst->Instruction.NumSrcRegs = _mesa_num_inst_src_regs( inst->Opcode ); fulldst = &fullinst->FullDstRegisters[0]; - fulldst->DstRegister.File = map_register_file( inst->DstReg.File ); + fulldst->DstRegister.File = map_register_file( inst->DstReg.File, 0, NULL ); fulldst->DstRegister.Index = map_register_file_index( fulldst->DstRegister.File, inst->DstReg.Index, @@ -207,7 +220,9 @@ compile_instruction( GLuint j; fullsrc = &fullinst->FullSrcRegisters[i]; - fullsrc->SrcRegister.File = map_register_file( inst->SrcReg[i].File ); + fullsrc->SrcRegister.File = map_register_file( inst->SrcReg[i].File, + inst->SrcReg[i].Index, + immediateMapping ); fullsrc->SrcRegister.Index = map_register_file_index( fullsrc->SrcRegister.File, inst->SrcReg[i].Index, @@ -283,6 +298,7 @@ compile_instruction( break; case OPCODE_BGNSUB: fullinst->Instruction.Opcode = TGSI_OPCODE_BGNSUB; + *insideSubroutine = GL_TRUE; break; case OPCODE_BRA: fullinst->Instruction.Opcode = TGSI_OPCODE_BRA; @@ -334,6 +350,7 @@ compile_instruction( break; case OPCODE_ENDSUB: fullinst->Instruction.Opcode = TGSI_OPCODE_ENDSUB; + *insideSubroutine = GL_FALSE; break; case OPCODE_EX2: fullinst->Instruction.Opcode = TGSI_OPCODE_EX2; @@ -412,7 +429,16 @@ compile_instruction( fullinst->Instruction.Opcode = TGSI_OPCODE_RCP; break; case OPCODE_RET: - fullinst->Instruction.Opcode = TGSI_OPCODE_RET; + /* If RET is used inside main (not a real subroutine) we may want + * to execute END instead of RET. TBD... + */ + if (1 /* *insideSubroutine */) { + fullinst->Instruction.Opcode = TGSI_OPCODE_RET; + } + else { + /* inside main() pseudo-function */ + fullinst->Instruction.Opcode = TGSI_OPCODE_END; + } break; case OPCODE_RSQ: fullinst->Instruction.Opcode = TGSI_OPCODE_RSQ; @@ -499,7 +525,7 @@ compile_instruction( fulldst->DstRegister.WriteMask &= TGSI_WRITEMASK_XYZ; break; case OPCODE_END: - fullinst->Instruction.Opcode = TGSI_OPCODE_RET; + fullinst->Instruction.Opcode = TGSI_OPCODE_END; break; default: assert( 0 ); @@ -682,6 +708,7 @@ tgsi_translate_mesa_program( GLuint preamble_size = 0; GLuint immediates[1000]; GLuint numImmediates = 0; + GLboolean insideSubroutine = GL_FALSE; assert(procType == TGSI_PROCESSOR_FRAGMENT || procType == TGSI_PROCESSOR_VERTEX); @@ -800,6 +827,8 @@ tgsi_translate_mesa_program( } /* immediates/literals */ + memset(immediates, ~0, sizeof(immediates)); + for (i = 0; program->Parameters && i < program->Parameters->NumParameters; i++) { if (program->Parameters->Parameters[i].Type == PROGRAM_CONSTANT) { @@ -879,7 +908,8 @@ tgsi_translate_mesa_program( outputMapping, immediates, preamble_size, - procType ); + procType, + &insideSubroutine); ti += tgsi_build_full_instruction( &fullinst, diff --git a/src/mesa/state_tracker/st_program.c b/src/mesa/state_tracker/st_program.c index 6802bb3b06..1852228b29 100644 --- a/src/mesa/state_tracker/st_program.c +++ b/src/mesa/state_tracker/st_program.c @@ -167,6 +167,7 @@ st_translate_vertex_program(struct st_context *st, switch (attr) { case VERT_RESULT_HPOS: + assert(slot == 0); vs.output_semantic_name[slot] = TGSI_SEMANTIC_POSITION; vs.output_semantic_index[slot] = 0; break; @@ -218,6 +219,8 @@ st_translate_vertex_program(struct st_context *st, } } + assert(vs.output_semantic_name[0] == TGSI_SEMANTIC_POSITION); + if (outputMapping) { /* find max output slot referenced to compute vs.num_outputs */ diff --git a/src/mesa/state_tracker/st_public.h b/src/mesa/state_tracker/st_public.h index 558b20f1e8..ed5ef1f159 100644 --- a/src/mesa/state_tracker/st_public.h +++ b/src/mesa/state_tracker/st_public.h @@ -55,10 +55,10 @@ void st_copy_context_state(struct st_context *dst, struct st_context *src, uint mask); struct st_framebuffer *st_create_framebuffer( const __GLcontextModes *visual, - boolean createRenderbuffers, enum pipe_format colorFormat, enum pipe_format depthFormat, enum pipe_format stencilFormat, + uint width, uint height, void *privateData); void st_resize_framebuffer( struct st_framebuffer *stfb, |