| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-10-04 | r600g: the code to check whether a new vertex shader is needed was wrong | Dave Airlie | |
| this code was memcmp'ing two structs, but refcounting one of them afterwards, so any subsequent memcmp was never going to work. again this stops unnecessary uploads of vertex program, | |||
| 2010-10-04 | r600g: break out of search for reloc bo after finding it. | Dave Airlie | |
| this function was taking quite a lot of pointless CPU. | |||
| 2010-10-03 | i965: Fix glean/texSwizzle regression in previous commit. | Eric Anholt | |
| Easy enough patch, who needs a full test run. Oh, that's right. Me. | |||
| 2010-10-02 | i965: Set up swizzling of shadow compare results for GL_DEPTH_TEXTURE_MODE. | Eric Anholt | |
| The brw_wm_surface_state.c handling of GL_DEPTH_TEXTURE_MODE doesn't apply to shadow compares, which always return an intensity value. The texture swizzles can do the job for us. Fixes: glsl1-shadow2D(): 1 glsl1-shadow2D(): 3 | |||
| 2010-10-02 | i965: Add support for EXT_texture_swizzle to the new FS backend. | Eric Anholt | |
| 2010-10-02 | r300g: add support for L8A8 colorbuffers | Marek Olšák | |
| Blending with DST_ALPHA is undefined. SRC_ALPHA works, though. I bet some other formats have similar limitations too. | |||
| 2010-10-02 | r300g: add support for R8G8 colorbuffers | Marek Olšák | |
| The hw swizzles have been obtained by a brute force approach, and only C0 and C2 are stored in UV88, the other channels are ignored. R16G16 is going to be a lot trickier. | |||
| 2010-10-02 | mesa/st: initial attempt at RG support for gallium drivers | Dave Airlie | |
| passes all piglit RG tests with softpipe. | |||
| 2010-10-01 | i965: Fix incorrect batchbuffer size in gen6 clip state command. | Kenneth Graunke | |
| FORCE_ZERO_RTAINDEX should be in the fourth (and final) dword. | |||
| 2010-10-01 | i965: Don't try to emit code if we failed register allocation. | Eric Anholt | |
| 2010-10-01 | i965: Fix off-by-ones in handling the last members of register classes. | Eric Anholt | |
| Luckily, one of them would result in failing out register allocation when the other bugs were encountered. Applies to glsl-fs-vec4-indexing-temp-dst-in-nested-loop-combined, which still fails register allocation, but now legitimately. | |||
| 2010-10-01 | i965: Add a sanity check for register allocation sizes. | Eric Anholt | |
| 2010-10-01 | i965: When producing a single channel swizzle, don't make a temporary. | Eric Anholt | |
| This quickly cuts 8% of the instructions in my glsl demo. | |||
| 2010-10-01 | i965: Restore the forcing of aligned pairs for delta_xy on chips with PLN. | Eric Anholt | |
| By doing so using the register allocator now, we avoid wasting a register to make the alignment happen. | |||
| 2010-10-01 | r600c: fix segfault in evergreen stencil code | Alex Deucher | |
| Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=30551 | |||
| 2010-10-01 | r600g: Remove unnecessary headers. | Vinson Lee | |
| 2010-10-01 | r600g: Remove unused variable. | Vinson Lee | |
| Fixes this GCC warning. r600_shader.c: In function 'tgsi_split_literal_constant': r600_shader.c:818: warning: unused variable 'index' | |||
| 2010-10-01 | rgtc: Detect RGTC formats as color formats and as compressed formats | Ian Romanick | |
| 2010-10-01 | mesa: Trivial correction to comment | Ian Romanick | |
| 2010-10-01 | mesa: Fix misplaced #endif | Ian Romanick | |
| If FEATURE_texture_s3tc is not defined, FXT1 formats would erroneously fall through to the MESA_FORMAT_RGBA_FLOAT32 case. | |||
| 2010-10-01 | ARB_texture_rg: Add GL_COMPRESSED_{RED,RG} cases in _mesa_is_color_format | Ian Romanick | |
| 2010-10-01 | mesa: Add ARB_texture_compression_rgtc as an alias for ↵ | Ian Romanick | |
| EXT_texture_compression_rgtc Change the name in the extension tracking structure to ARB (from EXT). | |||
| 2010-10-01 | savage: Remove unnecessary header. | Vinson Lee | |
| 2010-10-01 | glsl: Remove unnecessary header. | Vinson Lee | |
| 2010-10-01 | i965: Enable GL_ARB_texture_rg | Ian Romanick | |
| 2010-10-01 | mesa: Enable GL_ARB_texture_rg in software paths | Ian Romanick | |
| 2010-10-01 | ARB_texture_rg: Allow RED and RG textures as FBO color buffer attachments | Ian Romanick | |
| 2010-10-01 | ARB_texture_rg: Add R8, R16, RG88, and RG1616 internal formats | Ian Romanick | |
| 2010-10-01 | ARB_texture_rg: Handle RED and RG the same as RGB for tex env | Ian Romanick | |
| 2010-10-01 | ARB_texture_rg: Add GL_RED as a valid GL_DEPTH_TEXTURE_MODE | Ian Romanick | |
| 2010-10-01 | ARB_texture_rg: Add GL_TEXTURE_{RED,GREEN}_SIZE query support | Ian Romanick | |
| 2010-10-01 | ARB_texture_rg: Correct some errors in RED / RG internal format handling | Ian Romanick | |
| Fixes several problems: The half-float, float, and integer internal formats depend on ARB_texture_rg and other extensions. RG_INTEGER is not a valid internal format. Generic compressed formats depend on ARB_texture_rg, not EXT_texture_compression_rgtc. Use GL_RED instead of GL_R. | |||
| 2010-10-01 | ARB_texture_rg: Add GLX protocol support | Ian Romanick | |
| 2010-10-01 | i965g: use Elements macro instead of manual sizeofs | Nicolas Kaiser | |
| Signed-off-by: Nicolas Kaiser <nikai@nikai.net> Signed-off-by: Brian Paul <brianp@vmware.com> | |||
| 2010-10-01 | i965: Fix up copy'n'pasteo from moving coordinate setup around for gen4. | Eric Anholt | |
| 2010-10-01 | i965: Add real support for pre-gen5 texture sampling to the new FS. | Eric Anholt | |
| Fixes 36 testcases, including glsl-fs-shadow2d*-bias which fail on the Mesa IR backend. | |||
| 2010-10-01 | evergreen : fix z format setting, enable stencil. | richard | |
| 2010-10-01 | i965: Pre-gen6, map VS outputs (not FS inputs) to URB setup in the new FS. | Eric Anholt | |
| We should fix the SF to actually give us just the data we need, but this fixes regressions in the new FS until then. Fixes: glsl-kwin-blur glsl-routing | |||
| 2010-10-01 | i965: Also increment attribute location when skipping unused slots. | Eric Anholt | |
| Fixes glsl1-texcoord varying. | |||
| 2010-10-01 | i965: Fix the gen6 jump size for BREAK/CONT in new FS. | Eric Anholt | |
| Since gen5, jumps are in increments of 64 bits instead of increments of 128-bit instructions. | |||
| 2010-10-01 | i965: Add gen6 attribute interpolation to new FS backend. | Eric Anholt | |
| Untested, since my hardware is not booting at the moment. | |||
| 2010-10-01 | r600g: indentation fixes | Jerome Glisse | |
| Signed-off-by: Jerome Glisse <jglisse@redhat.com> | |||
| 2010-10-01 | r600g: setup basic loop consts on r600 + evergreen. | Dave Airlie | |
| this sets up a single loop constant like r600c does. | |||
| 2010-10-01 | r600g: only set the Z export if shader exports it. | Dave Airlie | |
| 2010-10-01 | r600c: pull over 6xx/7xx vertex fixes for evergreen | Alex Deucher | |
| 2010-10-01 | r600g: flush SH cache on constant change on evergreen | Dave Airlie | |
| 2010-10-01 | r600g: fix evergreen draw-buffers | Dave Airlie | |
| just a typo in the register headers. | |||
| 2010-10-01 | r600g: add cb flushing for extra buffers + depth buffer on r600/evergreen | Dave Airlie | |
| 2010-10-01 | r600g: sync vertex/texture cache on resources on evergreen | Dave Airlie | |
| this gets rid of lots of the instability on evergreen, which isn't surprising since it really broken not to flush caches. | |||
| 2010-10-01 | r600g: fixup vertex format picking. | Dave Airlie | |
| there are some vertex formats defined in r600c not in the docs. | |||
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
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