Age | Commit message (Collapse) | Author |
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This helps improve the surface cache behaviour in the face of the
large number of single-use render targets generated by EXA and the xorg
state tracker. Without this we can reference hundreds of individual
render targets from a command buffer, which leaves little scope for
sharing or reuse of those targets.
Flushing early means we can start reusing textures much sooner.
This shouldn't have much effect on normal 3d rendering as it's pretty
rare to have a command buffer with >8 different render targets in that
world.
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Drop the 1.1 version suffix.
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Drop the 1.1 version suffix.
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Not really needed, never served its purpose.
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width/height/depth arrays
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We want to fallback to draw splitting when vertex element indices
might be too high for atomic draw path (currently limited to 4095).
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SSE3 != SSSE3 and so far we only use the later.
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There are no hard requirements at the moment.
We don't really emit any sse3 yet. Just some ssse3.
Thanks to Roland for spotting these incorrections.
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This enum is only supported for OpenGL 2.0. If a driver supports
OpenGL 1.4 and GL_ARB_point_sprite, using this enum should generate an
error. This is important because, for example, i915 and i830 can
support GL_ARB_point_sprite, but they cannot support
GL_POINT_SPRITE_COORD_ORIGIN.
This commit just removes the check for NV_point_sprite, which is
completely wrong, and add some comments describing what the code
should do. I don't see an easy way to check for version >= 2.0 from
inside Mesa. Perhaps we should add an extension
GL_MESA_point_sprite_20 (like Intel's old GL_EXT_packed_pixels_12) to
indicate that this added bit of functionality is available.
Also note that glean's pointSprite test only checks for
GL_ARB_point_sprite before trying to use
GL_POINT_SPRITE_COORD_ORIGIN. Naturally, that fails on
non-2.0 implementations (i.e., Mac OS X on GMA 950).
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Conflicts:
src/mesa/state_tracker/st_atom_shader.c
src/mesa/state_tracker/st_program.c
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LLVM 2.5 is no longer supported on windows.
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Thanks to Intel code which I've just stolen pretty much as usual.
This fixes fdo bug 22851 which is a dri1 regression since rewrite.
Tested by: fpiobaf (Fabio) on #radeon
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This makes the miptree rounds up to the near POT for each level for
all radeons, however since mipmaps aren't support with NPOT on previous
radeons this calculation shouldn't cause any problems. If it does
we can just make it r600 only.
I tested a few mipmap demos on r500 and they all seem to work.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Can give a little boost e.g. for anti-aliased text rendering.
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Fixes 3D apps not updating with a non-GL compositing manager and Option
"2DAccel" "off".
Also clean up a little pixmap vs. drawable mess.
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This directory needs indent run over it.
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Accidentally committed in 7fbdbad5c02e3d5bfbf0e641e2aec224e39fa974
('st/xorg: consolidate some dest surface state setting')
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Similar to the classic swapbuffer throttling in GL drivers, put an
upper bound on the number of outstanding chunks of rendering the state
tracker can generate -- where calling the block handler denotes a
chunk.
Currently that number is set at around 4 "chunks", but could be
tweaked up or down. If a better measure for the amount of outstanding
rendering is found, that would be fine too.
As it stands, this improves interactivity by preventing the X server
from queueing up arbitary amounts of rendering.
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Any high-overhead one-off tasks are moved into the prepare hook.
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These currently don't reference any constants. Can add this back
if newer shaders need them, but in the meantime don't create
a new constant buffer every time we do a blit.
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The two users of composite (Composite and Solid) now call a new
xorg_composite_done() from their Done functions, while CopyDone
is directly implemented on top of xorg_renderer.c.
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If the system doesn't have libkms installed it wont try to link against it.
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SrcRegister -> Register
SrcRegisterInd -> Indirect
SrcRegisterDim -> Dimension
SrcRegisterDimInd -> DimIndirect
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DstRegister -> Register
DstRegisterInd -> Indirect
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