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2010-10-12llvmpipe: make sure intrinsics code is guarded with PIPE_ARCH_SSEKeith Whitwell
2010-10-12st/xorg: Fix typoThomas Hellstrom
Pointed out by Jakob Bornecrantz. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2010-10-12ir_to_mesa: assorted clean-ups, const qualifiers, new commentsBrian Paul
2010-10-12gallivm: Name anonymous union.José Fonseca
2010-10-12st/xlib: add some commentsBrian Paul
2010-10-12glsl2: fix signed/unsigned comparison warningBrian Paul
2010-10-12llmvpipe: improve mm_mullo_epi32José Fonseca
Apply Jose's suggestions for a small but measurable improvement in isosurf.
2010-10-12st/xorg: Don't try to remove invalid fbsThomas Hellstrom
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2010-10-12xorg/vmwgfx: Don't hide HW cursors when updating themThomas Hellstrom
Gets rid of annoying cursor flicker Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2010-10-12st/xorg: Add a customizer option to get rid of annoying cursor update flickerThomas Hellstrom
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2010-10-12xorg/vmwgfx: Make vmwarectrl work also on 64-bit serversThomas Hellstrom
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2010-10-12st/xorg: Don't try to use option values before processing optionsThomas Hellstrom
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
2010-10-12Revert "llvmpipe: try to keep plane c values small"Keith Whitwell
This reverts commit 9773722c2b09d5f0615a47cecf4347859474dc56. Looks like there are some floor/rounding issues here that need to be better understood.
2010-10-12gallivm: don't branch on KILLs near end of shaderKeith Whitwell
2010-10-12r600g: add missing file to sconscriptKeith Whitwell
2010-10-12gallium: move sse intrinsics debug helpers to u_sse.hKeith Whitwell
2010-10-12llvmpipe: Fix MSVC build.José Fonseca
MSVC doesn't accept more than 3 __m128i arguments.
2010-10-12llvmpipe: fix typo in last commitKeith Whitwell
2010-10-12llvmpipe: try to keep plane c values smallKeith Whitwell
Avoid accumulating more and more fixed point bits.
2010-10-12llvmpipe: add debug helpers for epi32 etcKeith Whitwell
2010-10-12llvmpipe: try to do more of rast_tri_3_16 with intrinsicsKeith Whitwell
There was actually a large quantity of scalar code in these functions previously. This tries to move more into intrinsics. Introduce an sse2 mm_mullo_epi32 replacement to avoid sse4 dependency in the new rasterization code.
2010-10-12llvmpipe: Do not dispose the execution engine.José Fonseca
The engine is a global owned by gallivm module.
2010-10-12nouveau: Get larger push buffers.Francisco Jerez
Useful to amortize the command submission/reloc overhead (e.g. etracer goes from 72 to 109 FPS on nv4b).
2010-10-12dri/nouveau: Initialize tile_flags when allocating a render target.Francisco Jerez
2010-10-12r600g: fix typo in vertex sampling on r600Dave Airlie
fixes https://bugs.freedesktop.org/show_bug.cgi?id=30771 Reported-by: Kevin DeKorte
2010-10-11i965: Always use the new FS backend on gen6.Eric Anholt
It's now much more correct for gen6 than the old backend, with just 2 regressions I've found (one of which is common with pre-gen6 and will be fixed by an array splitting IR pass). This does leave the old Mesa IR backend getting used still when we don't have GLSL IR, but the plan is to get GLSL IR input to the driver for the ARB programs and fixed function by the next release.
2010-10-11i965: Fix gen6 pixel_[xy] setup to avoid mixing int and float src operands.Eric Anholt
Pre-gen6, you could mix int and float just fine. Now, you get goofy results. Fixes: glsl-arb-fragment-coord-conventions glsl-fs-fragcoord glsl-fs-if-greater glsl-fs-if-greater-equal glsl-fs-if-less glsl-fs-if-less-equal
2010-10-11i965: Don't compute-to-MRF in gen6 VS math.Eric Anholt
There was code to do this for pre-gen6 already, this just enables it for gen6 as well.
2010-10-11i965: Expand uniform args to gen6 math to full registers to get hstride == 1.Eric Anholt
This is a hw requirement in math args. This also is inefficient, as we're calculating the same result 8 times, but then we've been doing that on pre-gen6 as well. If we're doing math on uniforms, though, we'd probably be better served by having some sort of mechanism for precalculating those results into another uniform value to use. Fixes 7 piglit math tests.
2010-10-11i965: Don't compute-to-MRF in gen6 math instructions.Eric Anholt
2010-10-11i965: Add a couple of checks for gen6 math instruction limits.Eric Anholt
2010-10-11i965: Don't consider gen6 math instructions to write to MRFs.Eric Anholt
This was leftover from the pre-gen6 cleanups. One tests regresses where compute-to-MRF now occurs.
2010-10-11glsl: Changes in generated file glsl_lexer.cppChad Versace
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2010-10-11glsl: Add lexer rules for uint and uvecN (N=2..4)Chad Versace
Commit for generated file glsl_lexer.cpp follows this commit. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2010-10-11glsl: Add glsl_type::uvecN_type for N=2,3Chad Versace
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2010-10-11intel_extensions: Add ability to set GLSL version via environmentChad Versace
Add ability to set the GLSL version used by the GLcontext by setting the environment variable INTEL_GLSL_VERSION. For example, env INTEL_GLSL_VERSION=130 prog args If the environment variable is missing, the GLSL versions defaults to 120. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2010-10-11r200: revalidate after radeon_update_renderbuffersDaniel Vetter
By calling radeon_draw_buffers (which sets the necessary flags in radeon->NewGLState) and revalidating if NewGLState is non-zero in r200TclPrimitive. This fixes an assert in libdrm (the color-/ depthbuffer was changed but not yet validated) and and stops the kernel cs checker from complaining about them (when they're too small). Thanks to Mario Kleiner for the hint to call radeon_draw_buffer (instead of my half-broken hack). v2: Also fix the swtcl r200 path. Cc: Mario Kleiner <mario.kleiner@tuebingen.mpg.de> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
2010-10-11i965: Compute to MRF in the new FS backend.Eric Anholt
This didn't produce a statistically significant performance difference in my demo (n=4) or nexuiz (n=3), but it still seems like a good idea and is recommended by the HW team.
2010-10-11i965: Give the FB write and texture opcodes the info on base MRF, like math.Eric Anholt
2010-10-11i965: Give the math opcodes information on base mrf/mrf len.Eric Anholt
This is progress towards enabling a compute-to-MRF pass.
2010-10-11i965: Move FS backend structures to a header.Eric Anholt
It's time to start splitting some of this up.
2010-10-11i965: Reduce register interference checks for changed FS_OPCODE_DISCARD.Eric Anholt
While I don't know of any performance changes from this (once extra reg available out of 128), it makes the generated asm a lot cleaner looking.
2010-10-11i965: Split FS_OPCODE_DISCARD into two steps.Eric Anholt
Having the single opcode write then read the reg meant that single instruction opcodes had to consider their source regs to interfere with their dest regs.
2010-10-11llvmpipe: Use lp_tgsi_info.José Fonseca
2010-10-11gallivm: More detailed analysis of tgsi shaders.José Fonseca
To allow more optimizations, in particular for direct textures.
2010-10-11tgsi: Export some names for some tgsi enums.José Fonseca
Useful to give human legible names in other cases.
2010-10-11gallium: Define C99 restrict keyword where absent.José Fonseca
2010-10-11gallivm: Eliminate unsigned integer arithmetic from texture coordinates.José Fonseca
SSE support for 32bit and 16bit unsigned arithmetic is not complete, and can easily result in inefficient code. In most cases signed/unsigned doesn't make a difference, such as for integer texture coordinates. So remove uint_coord_type and uint_coord_bld to avoid inefficient operations to sneak in the future.
2010-10-11llvmpipe: Remove outdated comment about stencil testing.José Fonseca
2010-10-11r600g: don't run with scissors.Dave Airlie
This could probably be done much nicer, I've spent a day chasing a coherency problem in the kernel, that turned out to be incorrect scissor setup.
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