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largely a merge of the previously discussed origin/gallium-resource-sampling
but updated.
the idea is to allow arbitrary binding of resources, the way opencl, new gl
versions and dx10+ require, i.e.
DCL RES[0], 2D, FLOAT
LOAD DST[0], SRC[0], RES[0]
SAMPLE DST[0], SRC[0], RES[0], SAMP[0]
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This fixes piglit/glsl-vs-main-return and glsl-fs-main-return for the drivers
which don't support RET (i915g, r300g, r600g, svga).
ir_to_mesa does not currently generate subroutines, but it's a matter of time
till it's added. It would then break all the drivers which don't implement
them, so this CAP makes sense.
Signed-off-by: Marek Olšák <maraeo@gmail.com>
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Changes in v3:
- Also change trace, which I forgot about
Changes in v2:
- No longer adds tessellation shaders
Currently each shader cap has FS and VS versions.
However, we want a version of them for geometry, tessellation control,
and tessellation evaluation shaders, and want to be able to easily
query a given cap type for a given shader stage.
Since having 5 duplicates of each shader cap is unmanageable, add
a new get_shader_param function that takes both a shader cap from a
new enum and a shader stage.
Drivers with non-unified shaders will first switch on the shader
and, within each case, switch on the cap.
Drivers with unified shaders instead first check whether the shader
is supported, and then switch on the cap.
MAX_CONST_BUFFERS is now per-stage.
The geometry shader cap is removed in favor of checking whether the
limit of geometry shader instructions is greater than 0, which is also
used for tessellation shaders.
WARNING: all drivers changed and compiled but only nvfx tested
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Plumb the constant buffer sizes down into the tgsi interpreter where
we can do bounds checking. Optional debug code warns upon out-of-bounds
reading. Plus add a few other assertions in the TGSI interpreter.
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like normal temporaries, but allows to define a number of distinct
arrays, all of which make it explicit that they contain /indexable/
registers.
as a side-effect we're adding support for multi-dimensional destination
registers.
The whole thing looks like this:
DCL TEMPX[0][0..128] # 0 array with 128 registers
ADD TEMPX[0][0], IN[0], IMM[0]
ADD TEMPX[0][1], IN[0], IMM[0]
ABS OUT[0], TEMPX[0][TEMP[0]]
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allows one to specify a safe (bound checked) array
filled with immediates. it works just like a const
array and declares much like our current immediates.
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It was only used for D3D's REP/END/BGNFOR/ENDFOR. D3D's aL register is
just like another address register now.
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sampler.
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Provide reference implementation of them in tgsi_exec.
Note that BREAK opcode is overloaded and can be used to break out
of either a loop or a switch-case statement.
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This fixes some issues when "return"ing from nested loops/conditionals.
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Manual merge of ureg changes on the branch. Too much unrelated stuff
for a proper merge.
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SOA dependencies can happen when a register is used both as a source and
destination and the source is swizzled. For example:
MOV T, T.yxwz; would expand into:
MOV t0, t1;
MOV t1, t0;
MOV t2, t3;
MOV t3, t2;
The second instruction will produce the wrong result since we wrote to t0
in the first instruction. We need to use an intermediate temporary to fix
this.
This will take more work to fix for all TGSI instructions. This seems to
happen with MOV instructions more than anything else so fix that case now
and warn on others.
Fixes piglit glsl-vs-loop test (when not using SSE). See bug 23317.
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Can now guarantee alignment in the initial allocation of the tgsi exec machine.
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A lot of draw code no longer needs to see this header.
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Explictly pass src and dst arguments (previously dst argument was also
being used as a src). Separate argument handling from the rest of
the function call emit.
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Centralize the creation, initialization and destruction of this struct.
Use align_malloc instead of home-brew alternatives.
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Use tgsi_sampler struct as a base class. Softpipe subclasses it and adds
the fields it needs.
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