Age | Commit message (Collapse) | Author | |
---|---|---|---|
2008-11-26 | tgsi: Implement OPCODE_SSG/SGN. | Michal Krol | |
2008-11-26 | tgsi: Implement OPCODE_ARR. | Michal Krol | |
2008-11-26 | tgsi: Implement OPCODE_ROUND for SSE2 backend. | Michal Krol | |
2008-11-25 | gallium: added centroid/invarient fields to declarations | Brian Paul | |
2008-11-24 | tgsi: add tgsi_declaration fields for centroid sampling, invariant optimization | Brian Paul | |
2008-11-23 | softpipe: remove old/unneeded dependencies between TGSI exec and softpipe | Brian | |
Use tgsi_sampler struct as a base class. Softpipe subclasses it and adds the fields it needs. | |||
2008-11-18 | tgsi: Return 0.0 for negative constant register indices. | Michal Krol | |
2008-11-18 | tgsi: Keep address register as a floating point. | Michal Krol | |
2008-11-12 | tgsi: More comments on source register indirect and 2D indexing. | Michal Krol | |
2008-11-12 | tgsi: Fix a bug with saving/restoring xmm registers upon func call. | Michal Krol | |
2008-11-09 | gallium: use PIPE_ARCH_SSE to protect use of SSE instrinsics only | Brian | |
This allows us to use SSE codegen with debug builds again. When PIPE_ARCH_SSE is set (w/ gcc -msse -msse2) we will also use the gcc SSE intrinsic functions. | |||
2008-11-08 | gallium: implement SSE codegen for TGSI_OPCODE_NRM/NRM4 | Brian | |
2008-11-07 | gallium: added SSE for DP2, DP2A | Brian Paul | |
2008-11-07 | gallium: implement TGSI_OPCODE_DP2A, add sqrt to NRM3/NRM4 | Brian Paul | |
2008-11-07 | Merge commit 'origin/gallium-0.1' into gallium-0.2 | Brian Paul | |
2008-11-06 | gallium: implement TGSI_OPCODE_NRM/NRM4 in tgsi_exec.c | Brian | |
2008-11-06 | Merge commit 'origin/gallium-0.1' into gallium-0.2 | Brian Paul | |
2008-11-05 | gallium: check execution mask in indirect register loads | Brian | |
Zero-out the index for disabled execution channels to avoid using potential garbage values (thus avoiding bad array indexing). | |||
2008-11-05 | gallium: don't range check tgsi register index for indirect accesses | Brian | |
Fixes progs/vp/arl.txt test. | |||
2008-11-05 | Merge commit 'origin/gallium-0.1' into gallium-0.2 | Brian Paul | |
Conflicts: src/gallium/auxiliary/rtasm/rtasm_execmem.c src/mesa/shader/slang/slang_emit.c src/mesa/shader/slang/slang_log.c src/mesa/state_tracker/st_atom_framebuffer.c | |||
2008-11-05 | gallium: call tgsi_set_exec_mask() and use exec mask in SSE ARL code | Brian Paul | |
This prevents vertex shaders from referencing invalid memory locations when the shader is operating on less than four vertices or fragments. | |||
2008-11-05 | gallium: added tgsi_set_exec_mask() | Brian Paul | |
2008-11-05 | gallium: added some sanity check assertions for constant buffer indexing | Brian Paul | |
2008-11-05 | tgsi: Implement OPCODE_TRUNC. | michal | |
2008-11-05 | tgsi: Implement OPCODE_TRUNC. | michal | |
2008-10-29 | gallium: use execmem for PPC code, grow instruction buffer as needed | Brian Paul | |
2008-10-29 | gallium: added PPC support for SWZ, XPD, POW | Brian Paul | |
That's the last of the ARB_v_p opcodes, except for ARL. | |||
2008-10-28 | gallium: ppc: implement TGSI_OPCODE_LOG/EXP | Brian Paul | |
2008-10-28 | gallium: ppc: don't replicate/smear immediate values, use vspltw instruction ↵ | Brian Paul | |
as with constants | |||
2008-10-28 | gallium: use some PPC vec registers to store TGSI temps | Brian Paul | |
This could be a lot better, but already makes for better code. | |||
2008-10-27 | gallium: ppc: emit fewer 'li' instructions prior to vector loads/stores | Brian Paul | |
2008-10-27 | gallium: ppc: use a src register cache to avoid redundant loads | Brian Paul | |
2008-10-23 | scons: ppc support. | Michel Dänzer | |
2008-10-22 | gallium: PPC: clamp y to [-128,128] for LIT | Brian Paul | |
2008-10-22 | gallium: remove ppc_vload_float(), rename ppc_vecmove() -> ppc_vmove(). | Brian Paul | |
2008-10-22 | gallium: new PPC built-in constants array | Brian Paul | |
It's hard to form PPC vector immediates so load them from an array. | |||
2008-10-22 | gallium: GALLIUM_NOPPC debug var to disable PPC codegen | Brian Paul | |
2008-10-22 | gallium: PPC LIT instruction (not quite complete yet) | Brian Paul | |
2008-10-22 | gallium: var renaming in tgsi_ppc.c | Brian Paul | |
2008-10-22 | gallium: remove SSE remnants from tgsi_ppc.c | Brian Paul | |
2008-10-22 | cell: TGSI->PPC for RSQ, RCP and src register sign modes | Brian Paul | |
2008-10-22 | gallium: TGSI->PPC inequality operators | Brian Paul | |
2008-10-22 | gallium: fix broken TGSI_FILE_CONSTANT case, use ppc_reserver_register() | Brian Paul | |
2008-10-22 | gallium: TGSI to PPC code generation | Brian Paul | |
Based on the TGSIto SSE2 code generator. Incomplete and lots of SSE stuff still hanging around but the basic dozen or so TGSI opcodes are functioning. | |||
2008-10-07 | gallium: Introduce PIPE_ARCH_SSE define for SSE support. | José Fonseca | |
Besides meaning x86 and x86-64 architecture, it also depends on SSE2 support enabled on gcc. This fixes the linux-debug build. | |||
2008-10-01 | tgsi: Include p_config.h. | José Fonseca | |
2008-09-30 | cell: Moved X86 checks to wrap #include section so that Cell targets will ↵ | Jonathan White | |
compile again. | |||
2008-09-30 | tgsi: SSE2 optimized exp2, log2 and pow implementations. | José Fonseca | |
Special care must be taken when calling compiler generated SSE2 functions from the runtime generated SSE2: saving the xmm registers, and notify gcc the stack is not 16byte aligned. It would be more efficient to keep the stack pointer 16byte aligned, but too hairy, and not consistent in all x86 architectures. This has been tested in linux x86 and windows x86 userspace. Not tested on x86-64 because it is broken for other reasons (even without this change). | |||
2008-09-18 | Merge commit 'origin/gallium-0.1' into gallium-0.2 | Keith Whitwell | |
Conflicts: src/mesa/shader/slang/slang_link.c | |||
2008-09-18 | tgsi: Build tgsi_text with make | Jakob Bornecrantz | |