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path: root/src/gallium/auxiliary
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2008-10-10gallium: silence warningAlan Hourihane
2008-10-09Gallivm: cleanup soa storage.Stephane Marchesin
2008-10-08cell: implement function calls from shader code. fslight demo runs now.Brian Paul
Used for SIN, COS, EXP2, LOG2, POW instructions. TEX next. Fixed some bugs in MIN, MAX, DP3, DP4, DPH instructions. In rtasm code: Special-case spe_lqd(), spe_stqd() functions so they take byte offsets but low-order 4 bits are shifted out. This makes things consistant with SPU assembly language conventions. Added spe_get_registers_used() function.
2008-10-08gallium: asst. clean-upsBrian Paul
Don't use register qualifier. Doxygen-ize comments. Remove 'extern'.
2008-10-08gallium: better instruction printing for SPE codeBrian Paul
2008-10-07Gallivm: reorder the functions alphabetically so I can work on it.Stephane Marchesin
2008-10-07gallium: added general-purpose key->data map/lookup containerBrian Paul
2008-10-07Gallivm: don't say hello, it's rude.Stephane Marchesin
2008-10-07Merge branch 'gallium-0.2' of ↵Stephane Marchesin
git+ssh://marcheu@git.freedesktop.org/git/mesa/mesa into gallium-0.2
2008-10-07Gallivm: fix the constant layout, this gets a bunch of progs/ working. ↵Stephane Marchesin
Notably, gears doesn't.
2008-10-07gallium: Introduce PIPE_ARCH_SSE define for SSE support.José Fonseca
Besides meaning x86 and x86-64 architecture, it also depends on SSE2 support enabled on gcc. This fixes the linux-debug build.
2008-10-03CELL: changes to generate SPU code for stencilingRobert Ellison
This set of code changes are for stencil code generation support. Both one-sided and two-sided stenciling are supported. In addition to the raw code generation changes, these changes had to be made elsewhere in the system: - Added new "register set" feature to the SPE assembly generation. A "register set" is a way to allocate multiple registers and free them all at the same time, delegating register allocation management to the spe_function unit. It's quite useful in complex register allocation schemes (like stenciling). - Added and improved SPE macro calculations. These are operations between registers and unsigned integer immediates. In many cases, the calculation can be performed with a single instruction; the macros will generate the single instruction if possible, or generate a register load and register-to-register operation if not. These macro functions are: spe_load_uint() (which has new ways to load a value in a single instruction), spe_and_uint(), spe_xor_uint(), spe_compare_equal_uint(), and spe_compare_greater_uint(). - Added facing to fragment generation. While rendering, the rasterizer needs to be able to determine front- and back-facing fragments, in order to correctly apply two-sided stencil. That requires these changes: - Added front_winding field to the cell_command_render block, so that the state tracker could communicate to the rasterizer what it considered to be the front-facing direction. - Added fragment facing as an input to the fragment function. - Calculated facing is passed during emit_quad().
2008-10-02draw: modify prefetching slightlyKeith Whitwell
2008-10-02draw: don't keep refetching constant inputsKeith Whitwell
2008-10-02rtasm: add prefetch instructionsKeith Whitwell
2008-10-02draw: add streamlined paths for fetching linear vertsKeith Whitwell
2008-10-02Gallivm: add slt. glxgears should be running, except it isn't.Stephane Marchesin
2008-10-02Gallivm: port to llvm 2.4.Stephane Marchesin
2008-10-02Gallivm: fix off-by-one.Stephane Marchesin
2008-10-02Gallivm: more instructions.Stephane Marchesin
2008-10-02Gallivm: make it compile again, add some opcodes.Stephane Marchesin
2008-10-01util: No-op u_sse.h outside PIPE_ARCH_X86/X86_64.José Fonseca
2008-10-01tgsi: Include p_config.h.José Fonseca
2008-09-30cell: Moved X86 checks to wrap #include section so that Cell targets will ↵Jonathan White
compile again.
2008-10-01util: Fix util_fast_pow/exp2/log2.José Fonseca
- Use a lookup table for log2. - Compute (float) (1 << ipart) by tweaking with the exponent directly to avoid integer overflow and float conversion. - Also table negative exponents to avoid float division and branching. - Implement util_fast_exp as function of util_fast_exp2.
2008-09-30tgsi: SSE2 optimized exp2, log2 and pow implementations.José Fonseca
Special care must be taken when calling compiler generated SSE2 functions from the runtime generated SSE2: saving the xmm registers, and notify gcc the stack is not 16byte aligned. It would be more efficient to keep the stack pointer 16byte aligned, but too hairy, and not consistent in all x86 architectures. This has been tested in linux x86 and windows x86 userspace. Not tested on x86-64 because it is broken for other reasons (even without this change).
2008-09-30util: Header for SSE2 intrinsics portability.José Fonseca
2008-09-29rtasm: Implement immediate group 1 instructions. Fix SIB emition.José Fonseca
2008-09-26gallium: SPU register commentsBrian Paul
2008-09-26util: Update fast_log2 article url.José Fonseca
2008-09-24add cso_hash_contains() functionAlan Hourihane
2008-09-23CELL: improve legibility of CELL_DEBUG environment variable outputRobert Ellison
2008-09-19cell: use different opcodes for spe_move() depending on even/odd addressBrian Paul
2008-09-19gallium: added spe_code_size()Brian Paul
2008-09-19cell: change spe_complement() to take a src and dst reg, like other instructionsBrian Paul
2008-09-19Merge branch 'gallium-0.2' of ssh+git://git.freedesktop.org/git/mesa/mesa ↵José Fonseca
into gallium-0.2
2008-09-19util: Use OpenGL rasterization rules in blits and mipmap generation.José Fonseca
2008-09-19CELL: add codegen for logic op, color maskRobert Ellison
- rtasm_ppc_spe.c, rtasm_ppc_spe.h: added a new macro function "spe_load_uint" for loading and splatting unsigned integers in a register; it will use "ila" for values 18 bits or less, "ilh" for word values that are symmetric across halfwords, "ilhu" for values that have zeroes in their bottom halfwords, or "ilhu" followed by "iohl" for general 32-bit values. Of the 15 color masks of interest, 4 are 18 bits or less, 2 are symmetric across halfwords, 3 are zero in the bottom halfword, and 6 require two instructions to load. - cell_gen_fragment.c: added full codegen for logic op and color mask.
2008-09-18Merge commit 'origin/gallium-0.1' into gallium-0.2Keith Whitwell
Conflicts: src/mesa/shader/slang/slang_link.c
2008-09-18tgsi: Build tgsi_text with makeJakob Bornecrantz
2008-09-18util: A few more memory debugging checks.José Fonseca
2008-09-18util: Add missing p_debug.h include.José Fonseca
2008-09-18gallium: fix surface object memory leak in cso moduleBrian Paul
2008-09-18tgsi: Make tgsi dumps look more like mesa shader dumps.Jakob Bornecrantz
2008-09-18CELL: finish fragment ops blending (except for unusual D3D modes)Robert Ellison
- Added new "macro" functions spe_float_min() and spe_float_max() to rtasm_ppc_spe.{ch}. These emit instructions that cause the minimum or maximum of each element in a vector of floats to be saved in the destination register. - Major changes to cell_gen_fragment.c to implement all the blending modes (except for the mysterious D3D-based PIPE_BLENDFACTOR_SRC1_COLOR, PIPE_BLENDFACTOR_SRC1_ALPHA, PIPE_BLENDFACTOR_INV_SRC1_COLOR, and PIPE_BLENDFACTOR_INV_SRC1_ALPHA). - Some revamping of code in cell_gen_fragment.c: use the new spe_float_min() and spe_float_max() functions (instead of expanding these calculations inline via macros); create and use an inline utility function for handling "optional" register allocation (for the {1,1,1,1} vector, and the blend color vectors) instead of expanding with macros; use the Float Multiply and Subtract (fnms) instruction to simplify and optimize many blending calculations.
2008-09-18pipebuffer: New callback to flush all temporary-held buffers.José Fonseca
Used mostly to aid debugging memory issues or to clean up resources when the drivers are long lived.
2008-09-17gallium: fix wide point / point coord semantic info (generic, not fog)Brian Paul
2008-09-17gallium: fix tgsi sanity checker with respect to END.Brian Paul
Subroutine code may be found after the END instruction so it's not always the last instruction. At least check for presence of exactly one END instruction though.
2008-09-17gallium: fix lack of surface reference counting in ↵Brian Paul
cso_set/save/restore_framebuffer() Fixes asst problems with FBO / render to texture.
2008-09-16gallium: fix info entries for KIL, KILPBrian Paul
KIL takes 1 src register. KILP uses no registers (uses cond codes).