Age | Commit message (Collapse) | Author |
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TGSI shaders are translated into SPE instructions which are then sent to
the SPEs for execution. Only a few opcodes work, no swizzling yet, no
support for constants/immediates, etc.
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Do code generation for alpha test, z test, stencil, blend, colormask
and framebuffer/tile read/write as a single code block.
Ian's previous blend/z/stencil test code is still there but mostly disabled
and will be removed soon.
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Options so far:
"checker" module tile clear color by SPU ID to see where the tiles are
"sync" to do synchronous DMA (only partially implemented)
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Also, rename p_tile.[ch] to u_tile.[ch]
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This also implements code-gen for the float-to-packed color
conversion. It's currently hardcoded for A8R8G8B8, but that can
easily be fixed as soon as other color depths are supported by the
Cell driver.
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So far this is only tested when GL_BLEND is disabled.
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Alpha test is currently broken because all per-fragment testing occurs
before alpha is calculated.
Stencil test is currently broken because the Z-clear code asserts if
there is a stencil buffer.
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If a structure is marked as being aligned the SPE compiler performs
extra optimizations (sadly, only -O2 is used) when reading the
structure. Since most of the structures sent in batch buffers are
only 8-byte aligned, this resulted in mysterous bugs with -O2.
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Doubles are still unsupported.
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This is in a separate commit to ensure renames are properly preserved.
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