Age | Commit message (Collapse) | Author |
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Simple function call works now, but we don't save/restore the caller's registers yet.
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Will be used for instructions like SIN/COS/POW/TEX/etc. The PPU needs to
know the address of some functions in the SPU address space. Send that
info to the PPU/main memory rather than patch up shaders on the SPU side.
Not finished/tested yet...
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The colormask code generation had assumed that its input packed pixels were
in RGBA format. In fact, the format they're in is dependent on the
pipe color format.
Now the color format is passed in to gen_colormask(), and proper
color format-dependent SPU code is generated.
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for TGSI instructions. The logic should operate on the origin channel not the swizzled channel.
Please enter the commit message for your changes.
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softpipe. Optimized FLR and FRC. Fixed writeback logic for DP3, DP4 and DPH.
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softpipe: MOV, ADD, MUL, SGE, SUB, MAD, ABS, SLT, MIN, MAX, LRP, DP3, DP4, CMP, FLR
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Also: improve float/int Z conversion.
Use clgt instead of cgt in depth test since we're comparing unsigned values.
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- rtasm_ppc_spe.c, rtasm_ppc_spe.h: added a new macro function
"spe_load_uint" for loading and splatting unsigned integers
in a register; it will use "ila" for values 18 bits or less,
"ilh" for word values that are symmetric across halfwords,
"ilhu" for values that have zeroes in their bottom halfwords,
or "ilhu" followed by "iohl" for general 32-bit values.
Of the 15 color masks of interest, 4 are 18 bits or less,
2 are symmetric across halfwords, 3 are zero in the bottom
halfword, and 6 require two instructions to load.
- cell_gen_fragment.c: added full codegen for logic op and
color mask.
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- Added new "macro" functions spe_float_min() and spe_float_max()
to rtasm_ppc_spe.{ch}. These emit instructions that cause
the minimum or maximum of each element in a vector of floats
to be saved in the destination register.
- Major changes to cell_gen_fragment.c to implement all the blending
modes (except for the mysterious D3D-based PIPE_BLENDFACTOR_SRC1_COLOR,
PIPE_BLENDFACTOR_SRC1_ALPHA, PIPE_BLENDFACTOR_INV_SRC1_COLOR, and
PIPE_BLENDFACTOR_INV_SRC1_ALPHA).
- Some revamping of code in cell_gen_fragment.c: use the new spe_float_min()
and spe_float_max() functions (instead of expanding these calculations
inline via macros); create and use an inline utility function for handling
"optional" register allocation (for the {1,1,1,1} vector, and the
blend color vectors) instead of expanding with macros; use the Float
Multiply and Subtract (fnms) instruction to simplify and optimize many
blending calculations.
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- Added two new debug flags (to be used with the CELL_DEBUG environment
variable). The first, "CELL_DEBUG=fragops", activates SPE fragment
ops debug messages. The second, "CELL_DEBUG=fragopfallback", will
eventually be used to disable the use of generated SPE code for
fragment ops in favor of the default fallback reference routine.
(During development, though, the parity of this flag is reversed:
all users will get the reference code *unless* CELL_DEBUG=fragopfallback
is set. This will prevent hiccups in code generation from affecting
the other developers.)
- Formalized debug message usage and macros in spu/spu_main.c.
- Added lots of new code to ppu/cell_gen_fragment.c to extend the
number of supported source RGB factors from 4 to 15, and to
complete the list of supported blend equations.
More coming, to complete the source and destination RGB and alpha
factors, and to complete the rest of the fragment operations...
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Please enter the commit message for your changes.
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Only one level of if/else/endif nesting is currently working.
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TGSI shaders are translated into SPE instructions which are then sent to
the SPEs for execution. Only a few opcodes work, no swizzling yet, no
support for constants/immediates, etc.
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Do code generation for alpha test, z test, stencil, blend, colormask
and framebuffer/tile read/write as a single code block.
Ian's previous blend/z/stencil test code is still there but mostly disabled
and will be removed soon.
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