Age | Commit message (Collapse) | Author |
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- This fixes neverball corruption.
- I'm unsure about what we're actually flushing here.
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It's the front stencil methods that have contiguous offsets,
not the back ones.
Unfortunately the names in the header still have FRONT/BACK
reversed, so I'm using hex values until it gets updated.
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- We cannot assume all state objects are present when the pipe context changes.
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The TEX instruction is passed the first index of a contiguous
range of 4 TEMP registers that contain coordinates / LOD and,
after execution, the texel values.
It seems the first index is required to be a multiple of 4 on
some (older ?) cards.
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The hardware expects a texture's tile mode to change with
the mipmap level.
Also, only multiply by block size once to obtain size.
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Since we don't turn off scissors, we need to update the
stateobj when the framebuffer size changes.
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Now that we know how to make the hardware have y-coordinate origin
top, we can get rid of all the inversion introduced earlier.
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What was Z24S8 before is actually S8Z24, and what we had for Z16
is actually X8Z24. Now, we also have the REAL Z24S8 and I added
Z32_FLOAT as well; most of the formats need different tile_flags.
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NOTE: we must not try to emit buffer relocations when
vtxbuf_nr is 0 but vtxelt_nr is not
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Red and blue were interchanged in TIC.
Add border color and some formats.
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The translation also needs to be inverted, and in bypass mode
the state tracker incorrectly assumes that Y = 0 = TOP, so we
need inversion there to; NDC clipping has to be deactivated
explicitly.
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Remove the need to have a pointer in this struct by just including
the immediate data inline. Having a pointer in the struct introduces
complications like needing to alloc/free the data pointed to, uncertainty
about who owns the data, etc. There doesn't seem to be a need for it,
and it is unlikely to make much difference plus or minus to performance.
Added some asserts as we now will trip up on immediates with more
than four elements. There were actually already quite a few such asserts,
but the >4 case could be used in the future to specify indexable immediate
ranges, such as lookup tables.
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default extension list
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libdrm_nouveau is linked with the winsys, there's no good reason to do all
this through yet another layer.
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This makes some code cleaner, and we can now easily
do CEIL and TRUNC.
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For TXP we need to divide texture coords by their w component, or
use the coords' 1/w in the perspective interpolation instruction.
This also tries to support 1D, 3D and CUBE textures, and lets the
instruction only load the components that are used.
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Use different buffers for immds, FP params, and VP params.
One has to map constant buffer indices in shader code to buffers
defined via CB_DEF. In principle, we could use more buffers so
we'd have to change the shader code less frequently.
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Since we stopped using alloc_temp to get hw indices for FP attrs
there shouldn't be any non-deallocated temps left.
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Since we know when we don't use a TEMP or FP ATTR register anymore,
we can release their hw resources early.
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Immediates are inlined now where possible, so we need to set
pc->allow32 to FALSE in LIT where we have the conditional MOV,
since immediates swallow the predicate bits.
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I chose to just convert unpaired 32 bit length instructions
after parsing all instructions, although it might be possible
to determine beforehand whether there would be any lone ones,
and then even do some swapping to bring them together ...
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This would have happened in p.e. ADD TEMP[0], TEMP[0].xyxy, TEMP[1]
or RCP/RSQ TEMP[i], TEMP[i].
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