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If you e.g. only need alpha, it ends up in the first reg,
not the last, as it would when reading rgb too.
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Until now, only primitives wholly outside the view volume
were not drawn.
This was only visibile when using a viewport smaller than
the window size, naturally.
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Separated the integer rounding mode flag for cvt.
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There's a good chance a loop won't execute correctly
though since our TEMP allocation assumes programs to
be executed linearly. Will fix later.
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No longer used. S3TC support is queried via
pipe_screen::is_format_supported.
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- And reduce RING_SPACE to 2, instead of 3.
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When swapping sources 0 and 1, EQ of course does *not*
become NE, etc.
Introduced in 2b963f5c723401aa2646bd48eefe065cd335e280.
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Allocation is unnecessary since all uniforms are
uploaded on every constant buffer change anyway.
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This moves construction of the mapping between VP outputs
and FP inputs into validation.
The map also contains slots for special outputs like clip
distance and point size, so we need to at least merge the
VP related and FP related parts on validation if we want
to support those.
Now we match every single FP input component with results
from the VP and leave those not read out of the map, or
replace those not written by 0 (xyz) or 1 (w).
The bitmap indicating linear interpolants is also filled,
and flat FP inputs are mapped in only after non-flat ones,
as is required.
Furthermore, we can save some space by only fetching VP
attrs we actually use, and avoid wasting any output regs
because of TGSI using less than 4 components.
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Make use of tgsi_shader_info to determine how many nv50_regs we
need to allocate, whether program uses KIL, or writes DEPR.
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Makes some opcode cases nicer and might reduce the total
nr of TEMPs required, or save some MOVs.
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We're going to try to reorder the scalar ops of a vector instr
to accomodate swizzles that would otherwise require us to emit
to an additional TEMP first (like MOV R0.xy, R0.zx).
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Extend its usage to avoiding e.g. emission of negation
instructions in tx_insn for sources we don't need.
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Before this, just the perspective divide bit was moved in
convert_to_long of the load interpolant instruction.
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The VTX_ATTR_3/2/1F methods also had size 4 ...
a stupid copy/paste error.
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We've been emitting the same two indices over and over
without incrementing map.
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The winsys once again has to know about textures it seems, so we need a
common representation between all our pipe drivers to store some
information the winsys will need.
Only the nv50 driver has been fixed so far.
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- This fixes neverball corruption.
- I'm unsure about what we're actually flushing here.
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It's the front stencil methods that have contiguous offsets,
not the back ones.
Unfortunately the names in the header still have FRONT/BACK
reversed, so I'm using hex values until it gets updated.
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- We cannot assume all state objects are present when the pipe context changes.
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The TEX instruction is passed the first index of a contiguous
range of 4 TEMP registers that contain coordinates / LOD and,
after execution, the texel values.
It seems the first index is required to be a multiple of 4 on
some (older ?) cards.
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The hardware expects a texture's tile mode to change with
the mipmap level.
Also, only multiply by block size once to obtain size.
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Since we don't turn off scissors, we need to update the
stateobj when the framebuffer size changes.
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Now that we know how to make the hardware have y-coordinate origin
top, we can get rid of all the inversion introduced earlier.
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What was Z24S8 before is actually S8Z24, and what we had for Z16
is actually X8Z24. Now, we also have the REAL Z24S8 and I added
Z32_FLOAT as well; most of the formats need different tile_flags.
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NOTE: we must not try to emit buffer relocations when
vtxbuf_nr is 0 but vtxelt_nr is not
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