Age | Commit message (Collapse) | Author |
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Need to move rs_block to this, too.
Also, I'm getting massive amounts of flicker for some reason; I bet we've gotta
re-re-examine PSC and friends. :C
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multitexarray works on my r300, but texrect doesn't.
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It may seem pointless, but this avoids a fair amount of predicted CSO pain.
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This should be handled in the emit fine
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Add support for begin/end in each CS so we don't get any other
processes rendering in between.
TODO:
blame other parts of driver for this not working like Z.
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This means we don't emit in the begin query but when we have
to flush. Similiar to classic.
TODO:
make query object actually work.
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1: add rv530 support
- num z pipes cap
- add proper start/finish query options for rv530
2: convert to use linked list properly.
3: add flushing required check.
4: initial Z top disabling support.
TODO:
make it actually work on my rv530.
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This attempts to make r300g do proper bo space checking as opposed
to whatever it was doing now.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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to reproduce, start texrect, disable 0 texture in menu.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Individual texture images have a stride, but textures as a whole do not.
There are still pieces of code which are confused about this, but the core of
the confusion is hopefully gone.
Signed-off-by: Nicolai Hähnle <nhaehnle@gmail.com>
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Seriously guys....
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So that debugging is no longer a full-spam-or-nothing approach, you are now
supposed to set the RADEON_DEBUG environment flag just like for classic Mesa.
The available debug flags are different, however. Just running an OpenGL
application with RADEON_DEBUG set to an arbitrary string will print out
helpful information.
Everything must be compiled with -DDEBUG for any of this to work
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Still broken, but compiles cleaner, behaves better, etc.
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Fixes CS failures with tiling enabled kernels.
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This is entirely untested on R500, and needs more testing on R300.
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Something called "validate" should return FALSE on failure, not TRUE.
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They have to cross into each other's registers.
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Will fix with better constant refactoring later.
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Appart from separating r3xx/r5xx fragment shaders, a more consistent
naming scheme has been applied. From now on:
r300 = all chips
r3xx = R300/R400 only
r5xx = R500 only
This way r300_fragment_shader is the master struct, and the structs
r3xx_fragment_shader and r5xx_fragment_shader inherits it.
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Um. So, yeah. Two massive WTF moments here. The first one is that, somehow,
I never actually hooked up vertex shader emission, so the only time that the
VAP gets set up is during surface_copy/surface_fill. That's why acidgears
was happening.
The second one is that, somehow, once I actually hooked it up, glxgears just
magically worked. Without any actual, real testing, I somehow accidentally
made the shader compiler work. Go figure.
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SW TCL: tri-clip works, tri-userclip works
HW TCL: tri-clip fails, tri-userclip works
That is a 200% improvement over the previous situation. Woot.
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Makes tri-userclip work with HW TCL.
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Trivial but annoying.
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On a side note, why is RADEON_MAX_BOS 24? Should ask airlied about that.
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This makes glxgears draw properly with SW TCL.
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Those parts are nearly solid compared to the shaders.
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BEGIN/END_CS pair, a few asserts, and a slightly more correct VTE setup.
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Boy, is my face red. :C
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Still broken...
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It is no longer optional in current libdrm, so it was time to actually
start counting our BOs.
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Signed-off-by: Corbin Simpson <MostAwesomeDude@gmail.com>
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This fixes some warnings which appear because the driver assumes a wrong
cs size (13 vs 16 register writes in some cases).
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