Age | Commit message (Collapse) | Author |
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Avoid using r600_screen structure to get ptr to radeon
winsys structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
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this is ported from r600c mostly, bank swizzling is real messy and I don't think
I got enough sleep last night to fully understand it.
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DX9 constants were in the constant file, and evergreen no longer support
cfile. r600/700 can also use constants in memory buffers, so add the code
(disabled for now) to enable that as precursor for evergreen.
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passes another ~20 piglits.
/me starts to run out low hanging fruit around now.
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Adds BGNLOOP, BRK, CONT, ENDLOOP support, ported from r600c.
17 piglits more on r300g.tests.
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this adds handling for some more CF instructions and conditions
also adds parameter for stack size emission
These seem to pass on VS with the stack size hack but not on FS,
TODO: fix FS + stack size calcs
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Make sure LIT fills all slot for instruction (can't do W instruction
without having the Z slot filled with at least a NOP).
ALU instruction can't access more than 4 constant, move constant to
temporary reg if we reach the limit.
Fix ALU block splitting, only split ALU after ALU with last instruction
bit sets.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This add texture support to the assembler, generated code is
wrong (tested against working dump).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Writing a compiler is time consuming and error prone in
order to allow r600g to further progress in the meantime
i wrote a simple tgsi assembler, it does stupid thing but
i would rather keep the code simple than having people
trying to optimize code it does.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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