Age | Commit message (Collapse) | Author |
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This configure some of the value properly based on
asic so others asic than RV710 works too.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Disable rendering to avoid GPU lockup.
Use radeondb to debug shader compiler :
radeondb -c gallium.bof
radeondb -s gallium.json
Will print shader generated, best is to use fp demos to test
the compiler.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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- enabled flushing a buffer more than once
- enabled the blitter for r600_clear
- added some more colors to r600_is_format_supported (copied from r600_conv_pipe_format)
- r600_set_framebuffer_state now sets rctx->fb_state
- more states are saved before a blit (had to add some accounting for the viewport and the vertex elements state)
- fixed a few errors with reference counting
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Change the way we translate from c_compiler to the
asic specific representation. Should make things
simpler.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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- Wrapped the buffer and texture create/destroy/transfer/... functions
using u_resource, which is then used to implement the resource functions.
- Implemented texture transfers.
I left the buffer and texture transfers separate because one day we'll
need a special codepath for textures.
- Added index_bias to the draw_*elements functions.
- Removed nonexistent *REP and *FOR instructions.
- Some pipe formats have changed channel ordering, so I've removed/fixed
nonexistent ones.
- Added stubs for create/set/destroy sampler views.
- Added a naive implementation of vertex elements state (new CSO).
- Reworked {texture,buffer}_{from,to}_handle.
- Reorganized winsys files, removed dri,egl,python directories.
- Added a new build target dri-r600.
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