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path: root/src/gallium/drivers/r600/r600_shader.c
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2011-03-14r600g: Move r600_pipe_shader_ps() to r600_state.c.Henri Verbeet
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
2011-03-14r600g: Move r600_pipe_shader_vs() to r600_state.c.Henri Verbeet
The idea behind this is that anything touching registers should be in r600_state.c or evergreen_state.c. This is also consistent with evergreen_pipe_shader_vs(). Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
2011-03-14r600g: Evergreen add support for log opcode.Rafael Monica
Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
2011-03-13r600g: Only update DB_SHADER_CONTROL once in r600_pipe_shader_ps().Mathias Fröhlich
Avoid setting the same gpu register several times in a r600_pipe_state. Compute the final value of the register and set that one time. This avoids some overhead in r600_context_pipe_state_set(). Signed-off-by: Mathias Fröhlich <Mathias.Froehlich@web.de> Signed-off-by: Henri Verbeet <hverbeet@gmail.com>
2011-03-07r600g: Simplify some swizzle lookups.Henri Verbeet
2011-02-28r600g: indentation fixesJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2011-02-28r600g: implement instanced drawing supportChristian König
2011-02-28Revert "r600g: Don't negate result of ABS instruction"Dave Airlie
This reverts commit b6d40213935da702570eca2c0861bd4b1d7f5254. This actually breaks gears here on my rv670.
2011-02-28r600g: Process TRUNC with tgis_op2Fabian Bieler
TRUNC is neither a scalar instruction nor exclusive to the Trans unit. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-28r600g: Don't negate result of ABS instructionFabian Bieler
Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-24r600g: EXT_texture_array support.Dave Airlie
This adds EXT_texture_array support to r600g, it passes the piglit array-texture test but I suspect may not be complete. It currently requires a kernel patch to fix the CS checker to allow these, so you need to use R600_ARRAY_TEXTURE=true for now to enable them. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-02-07r600g: Add support for relative addressing on constant buffers.Henri Verbeet
Relative addressing of constant buffers can't work properly through the kcache, since you can only address within the currently locked kcache window. Instead, this patch binds the constant buffer as a shader resource, and then explicitly fetches the constant using a vertex fetch with fetch type VTX_FETCH_NO_INDEX_OFFSET from the shader. There's probably still some room for improvement, doing the fetch right before the instruction that needs the value may not be quite optimal for example.
2011-02-07r600g: Split constants in r600_shader_from_tgsi().Henri Verbeet
2011-02-07r600g: Do the tgsi_full_src_register to r600_shader_src conversion in ↵Henri Verbeet
r600_shader_from_tgsi().
2011-02-07r600g: Split r600_bc_alu_src.Henri Verbeet
The r600_bc_alu_src structure is used in two different ways, as a vector and for the individual channels of that same vector. This is somewhat fragile, and probably confusing.
2011-02-07r600g: Store literal values in the r600_bc_alu_src structure.Henri Verbeet
This is much easier to work with, and allows use to get rid of some of the literal handling hacks.
2011-02-07r600g: tgsi_dst() can't fail.Henri Verbeet
2011-02-07r600g: tgsi_src() can't fail.Henri Verbeet
2011-02-03r600g: Make some more things static.Henri Verbeet
2011-02-02r600g: use burst exports in shadersChristian König
Join multiple exports into just one instruction instead of exporting each register separately.
2011-01-31r600g: handle the write all cbufs property.Dave Airlie
This only works on r600/r700 so far, evergreen doesn't appear to have the multiwrite enable bit in the color control, so we may have to actually do a shader rewrite on EG hardware. remove some duplicate code reg defines also. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-19r600g: fix segfault if texture operand is a literalChristian König
This fixes Bug 33262
2011-01-18r600g: Kill trailing whitespace.Henri Verbeet
2011-01-18r600g: Simplify some r600_bc_add_alu_type() calls to r600_bc_add_alu().Henri Verbeet
2011-01-16r600d: fix some bugs added reworking literal handlingChristian König
If a literal slot isn't used it should be set to 0 instead of an uninitialized value. Also the channels for pre R700 trig functions were incorrect. And most important literals were not counted against ndw, resulting in an invalid force_add_cf detection.
2011-01-13r600g: rework literal handlingChristian König
2011-01-12r600g: implement output modifiers and use them to further optimize LRPChristian König
2011-01-12r600g: use special constants for 0, 1, -1, 1.0f, 0.5f etcChristian König
2011-01-12r600g: optimize temp register handling for LRPChristian König
2011-01-12r600g: optimize away CF_INST_POPChristian König
If last instruction is an CF_INST_ALU we don't need to emit an additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
2011-01-12r600g: make dumping of shaders an optionChristian König
2011-01-12r600g: texture instructions also work fine with TGSI_FILE_INPUTChristian König
2011-01-12r600g: DP4 also supports writemaskingChristian König
2011-01-12r600g: Why all this fiddling with tgsi_helper_copy?Christian König
tgsi_helper_copy is used on several occasions to copy a temporary result into the real destination register to emulate writemasks for OP3 and reduction operations. According to R600 ISA that's unnecessary. This patch fixes this use for MAD, CMP and DP4.
2011-01-11r600g: Fixed SIN/COS/SCS for the case where the operand is a literal.Tilman Sauerbeck
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de> Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
2011-01-07r600g: Update some comments for Evergreen.Henri Verbeet
2011-01-07r600g: Split ALU clauses based on used constant cache lines.Henri Verbeet
2010-12-24r600g: hack around property unknown issues.Dave Airlie
should fix https://bugs.freedesktop.org/show_bug.cgi?id=32619 Need to add proper support for properties later. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-12-15r600g: fix pow(0, 0) evaluating to NaNFredrik Höglund
We have to use the non-IEEE compliant version of MUL here, since log2(0) is -inf, and 0 * -inf is NaN in IEEE arithmetic. candidates for 7.10 branch
2010-12-07r600g: remove dead codeJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-12-06r600g: avoid useless shader rebuild at draw callJerome Glisse
Avoid rebuilding constant shader state at each draw call, factor out spi update that might change at each draw call. Best would be to update spi only when revealent states change (likely only flat shading & sprite point). Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-12-06r600g: build fetch shader from vertex elementsJerome Glisse
Vertex elements change are less frequent than draw call, those to avoid rebuilding fetch shader to often build the fetch shader along vertex elements. This also allow to move vertex buffer setup out of draw path and make update to it less frequent. Shader update can still be improved to only update SPI regs (based on some rasterizer state like flat shading or point sprite ...). Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-12-05r600g: Cleanup fetch shader resources in r600_pipe_shader_destroy().Henri Verbeet
2010-12-03r600g: indentation fixJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-12-03r600g: set address of pop instructions to next instructionFabian Bieler
2010-12-03r600g: dump raw shader output for debuggingJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-11-23r600g: Removed duplicated call to tgsi_split_literal_constant().Tilman Sauerbeck
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
2010-11-23r600g: Only compare active vertex elementsMathias Fröhlich
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
2010-11-19r600g: use full range of VS resources for vertex samplersAlex Deucher
Now that we have fetch shaders, the full range of VS resources can be used for sampling.
2010-11-19r600g: use meaningful defines for chiprevAlex Deucher
Makes the code much clearer.
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