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From the r600 ISA:
Each ALU clause can lock up to four sets of constants
into the constant cache. Each set (one cache line) is
16 128-bit constants. These are split into two groups.
Each group can be from a different constant buffer
(out of 16 buffers). Each group of two constants consists
of either [Line] and [Line+1] or [line + loop_ctr]
and [line + loop_ctr +1].
For supporting more than 64 constants, we need to
break the code into multiple ALU clauses based
on what sets of constants are needed in that clause.
Note: This is a candidate for the 7.10 branch.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
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this is ported from r600c mostly, bank swizzling is real messy and I don't think
I got enough sleep last night to fully understand it.
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This splits the r600 opcodes out of the sq file and adds a wrapper
so we can convert to evergreen opcodes later without touching these functions
too much.
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passes another ~20 piglits.
/me starts to run out low hanging fruit around now.
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this adds handling for some more CF instructions and conditions
also adds parameter for stack size emission
These seem to pass on VS with the stack size hack but not on FS,
TODO: fix FS + stack size calcs
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This pretty much ports the code from r600c, however it doesn't
always seem to work quite perfectly, but I can't find anything in this
code that is wrong. I'm guessing either literal input or constants
aren't working always.
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This add texture support to the assembler, generated code is
wrong (tested against working dump).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Writing a compiler is time consuming and error prone in
order to allow r600g to further progress in the meantime
i wrote a simple tgsi assembler, it does stupid thing but
i would rather keep the code simple than having people
trying to optimize code it does.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This configure some of the value properly based on
asic so others asic than RV710 works too.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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