Age | Commit message (Collapse) | Author |
|
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
Discard fractional bits from linewidth. This matches the nvidia
closed drivers, my reading of the OpenGL SI and current llvmpipe
behaviour.
It looks a lot nicer & avoids ugliness where lines alternate between n
and n+1 pixels in width along their length.
Also fix up r600g to match.
|
|
These were previously being left in the default (D3D) mode. This mean
that triangles were drawn slightly incorrectly, but also because this
state is relied on by the u_blitter code, all blits were half a pixel
off.
|
|
Important as more constant buffers per shader start to get used.
Fix up r600 (tested) and nv50 (untested) to cope with this. Drivers
previously didn't see unbinds of constant buffers often or ever, so
this isn't always dealt with cleanly.
For r600 just return and keep the reference. Will try to do better in
a followup change.
|
|
|
|
|
|
Not yet complete.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
|
|
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
no point duplicating code that doesn't touch hw, also make it easier
to spot mistakes
|
|
|
|
we need to know the aligned height when binding the surface to cb/zb,
not the gallium surface height.
|
|
Since the hw transitions from 2D->1D sampling below the 2D macrotile
size we need to keep track of the array mode per level so we can
render to it using the CB.
|
|
|
|
we need to do pretty much what r300g does in for this, this fixes some
issues seen while working on tiling.
|
|
|
|
Tested with demos/pixeltest - line rasterization doesn't seem to be
set up for GL conventions yet, but at least width is respected now.
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
this mirror changes in r300g, bpt is kinda useless when it comes to some
of the non-simple texture formats.
|
|
|
|
also fixup framebuffer state copies to avoid bad state.
|
|
gallium calls them scissors, but r600 hw like r300 is better off using
cliprects to implement them as we can turn them on/off a lot easier.
|
|
fixes https://bugs.freedesktop.org/show_bug.cgi?id=30771
Reported-by: Kevin DeKorte
|
|
This could probably be done much nicer, I've spent a day chasing
a coherency problem in the kernel, that turned out to be incorrect
scissor setup.
|
|
We need to move the texture sampler resources out of the range of the vertex attribs.
We could probably improve this using an allocator but this is the simple answer for now.
makes mesa-demos/src/glsl/vert-tex work.
|
|
we want to use the format from the sampler view which isn't always the
same as the texture format when creating sampler views.
|
|
since we plan on using dx10 constant buffers everywhere.
|
|
Add bo offset everywhere needed if r600_bo is ever a sub bo
of a bigger bo.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
|
|
there are some vertex formats defined in r600c not in the docs.
|
|
These need to be emitted, we also need them to do proper vtx start,
instead of abusing index offset.
|
|
although evergreen can apparantly sample direct from 24-bit,
just make it work with the current method for now.
|
|
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
mainly remove 2 suffix from function names
|
|
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
Lot of clean can now happen.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
This reverts commit 914b669b082258fc05d0fec047b69949d88585c4.
I didn't mean to commit this yet, will redo in new state system once
we clean it up.
|
|
|
|
|
|
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
So texture code can be shared btw new state design
& old one.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
|
|
|
|
we were leaking buffers since the flush code was added, it wasn't dropping references.
move setting up flush to the set_framebuffer_state.
clean up the flush state object.
make more space in the BOs array for flushing.
|
|
this add support for the upload manager for uploading user vbo/index buffers.
this provides a considerable speedup in q3 type games.
|
|
introduce an abstraction layer between kernel bos and the winsys BOs.
this is to allow plugging in pb manager with minimal disruption to pipe driver.
|
|
|
|
|
|
adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
|
|
the DDX and r600c both flush cb/db after the draw is emitted,
as long as they do that, r600g can't be different, as it races.
We end up with r600g flush, set CB, DDX set CB, flush. This
was causing misrendering on my evergreen, where sometimes the drawing
would go to an old CB.
|