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At the moment you need kernel patches to have texture tiling work
with the kernel CS checker, so once they are upstream and the drm version
is bumped we can make this enable flip the other way most likely.
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this sets things up to align stride/height with tile sizes,
it also adds support for the 2D/1D array mode cross over point.
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this is to be used to decide not to tile a surface being used for transfers.
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we need to know the aligned height when binding the surface to cb/zb,
not the gallium surface height.
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Since the hw transitions from 2D->1D sampling below the 2D macrotile
size we need to keep track of the array mode per level so we can
render to it using the CB.
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this adds a new minify function to the driver to ensure this.
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we need to know if the back is tiled so we can blit from it properly.
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this makes readback with tiled back work better.
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this changes size on 32/64 bit so is definitely no what you want to use here.
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fixes segfaults
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this mirror changes in r300g, bpt is kinda useless when it comes to some
of the non-simple texture formats.
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just a cleanup step towards tiling
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these aren't used anywhere, so just waste memory.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Lot of clean can now happen.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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use the blitter + custom stage to avoid doing a whole lot of state
setup by hand. This makes life a lot easier for doing this on evergreen
it also keeps all the state setup in one place.
We setup a custom context state at the start with a flag to denote
its for the flush, when it gets generated we generate the correct state
for the flush and no longer have to do it all by hand.
this should also make adding texture *to* depth easier.
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nothing was every dirtying the object again, the mesa-demos
reflect test was just stalling.
this fixes glean readPixSanity.
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eg seems to have a higher pitch aligmment requirement and uses r700 cube setup
this fixes a couple of piglit tests here.
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This allow to share code path btw old & new, also
remove check on reference this might make things
a little slower but new design doesn't use reference
stuff.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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So texture code can be shared btw new state design
& old one.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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this fixes fbo-cubemap on r700.
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Unless e.g. PB_USAGE_DONTBLOCK or PB_USAGE_UNSYNCHRONIZED would be specified.
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radeon_ws_bo_map() will already take care of that if needed.
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Winsys context build a list of register block a register block is
a set of consecutive register that will be emited together in the
same pm4 packet (the various r600_block* are there to provide basic
grouping that try to take advantage of states that are linked together)
Some consecutive register are emited each in a different block,
for instance the various cb[0-7]_base. At winsys context creation,
the list of block is created & an index into the list of block. So
to find into which block a register is in you simply use the register
offset and lookup the block index. Block are grouped together into
group which are the various pkt3 group of config, context, resource,
Pipe state build a list of register each state want to modify,
beside register value it also give a register mask so only subpart
of a register can be updated by a given pipe state (the oring is
in the winsys) There is no prebuild register list or define for
each pipe state. Once pipe state are built they are bound to
the winsys context.
Each of this functions will go through the list of register and
will find into which block each reg falls and will update the
value of the block with proper masking (vs/ps resource/constant
are specialized variant with somewhat limited capabilities).
Each block modified by r600_context_pipe_state_set* is marked as
dirty and we update a count of dwords needed to emit all dirty
state so far.
r600_context_pipe_state_set* should be call only when pipe context
change some of the state (thus when pipe bind state or set state)
Then to draw primitive you make a call to r600_context_draw
void r600_context_draw(struct r600_context *ctx, struct r600_draw *draw)
It will check if there is enough dwords in current cs buffer and
if not will flush. Once there is enough room it will copy packet
from dirty block and then add the draw packet3 to initiate the draw.
The flush will send the current cs, reset the count of dwords to
0 and remark all states that are enabled as dirty and recompute
the number of dwords needed to send the current context.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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this paves the way for moving to pb bufmgrs now.
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introduce an abstraction layer between kernel bos and the winsys BOs.
this is to allow plugging in pb manager with minimal disruption to pipe driver.
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since the depth blit code is hardcoded hex yay \o/
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This whole set of state just seems wrong, another cut-n-paste nightmare.
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Avoid using r600_screen structure to get ptr to radeon
winsys structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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We would leak bo if the argument check failed.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
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Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Make state statically allocated, this kills a bunch of code
and avoid intensive use of malloc/free. There is still a lot
of useless duplicate function wrapping that can be kill. This
doesn't improve yet performance, needs to avoid memcpy states
in radeon_ctx_set_draw and to avoid rebuilding vs_resources,
dsa, scissor, cb_cntl, ... states at each draw command.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This reverts commit 1fa7245c348cb7aced81f1672140f64cb6450e2f.
Conflicts:
src/gallium/drivers/r600/r600_state.c
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This reverts commit de0b76cab22caa9fc7260f80acb8f151ccced6c5, its pre-computes the texture state wrong,
you can't just use an array of levels, since you can have FBOs to depth texture slices inside a level as well
it would get really messy quickly. Probably need to split commits like this up into pieces for each piece
of state, so we can revert bits easier in case of regressions.
This also break 5 piglit tests, and valgrind starts to warn about invalid read/writes after this.
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