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path: root/src/gallium/drivers/r600
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2011-01-30r600g: rework vertex buffer uploadsMarek Olšák
Only upload the [min_index, max_index] range instead of [0, userbuf_size]. This an important optimization. Framerate in Lightsmark: Before: 22 fps After: 75 fps The same optimization is already in r300g.
2011-01-30r600g: consolidate set_constant_buffer functionsMarek Olšák
2011-01-30r600g: consolidate vertex_buffer_update functionsMarek Olšák
2011-01-30r600g: consolidate draw_vbo functions (v2)Marek Olšák
Added a conditional to spi_update per Dave's comment.
2011-01-30r600g: make r600_drawl inherit pipe_draw_infoMarek Olšák
2011-01-30r600g: add back u_upload_mgr integrationMarek Olšák
I can't see a performance difference with this code, which means all the driver-specific code removed in this commit was unnecessary. Now we use u_upload_mgr in a slightly different way than we did before it got dropped. I am not restoring the original code "as is" due to latest u_upload_mgr changes that r300g performance benefits from. This also fixes: - piglit/fp-kil
2011-01-28r600g: handle PIPE_CAP_ARRAY_TEXTURESMarek Olšák
2011-01-25r600g: Implement timer queries.Mathias Fröhlich
2011-01-25r600g: FLT_TO_INT* are vector instructions on Evergreen.Henri Verbeet
FLT_TO_INT is a vector instruction, despite what the (current) documentation says. FLT_TO_INT_FLOOR and FLT_TO_INT_RPI aren't explicitly mentioned in the documentation, but those are vector instructions too.
2011-01-21r600g: check if hardware blits are possible bevore enabling tillingChristian König
2011-01-21r600g: FLT_TO_INT_FLOOR is trans instructionAlex Deucher
Add missing evergreen FLT_TO_INT_FLOOR instruction.
2011-01-19r600g: fix segfault if texture operand is a literalChristian König
This fixes Bug 33262
2011-01-19r600g: fix reserve_cfile for R700+Christian König
According to R700 ISA we have only two channels for cfile constants. This patch makes piglit tests "glsl1-constant array with constant indexing" happy on RV710.
2011-01-18r600g: Kill trailing whitespace.Henri Verbeet
2011-01-18r600g: Remove the unused eg_states_inc.h and r600_states_inc.h.Henri Verbeet
2011-01-18r600g: Simplify some r600_bc_add_alu_type() calls to r600_bc_add_alu().Henri Verbeet
2011-01-16r600g: fix PIPE_CAP_INSTANCED_DRAWING warningChristian König
2011-01-16r600g: fix alu inst group merging for relative adressingChristian König
2011-01-16r600d: fix some bugs added reworking literal handlingChristian König
If a literal slot isn't used it should be set to 0 instead of an uninitialized value. Also the channels for pre R700 trig functions were incorrect. And most important literals were not counted against ndw, resulting in an invalid force_add_cf detection.
2011-01-15r600g: Fix some register value name typos.Henri Verbeet
SFR -> SRF.
2011-01-15r600g: Get rid of r600_translate_vertex_data_type().Henri Verbeet
This has been replaced with r600_vertex_data_type().
2011-01-14r600g: compiler helper opcode fixes for evergreenAlex Deucher
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-01-14r600g: pass r600_bc to some addition compiler helper functionsAlex Deucher
needed for asic specific opcodes Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
2011-01-14r600g: Disable V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR case.Vinson Lee
The usage of macro V_SQ_ALU_WORD1_OP2_SQ_OP2_INST_FLT_TO_INT_FLOOR was introduced by commit 323ef3a1f07ba4333dadebab571ddcd49d95f45c but the macro is undefined. Disable this case to fix the build for now.
2011-01-14r600g: add more missing instructions to r600_bc_get_num_operandsChristian König
2011-01-13r600g: Move declaration before code in r600_asm.c.Vinson Lee
Fixes SCons build.
2011-01-13r600g: rework literal handlingChristian König
2011-01-13r600g: merge alu groupsChristian König
2011-01-13r600g: implement replacing gpr with pv and psChristian König
2011-01-13r600g: add missing RECIPSQRT_CLAMPED to r600_bc_get_num_operandsChristian König
2011-01-13r600g: rework bank swizzle codeChristian König
2011-01-13r600g: fix alu slot assignmentChristian König
2011-01-13r600g: optimize away CF ALU instructions even if type doesn't matchChristian König
2011-01-13r600g: Silence uninitialized variable warnings.Vinson Lee
2011-01-12r600g: also look at tex inst when for maximum gpu countChristian König
2011-01-12r600g: implement output modifiers and use them to further optimize LRPChristian König
2011-01-12r600g: use special constants for 0, 1, -1, 1.0f, 0.5f etcChristian König
2011-01-12r600g: optimize temp register handling for LRPChristian König
2011-01-12r600g: optimize away CF_INST_POPChristian König
If last instruction is an CF_INST_ALU we don't need to emit an additional CF_INST_POP for stack clean up after an IF ELSE ENDIF.
2011-01-12r600g: make dumping of shaders an optionChristian König
2011-01-12r600g: fix alu dumpingChristian König
2011-01-12r600g: improve r600_bc_dumpChristian König
2011-01-12r600g: texture instructions also work fine with TGSI_FILE_INPUTChristian König
2011-01-12r600g: DP4 also supports writemaskingChristian König
2011-01-12r600g: Why all this fiddling with tgsi_helper_copy?Christian König
tgsi_helper_copy is used on several occasions to copy a temporary result into the real destination register to emulate writemasks for OP3 and reduction operations. According to R600 ISA that's unnecessary. This patch fixes this use for MAD, CMP and DP4.
2011-01-12r600g: fix tex and vtx joiningChristian König
2011-01-11r600g: Fixed SIN/COS/SCS for the case where the operand is a literal.Tilman Sauerbeck
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de> Reviewed-by: Alex Deucher <alexdeucher@gmail.com>
2011-01-11r600g: move user fence into base radeon structureJerome Glisse
This avoid any issue when context is free and we still try to access fence through radeon structure. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2011-01-07r600g: Also set const_offset if the buffer is not a user buffer in ↵Henri Verbeet
r600_upload_const_buffer().
2011-01-07r600g: Update some comments for Evergreen.Henri Verbeet
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