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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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this add support for the upload manager for uploading user vbo/index buffers.
this provides a considerable speedup in q3 type games.
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this moves to using a pb bufmgr instead of kernel bos directly.
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this paves the way for moving to pb bufmgrs now.
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introduce an abstraction layer between kernel bos and the winsys BOs.
this is to allow plugging in pb manager with minimal disruption to pipe driver.
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no need for this info to be exported to pipe driver.
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This is likely only correct for OpenGL and not other state trackers.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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We would leak the newly created bo if it cannot be mapped.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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since the depth blit code is hardcoded hex yay \o/
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This whole set of state just seems wrong, another cut-n-paste nightmare.
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more prep work for fixing up buffer handling
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we need this for future buffer rework, it also makes the vtbl easier
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Avoid using r600_screen structure to get ptr to radeon
winsys structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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The code that uses dname is currently ifdef'ed out.
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Changes in v3:
- Also change trace, which I forgot about
Changes in v2:
- No longer adds tessellation shaders
Currently each shader cap has FS and VS versions.
However, we want a version of them for geometry, tessellation control,
and tessellation evaluation shaders, and want to be able to easily
query a given cap type for a given shader stage.
Since having 5 duplicates of each shader cap is unmanageable, add
a new get_shader_param function that takes both a shader cap from a
new enum and a shader stage.
Drivers with non-unified shaders will first switch on the shader
and, within each case, switch on the cap.
Drivers with unified shaders instead first check whether the shader
is supported, and then switch on the cap.
MAX_CONST_BUFFERS is now per-stage.
The geometry shader cap is removed in favor of checking whether the
limit of geometry shader instructions is greater than 0, which is also
used for tessellation shaders.
WARNING: all drivers changed and compiled but only nvfx tested
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evergreen is always the same as r700 here.
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If the buffer we are attempting to map is referenced by the unsubmitted
command stream for this context, we need to flush the command stream,
however to do that we need to be able to access the context at the lowest
level map function, currently we set the buffer in the toplevel map, but this
racy between context. (we probably have a lot more issues than that.)
I'll look into a proper solution as suggested by jrfonseca when I get some time.
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This reverts a part of e795ca8f3175fa6fd97b6b2ef2775e3f8803012a
that causes artefacts and a performance drop.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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We would leak bo if the argument check failed.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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This makes the 'vp1-LOG test' piglit test work.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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for evergreen I ended up using a non-contig array of states, but
this code needs a bit of fixing up to deal with that.
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adds shader opcodes + assembler support (except ARL)
uses constant buffers
add interp instructions in fragment shader
adds all evergreen hw states
adds evergreen pm4 support.
this runs gears for me on my evergreen
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the DDX and r600c both flush cb/db after the draw is emitted,
as long as they do that, r600g can't be different, as it races.
We end up with r600g flush, set CB, DDX set CB, flush. This
was causing misrendering on my evergreen, where sometimes the drawing
would go to an old CB.
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the code should reloc correctly a single BO 3 times.
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this is ported from r600c mostly, bank swizzling is real messy and I don't think
I got enough sleep last night to fully understand it.
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Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Dave Airlie <airlied@redhat.com>
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This makes the 'fp1-RSQ test 2' piglit test work.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This splits the r600 opcodes out of the sq file and adds a wrapper
so we can convert to evergreen opcodes later without touching these functions
too much.
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DX9 constants were in the constant file, and evergreen no longer support
cfile. r600/700 can also use constants in memory buffers, so add the code
(disabled for now) to enable that as precursor for evergreen.
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this is step one towards evergreen support, it lets us plug in whole
new hw level states.
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This was inherently fragile as any changes to r600_states.h would also
need manual updating of all of the bits in radeon.h. Just add a simple
python script to do the conversion, its not hooked up to make at all.
This also will make adding evergreen a bit easier.
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We end up referencing the new surf and derefing the old surface which
is a copy of the pointer to the new surf. So just bump the ref count directly.
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Need to remove from context as well.
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