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Use fetch shader instead of having fetch instruction in the vertex
shader. Allow to restrict shader update to a smaller part when
vertex buffer input layout changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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this should at least make app use the same paths as they would for a real
driver.
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This should fix the remaining buffer alignment issues in r600g.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Vertex data swizzles are already done in the vertex shader. Doing them twice
breaks BGRA vertex arrays for example.
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RET was interpreted as END, which was wrong. Instead, if a shader contains RET
in the main function, it will fail to compile with an error message
from now on.
The hack is from early days.
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The (piglit) mipmap_limits test shows the issue very clearly.
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This driver is a fake swdri driver that perform no operations
beside allocation gallium structure and buffer for upper layer
usage.
It's purpose is to help profiling core mesa/gallium without
having pipe driver overhead hidding hot spot of core code.
scons file are likely inadequate i am unfamiliar with this
build system.
To use it simply rename is to swrast_dri.so and properly set
LIBGL_DRIVERS_PATH env variable.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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This fixes 8 texwrap format tests.
The code should handle arbitrary formats now and is cleaner.
NOTE: This is a candidate for the 7.9 branch.
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As per the ps_3_0 and vs_3_0 documentation.
The aL register in D3D9 is quite tricky to use, though.
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To match shader model 2.0 (it's impossible to fully implement ARL
with shader model 3.0 relative addressing).
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To match shader model 2.0.
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Fixes piglit/fbo_readpixels since staging upload changes.
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Currently r600_resource_copy_region() will turn these copies into
transfers + memcpys, so to avoid recursion we must not turn those
transfers back into blits.
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Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Francisco Jerez <currojerez@riseup.net>
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For some reason I though we needed the _DISCARD flag to avoid
readbacks, which isn't true at all. Now write operations should
pipeline properly, gives a good speedup to demos/tunnel.
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Seems to sort-of work for non-mipmapped textures. Better than just
black anyway.
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Don't use an intermediate for formats which don't support hardware
blits under u_blitter.c, as these will recursively attempt to create a
transfer.
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Fixes http://bugs.freedesktop.org/show_bug.cgi?id=31479
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This is a temporary work around to prevent crashes with glean/glsl1
(for example) which try to do vertex shader texturing.
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Commit 8dfafbf0861fe3d2542332658dd5493851053c78 forgot to update r300g.
There is a buf == NULL check, but buf is used before for var init.
Tested-by: Guillermo S. Romero <gsromero@infernal-iceberg.com>
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Trivial change that avoids a segmentation fault when the blitter state
happens to be bound when the context is destroyed.
The free calls should probably removed altogether in the future -- the
responsibility to destroy the state atoms lies with whoever created it,
and the safest thing for the pipe driver is to not touch any bound state
in its destructor.
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Discard fractional bits from linewidth. This matches the nvidia
closed drivers, my reading of the OpenGL SI and current llvmpipe
behaviour.
It looks a lot nicer & avoids ugliness where lines alternate between n
and n+1 pixels in width along their length.
Also fix up r600g to match.
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Should do better than this and actually unbind the buffer, but haven't
yet gotten it to work.
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These were previously being left in the default (D3D) mode. This mean
that triangles were drawn slightly incorrectly, but also because this
state is relied on by the u_blitter code, all blits were half a pixel
off.
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These were being set but not used anywhere.
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Generalize the existing tiled_buffer path in texture transfers for use
in some non-tiled up and downloads.
Use a staging buffer, which the winsys will restrict to GTT memory.
GTT buffers have the major advantage when they are mapped, they are
cachable, which is a very nice property for downloads, usually the CPU
will want to do look at the data it downloaded.
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This opens the question of what interface the winsys layer should
really have for talking about these concepts.
For now I'm using the existing gallium resource usage concept, but
there is no reason not use terms closer to what the hardware
understands - eg. the domains themselves.
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