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There is little point in having a special TGSI token just to handle
predicate register updates. Remove tgsi_dst_register_ext_predicate token
and instead use a new PREDICATE register file to update predicates.
Actually, the contents of the obsolete token are being moved
to tgsi_instruction_ext_predicate, where they should be
from the very beginning.
Remove the NVIDIA-specific condition code tokens -- nobody uses them
and they can be emulated with predicates if needed.
Introduce PIPE_CAP_SM3 that indicates whether a driver supports
SM3-level instructions, and in particular predicates.
Add PIPE_CAP_MAX_PREDICATE_REGISTERS that can be used to query the driver
how many predicate registers it supports (currently it would be 1).
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It's really just another define. No need for its own header.
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Asks the driver to map the texture storage directly or return NULL if that's
not possible.
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gcc 4.4 seems particularly picky with int -> enum conversions.
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No longer used. S3TC support is queried via
pipe_screen::is_format_supported.
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default extension list
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Conflicts:
src/mesa/vbo/vbo_exec_draw.c
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buffer_flush_mapped_range.
When a buffer was mapped for write and no explicit flush range was provided
the existing semantics were that the whole buffer would be flushed, mostly
for backwards compatability with non map-buffer-range aware code.
However if the buffer was mapped/unmapped with nothing really written --
something that often happens with the vbo -- we were unnecessarily assuming
that the whole buffer was written.
The new PIPE_BUFFER_USAGE_FLUSH_EXPLICIT flag (based from ARB_map_buffer_range
's GL_MAP_FLUSH_EXPLICIT_BIT flag) allows to clearly distinguish the
legacy usage from the nothing written usage.
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Conflicts:
Makefile
src/gallium/drivers/softpipe/sp_screen.c
src/mesa/main/version.h
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Also implement context member functions to optimize away those
flushes whenever possible.
Signed-off-by: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
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Only allows clearing currently bound buffers, but colour and depth/stencil in
a single call.
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Conflicts:
scons/gallium.py
src/gallium/auxiliary/pipebuffer/pb_buffer_fenced.c
src/gallium/include/pipe/p_defines.h
src/mesa/vbo/vbo_exec_api.c
src/mesa/vbo/vbo_exec_draw.c
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To prevent blocking when mapping a buffer.
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Instead, a new pipe_transfer object has to be created and mapped for
transferring data between the CPU and a texture. This gives the driver more
flexibility for textures in address spaces that aren't CPU accessible.
This is a first pass; softpipe/xlib builds and runs glxgears, but it only shows
a black window. Looks like something's off related to the Z buffer, so the
depth test always fails.
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When passed to map() signals that the buffer's previous contents are
not required, allowing the driver to allocate a new buffer if the
current buffer can not be mapped immediately.
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Knowing how the client intends to use the texture will give the
driver the opportunity to optimize for such cases.
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Check for these caps in state tracker and enable corresponding GL extensions
if supported.
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Conflicts:
src/mesa/state_tracker/st_atom_sampler.c
src/mesa/state_tracker/st_cb_texture.c
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The cell driver still uses an internal CELL_FLUSH_WAIT flag, in the long run
proper fencing should be implemented for it.
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Hardware almost universally expects us to set a special filtering mode
when anisotropic filtering is enabled, as opposed to varying a max-aniso
values. Do this once in the state tracker & simplify the driver code.
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This is in a separate commit to ensure renames are properly preserved.
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