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largely a merge of the previously discussed origin/gallium-resource-sampling
but updated.
the idea is to allow arbitrary binding of resources, the way opencl, new gl
versions and dx10+ require, i.e.
DCL RES[0], 2D, FLOAT
LOAD DST[0], SRC[0], RES[0]
SAMPLE DST[0], SRC[0], RES[0], SAMP[0]
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For GL fragColor semantics we need to tell the pipe drivers that the fragment
shader color result is to be replicated to all bound color buffers, this
adds the basic TGSI + documentation.
v2: fix missing comma pointed out by Tilman on mesa-dev.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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this adds the capability + a stencil semantic id, + tgsi scan support.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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That file has been replaced by tgsi.rst.
Signed-off-by: José Fonseca <jfonseca@vmware.com>
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Remove p_compiler.h.
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like normal temporaries, but allows to define a number of distinct
arrays, all of which make it explicit that they contain /indexable/
registers.
as a side-effect we're adding support for multi-dimensional destination
registers.
The whole thing looks like this:
DCL TEMPX[0][0..128] # 0 array with 128 registers
ADD TEMPX[0][0], IN[0], IMM[0]
ADD TEMPX[0][1], IN[0], IMM[0]
ABS OUT[0], TEMPX[0][TEMP[0]]
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allows one to specify a safe (bound checked) array
filled with immediates. it works just like a const
array and declares much like our current immediates.
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of vertices
lots and lots of fixes for geometry shaders. in particular now we work when the gs
emits a different primitive than the one the pipeline was started with and also
we work when gs emits more vertices than would fit in the original buffer.
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It was only used for D3D's REP/END/BGNFOR/ENDFOR. D3D's aL register is
just like another address register now.
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Arcane DX9 opcodes that never were emitted by Mesa and have no DX10
counterpart. Slated for removal for quite some time now.
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Changes in v3:
- Documented the new properties
- Added comments for property values
- Rebased to current master
Changes in v2:
- Caps are added in a separate, subsequent patch
This adds two TGSI fragment program properties that indicate the
fragment coord conventions.
The properties behave as described in the extension spec for
GL_ARB_fragment_coord_conventions, but the default origin in
upper left instead of lower left as in OpenGL.
The syntax is:
PROPERTY FS_COORD_ORIGIN [UPPER_LEFT|LOWER_LEFT]
PROPERTY FS_COORD_PIXEL_CENTER [HALF_INTEGER|INTEGER]
The names have been chosen for consistency with the GS properties
and the OpenGL extension spec.
The defaults are of course the previously assumed conventions:
UPPER_LEFT and HALF_INTEGER.
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This will allow us to declare two-dimensional constant buffers.
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Conflicts:
src/gallium/auxiliary/tgsi/tgsi_dump.c
src/gallium/include/pipe/p_shader_tokens.h
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Either that or have UDIV have two destination operands.
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Provide reference implementation of them in tgsi_exec.
Note that BREAK opcode is overloaded and can be used to break out
of either a loop or a switch-case statement.
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This is to differentiate it from its unsigned version, TGSI_OPCODE_USHR.
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it's a leftover from an early version of geometry shading support.
geometry shaders now encode the primitive size in the PROPERTY token
and don't need special input with their size.
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Conflicts:
src/mesa/state_tracker/st_draw.c
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adds support for properties to all parts of the tgsi framework, plus
introduces a new register which will be used for system generated
values.
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The idea here is to eliminate the set_edgeflags() call in pipe_context
by treating edgeflags as a regular vertex element.
Edgeflags provoke special treatment in hardware, which means we need to
label them in some way, in this case we'll be passing them through the
vertex shader and labelling the vertex shader output with a new TGSI
semantic (TGSI_SEMANTIC_EDGEFLAG).
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Not really needed, never served its purpose.
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Rename Semantic.SemanticName to Semantic.Name. Similar for
SemanticIndex, and the members of the tgsi_version struct.
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Drop anonymous 'Extended' fields, have every optional token named
explicitly in its parent. Eg. there is now an Instruction.Label flag,
etc.
Drop destination modifiers and other functionality which cannot be
generated by tgsi_ureg.c, which is now the primary way of creating
shaders.
Pull source modifiers into the source register token, drop the second
negate flag. The source register token is now full - if we need to
expand it, probably best to move all of the modifiers to a new token
and have a single flag for it.
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Rename it to tgsi_instruction_predicate -- it's no longer an extended
token. Its presence is indicated by a new flag in tgsi_instruction that
indicates whether an instruction is predicated.
Also, change predicate index representation to match the other
tokens that specify register indices.
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There is little point in having a special TGSI token just to handle
predicate register updates. Remove tgsi_dst_register_ext_predicate token
and instead use a new PREDICATE register file to update predicates.
Actually, the contents of the obsolete token are being moved
to tgsi_instruction_ext_predicate, where they should be
from the very beginning.
Remove the NVIDIA-specific condition code tokens -- nobody uses them
and they can be emulated with predicates if needed.
Introduce PIPE_CAP_SM3 that indicates whether a driver supports
SM3-level instructions, and in particular predicates.
Add PIPE_CAP_MAX_PREDICATE_REGISTERS that can be used to query the driver
how many predicate registers it supports (currently it would be 1).
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Likewise, the extended negate functionality hasn't been
used since mesa switched to using tgsi_ureg to build programs,
and has been translating the SWZ opcode internally to a single MAD.
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These haven't been used by the mesa state tracker since the
conversion to tgsi_ureg, and it seems that none of the
other state trackers are using it either.
This helps simplify one of the biggest suprises when starting off with
TGSI shaders.
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Provide a dummy implementation in the GL state tracker (move 0.5 to
the destination regs).
At some point, a motivated person could add a better
implementation of noise. Currently not even the nvidia
binary drivers do anything more than this. In any case, the
place to do this is in the GL state tracker, not the poor
driver.
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Can be implemented with CMP src2, src1, src0
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The LOOP/ENDLOOP pair is renamed to BGNFOR/ENDFOR as its behaviour
is similar to a C language for-loop.
The BGNLOOP2/ENDLOOP2 pair is renamed to BGNLOOP/ENDLOOP as now
there is no name collision.
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The only valid usage for LOOP/ENDLOOP instructions
is LOOP[0] as a destination register.
The only valid usage for the remaining instructions
is LOOP[0].x as an indirect register.
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Remove commented-out opcodes. Remove information about API mappings
to opcodes, but add a reference to tgsi-instruction-set.txt where
that information is better presented.
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Various opcodes which can be implemented trivially with other TGSI opcodes,
such as matrix multiplication and negation. These were not used by any
state tracker or implemented by any of the drivers.
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This is a source of ongoing confusion. TGSI has multiple names for
opcodes where the same semantics originate in multiple shader APIs.
For instance, TGSI includes both Mesa/GLSL and DX/SM30 names for
opcodes with the same semantics, but aliases those names to the same
underlying opcode number.
This makes it very difficult to visually inspect two sets of opcodes
(eg in state tracker & driver) and check if they implement the same
functionality.
This patch arbitarily rips out the versions of the opcodes not currently
favoured by the mesa state tracker and leaves us with a single name
for each distinct operation.
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Remove the need to have a pointer in this struct by just including
the immediate data inline. Having a pointer in the struct introduces
complications like needing to alloc/free the data pointed to, uncertainty
about who owns the data, etc. There doesn't seem to be a need for it,
and it is unlikely to make much difference plus or minus to performance.
Added some asserts as we now will trip up on immediates with more
than four elements. There were actually already quite a few such asserts,
but the >4 case could be used in the future to specify indexable immediate
ranges, such as lookup tables.
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mesa allocates both frontface and pointcoord registers within the fog
coordinate register, by using swizzling. to make it cleaner and easier
for drivers we want each of them in its own register. so when doing
compilation from the mesa IR to tgsi allocate new registers for both
and add new semantics to the respective declarations.
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Driver writers often got confused and assumed Size to be
the number of immediate values in Immediate declaration.
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Map OPCODE_TEXKILL to OPCODE_KIL.
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