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Spotted by Henri on IRC.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This packet is required when updating the DB, CB,
or STRMOUT base addresses on rv6xx for the surface
sync logic to work correctly.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This is reliant on a drm patch that I posted on the list + a version bump.
These will appear in drm-next today.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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the context init is separate for these gpus.
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6xx/7xx have a max of 4 DBs, evergreen have a max of 8.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Like on some r5xx, there are multiple DB backends on the r600,
we need to add up the query results from each of these to get the
final correct value.
So far I'm not 100% sure how to calculate the num_db, value
setting it to 4 should be harmless enough until we do.
This fixes occulsion_query piglit test on my rv740.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This avoid any issue when context is free and we still try to
access fence through radeon structure.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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r600g is up to a point where all small CPU cycle matter and pb* turn
high on profile. It's mostly because pb try to be generic and thus
trigger unecessary check for r600g driver. To avoid having too much
abstraction & too much depth in the call embedded everythings into
r600_bo. Make code simpler & faster. The performance win highly depend
on the CPU & application considered being more important on slower CPU
and marginal/unoticeable on faster one.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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R6XX GPU doesn't like to have two partial flush writting
back to memory in row without a prior flush of the pipeline.
Add PS_PARTIAL_FLUSH to flush all work between the CP and
the ES, GS, VS, PS shaders.
Thanks a lot to Alban Browaeys (prahal on irc) for investigating
this issue.
Signed-off-by: Alban Browaeys <prahal@yahoo.com>
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Use fetch shader instead of having fetch instruction in the vertex
shader. Allow to restrict shader update to a smaller part when
vertex buffer input layout changes.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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6xx-evergreen
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Occlusion query on evergreen need the event index field to be
set otherwise we endup locking up the GPU.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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For driver performance analysis it usefull to be able to
disable as much as possible the GPU interaction so that
one can profile the userspace only.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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These were previously being left in the default (D3D) mode. This mean
that triangles were drawn slightly incorrectly, but also because this
state is relied on by the u_blitter code, all blits were half a pixel
off.
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This opens the question of what interface the winsys layer should
really have for talking about these concepts.
For now I'm using the existing gallium resource usage concept, but
there is no reason not use terms closer to what the hardware
understands - eg. the domains themselves.
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Avoid having object ending up in dead list of dirty object.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Since flush rework there could be only one relocation per
register in a block.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Got a speed up by tracking the dirty blocks in a seperate list instead of looping through all blocks. This version should work with block that get their dirty state disabled again and I added a dirty check during the flush as some blocks were already dirty.
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Flush read cache before writting register. Track flushing inside
of a same cs and avoid reflushing same bo if not necessary. Allmost
properly force flush if bo rendered too and then use as a texture
in same cs (missing pipeline flush dunno if it's needed or not).
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Allow fast lookup of relocation information & id which
was a CPU time consumming operation.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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since we plan on using dx10 constant buffers everywhere.
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this just keeps a list of bos submitted together, and uses them to decide
bo busy state for the whole group.
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Add bo offset everywhere needed if r600_bo is ever a sub bo
of a bigger bo.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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no wonder it was slow, the code is deliberately forcing stuff into GTT,
we used to have domain management but it seems to have disappeared.
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this function was taking quite a lot of pointless CPU.
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this sets up a single loop constant like r600c does.
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These need to be emitted, we also need them to do proper vtx start,
instead of abusing index offset.
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This avoid to overcount the number of dwords we need and
thus avoid maximazation of cs buffer use.
Signed-off-by: Jerome Glisse <jglisse@redhat.com
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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mainly remove 2 suffix from function names
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Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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