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path: root/src/gallium/winsys/r600/drm/r600_priv.h
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2011-03-01r600g: start using drm minor version to enable things.Dave Airlie
If the drm minor version is > 9 (i.e. whats in drm-next), we enable s3tc + texture tiling by default now. this changes R600_FORCE_TILING to R600_TILING which can be set to false to disable tiling on working drm. Signed-off-by: Dave Airlie <airlied@redhat.com>
2011-01-25r600g: Implement timer queries.Mathias Fröhlich
2011-01-11r600g: move user fence into base radeon structureJerome Glisse
This avoid any issue when context is free and we still try to access fence through radeon structure. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-12-09r600g: avoid using pb* helper we are loosing previous cpu cycle with itJerome Glisse
r600g is up to a point where all small CPU cycle matter and pb* turn high on profile. It's mostly because pb try to be generic and thus trigger unecessary check for r600g driver. To avoid having too much abstraction & too much depth in the call embedded everythings into r600_bo. Make code simpler & faster. The performance win highly depend on the CPU & application considered being more important on slower CPU and marginal/unoticeable on faster one. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-12-03r600g: more indentation fix + warning silencing + dead code removalJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-11-08r600g: implement texture_get_handle (needed for eglExportDRMImageMESA)Benjamin Franzke
2010-11-03r600g: propogate resource usage flags to winsys, use to choose bo domainsKeith Whitwell
This opens the question of what interface the winsys layer should really have for talking about these concepts. For now I'm using the existing gallium resource usage concept, but there is no reason not use terms closer to what the hardware understands - eg. the domains themselves.
2010-11-02r600g: Made radeon_bo::map_count signed.Tilman Sauerbeck
That way assert(map_count >= 0) can actually fail when we screwed up. Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
2010-11-02r600g: Removed unused 'ptr' argument from radeon_bo().Tilman Sauerbeck
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
2010-10-18r600g: retrieve tiling info from kernel for shared buffers.Dave Airlie
we need to know if the back is tiled so we can blit from it properly.
2010-10-18r600g: get tiling info from kernelDave Airlie
2010-10-06r600g: fix dirty state handlingJerome Glisse
Avoid having object ending up in dead list of dirty object. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05r600g: userspace fence to avoid kernel call for testing bo busy statusJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05r600g: simplify block relocationJerome Glisse
Since flush rework there could be only one relocation per register in a block. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05r600g: use dirty list to track dirty blocksBas Nieuwenhuizen
Got a speed up by tracking the dirty blocks in a seperate list instead of looping through all blocks. This version should work with block that get their dirty state disabled again and I added a dirty check during the flush as some blocks were already dirty.
2010-10-05r600g: improve bo flushingJerome Glisse
Flush read cache before writting register. Track flushing inside of a same cs and avoid reflushing same bo if not necessary. Allmost properly force flush if bo rendered too and then use as a texture in same cs (missing pipeline flush dunno if it's needed or not). Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05r600g: store reloc information in bo structureJerome Glisse
Allow fast lookup of relocation information & id which was a CPU time consumming operation. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-05r600g: drop use_mem_constant.Dave Airlie
since we plan on using dx10 constant buffers everywhere.
2010-10-05r600g: drop mman allocatorDave Airlie
we don't use this since constant buffers are now being used on all gpus.
2010-10-05r600g: add bo busy backoff.Dave Airlie
When we go to do a lot of bos in one draw like constant bufs we need to avoid bouncing off the busy ioctl, this mitigates by backing off on busy bos for a short amount of times.
2010-10-05r600g: add bo fenced list.Dave Airlie
this just keeps a list of bos submitted together, and uses them to decide bo busy state for the whole group.
2010-10-04r600g: use r600_bo for relocation argument, simplify codeJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04r600g: rename radeon_ws_bo to r600_boJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-10-04r600g: fix wwarning in bo_map functionDave Airlie
2010-09-30r600g: keep a mapping around for each boJohn Doe
Save a lot of call into the kernel and thus improve performances. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-30r600g: don't double count dirty blockJohn Doe
This avoid to overcount the number of dwords we need and thus avoid maximazation of cs buffer use. Signed-off-by: Jerome Glisse <jglisse@redhat.com
2010-09-30r600g: clean up some code from move to new paths.Dave Airlie
mainly remove 2 suffix from function names
2010-09-29r600g: cleanupJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-29r600g: use a hash table instead of groupJerome Glisse
Instead of creating group of register use a hash table to lookup into which block each register belongs. This simplify code a bit. Signed-off-by: Jerome Glisse <jglisse@redhat.com
2010-09-29r600g: move radeon.h members around to add back map flushing.Dave Airlie
2010-09-27r600g: fix occlusion query after change to block structureJerome Glisse
block->reg point to register value not block->pm4 which point to packet. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-26r600g: disable early cull optimization when occlusion query runningJerome Glisse
When occlusion query are running we want to have accurate fragment count thus disable any early culling optimization GPU has. Based on work from Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-24r600g: evergreen fix for new designJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-21r600g: occlusion query for new designJerome Glisse
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-20r600g: move chip class to radeon common structureJerome Glisse
So texture code can be shared btw new state design & old one. Signed-off-by: Jerome Glisse <jglisse@redhat.com>
2010-09-17r600g: alternative command stream building from contextJerome Glisse
Winsys context build a list of register block a register block is a set of consecutive register that will be emited together in the same pm4 packet (the various r600_block* are there to provide basic grouping that try to take advantage of states that are linked together) Some consecutive register are emited each in a different block, for instance the various cb[0-7]_base. At winsys context creation, the list of block is created & an index into the list of block. So to find into which block a register is in you simply use the register offset and lookup the block index. Block are grouped together into group which are the various pkt3 group of config, context, resource, Pipe state build a list of register each state want to modify, beside register value it also give a register mask so only subpart of a register can be updated by a given pipe state (the oring is in the winsys) There is no prebuild register list or define for each pipe state. Once pipe state are built they are bound to the winsys context. Each of this functions will go through the list of register and will find into which block each reg falls and will update the value of the block with proper masking (vs/ps resource/constant are specialized variant with somewhat limited capabilities). Each block modified by r600_context_pipe_state_set* is marked as dirty and we update a count of dwords needed to emit all dirty state so far. r600_context_pipe_state_set* should be call only when pipe context change some of the state (thus when pipe bind state or set state) Then to draw primitive you make a call to r600_context_draw void r600_context_draw(struct r600_context *ctx, struct r600_draw *draw) It will check if there is enough dwords in current cs buffer and if not will flush. Once there is enough room it will copy packet from dirty block and then add the draw packet3 to initiate the draw. The flush will send the current cs, reset the count of dwords to 0 and remark all states that are enabled as dirty and recompute the number of dwords needed to send the current context. Signed-off-by: Jerome Glisse <jglisse@redhat.com>