android-x86-mesa.git - Androïd/x86 port of Mesa drivers

Age	Commit message (Collapse)	Author
2011-01-08	r300g: rework command submission and resource space checking	Marek Olšák
	The motivation behind this rework is to get some speed by reducing CPU overhead. The performance increase depends on many factors, but it's measurable (I think it's about 10% increase in Torcs). This commit replaces libdrm's radeon_cs_gem with our own implemention. It's optimized specifically for r300g, but r600g could use it as well. Reloc writes and space checking are faster and simpler than their counterparts in libdrm (the time complexity of all the functions is O(1) in nearly all scenarios, thanks to hashing). (libdrm's radeon_bo_gem is still being used in the driver.) It works like this: cs_add_reloc(cs, buf, read_domain, write_domain) adds a new relocation and also adds the size of 'buf' to the used_gart and used_vram winsys variables based on the domains, which are simply or'd for the accounting purposes. The adding is skipped if the reloc is already present in the list, but it accounts any newly-referenced domains. cs_validate is then called, which just checks: used_vram/gart < vram/gart_size * 0.8 The 0.8 number allows for some memory fragmentation. If the validation fails, the pipe driver flushes CS and tries do the validation again, i.e. it validates only that one operation. If it fails again, it drops the operation on the floor and prints some nasty message to stderr. cs_write_reloc(cs, buf) just writes a reloc that has been added using cs_add_reloc. The read_domain and write_domain parameters have been removed, because we already specify them in cs_add_reloc. The space checking has been tested by putting small values in vram/gart_size variables.
2010-12-22	r300g: support B10G10R10A2 render targets only with DRM 2.8.0 or later versions	Marek Olšák

2010-12-05	r300g: cleanup winsys	Marek Olšák

2010-08-06	r300g: do not emit GB_Z_PEQ_CONFIG on non-r500 if DRM < 2.6.0	Marek Olšák

2010-08-05	r300g: implement hyper-z support. (v4)	Dave Airlie
	This implements fast Z clear, Z compression, and HiZ support for r300->r500 GPUs. It also allows cbzb clears when fast Z clears are being used for the ZB. It requires a kernel with hyper-z support. Thanks to Marek Olšák <maraeo@gmail.com>, who started this off, and Alex Deucher at AMD for providing lots of hints. v2: squashed zmask ram size fix] squashed r300g/blitter: fix Z readback when compressed] v3: rebase around texture changes in master - .1 fix more bits v4: migrated to using u_mm in r300_texture to manage hiz/zmask rams consistently disabled HiZ when using OQ flush z-cache before turning hyper-z off update hyper-z state on dsa state change store depthclearvalue across cbzb clears and replace it afterwards. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-07-16	r300g: do not make copies of constant buffers, emit them directly	Marek Olšák

2010-07-16	r300g: rebuild winsys and command submission to support multiple contexts	Marek Olšák

2010-04-26	r300g: emit MSPOS regs	Marek Olšák

2010-04-11	r300g: fix mipmapped 3D textures	Marek Olšák
	This is a bug in the CS checker causing CS being rejected.
2010-03-24	gallium: Reorg winsys directories	Jakob Bornecrantz
	Attached output from commit. delete mode 100644 src/gallium/winsys/drm/SConscript delete mode 100644 src/gallium/winsys/drm/i965/SConscript delete mode 100644 src/gallium/winsys/drm/intel/Makefile delete mode 100644 src/gallium/winsys/drm/intel/SConscript delete mode 100644 src/gallium/winsys/drm/nouveau/Makefile delete mode 100644 src/gallium/winsys/drm/radeon/Makefile delete mode 100644 src/gallium/winsys/drm/radeon/SConscript delete mode 100644 src/gallium/winsys/drm/vmware/Makefile delete mode 100644 src/gallium/winsys/drm/vmware/SConscript rename src/gallium/winsys/{drm/intel/gem => i915/drm}/Makefile (82%) rename src/gallium/winsys/{drm/intel/gem => i915/drm}/SConscript (100%) rename src/gallium/winsys/{drm/intel/gem => i915/drm}/intel_drm_api.c (100%) rename src/gallium/winsys/{drm/intel/gem => i915/drm}/intel_drm_batchbuffer.c (100%) rename src/gallium/winsys/{drm/intel/gem => i915/drm}/intel_drm_buffer.c (100%) rename src/gallium/winsys/{drm/intel/gem => i915/drm}/intel_drm_fence.c (100%) rename src/gallium/winsys/{drm/intel/gem => i915/drm}/intel_drm_winsys.h (100%) rename src/gallium/winsys/{drm/i965/gem => i965/drm}/Makefile (78%) rename src/gallium/winsys/{drm/i965/gem => i965/drm}/SConscript (100%) rename src/gallium/winsys/{drm/i965/gem => i965/drm}/i965_drm_api.c (98%) rename src/gallium/winsys/{drm/i965/gem => i965/drm}/i965_drm_buffer.c (100%) rename src/gallium/winsys/{drm/i965/gem => i965/drm}/i965_drm_winsys.h (100%) rename src/gallium/winsys/{drm => }/i965/xlib/Makefile (97%) rename src/gallium/winsys/{drm => }/i965/xlib/xlib_i965.c (100%) rename src/gallium/winsys/{drm => }/nouveau/drm/Makefile (79%) rename src/gallium/winsys/{drm => }/nouveau/drm/nouveau_dri.h (100%) rename src/gallium/winsys/{drm => }/nouveau/drm/nouveau_drm_api.c (100%) rename src/gallium/winsys/{drm => }/nouveau/drm/nouveau_drm_api.h (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/Makefile (79%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/SConscript (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_buffer.h (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_drm.c (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_drm.h (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_drm_buffer.c (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_r300.c (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_r300.h (100%) rename src/gallium/winsys/{drm/radeon/core => radeon/drm}/radeon_winsys.h (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/Makefile (63%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/SConscript (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_buffer.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_buffer.h (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_context.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_context.h (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_fence.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_fence.h (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_screen.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_screen.h (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_screen_dri.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_screen_ioctl.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_screen_pools.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_screen_svga.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_surface.c (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmw_surface.h (100%) rename src/gallium/winsys/{drm/vmware/core => svga/drm}/vmwgfx_drm.h (100%) rename src/gallium/winsys/{drm/i965 => sw}/Makefile (61%) copy src/gallium/winsys/{drm/sw => sw/drm}/Makefile (73%) rename src/gallium/winsys/{drm/sw => sw/drm}/sw_drm_api.c (98%) rename src/gallium/winsys/{drm/sw => sw/drm}/sw_drm_api.h (100%) rename src/gallium/winsys/{ => sw}/gdi/SConscript (100%) rename src/gallium/winsys/{ => sw}/gdi/gdi_sw_winsys.c (100%) rename src/gallium/winsys/{ => sw}/gdi/gdi_sw_winsys.h (100%) rename src/gallium/winsys/{ => sw}/null/Makefile (78%) rename src/gallium/winsys/{ => sw}/null/SConscript (100%) rename src/gallium/winsys/{ => sw}/null/null_sw_winsys.c (100%) rename src/gallium/winsys/{ => sw}/null/null_sw_winsys.h (100%) rename src/gallium/winsys/{drm/sw => sw/wrapper}/Makefile (65%) rename src/gallium/winsys/{drm/sw => sw/wrapper}/wrapper_sw_winsys.c (100%) rename src/gallium/winsys/{drm/sw => sw/wrapper}/wrapper_sw_winsys.h (100%) rename src/gallium/winsys/{ => sw}/xlib/Makefile (79%) rename src/gallium/winsys/{ => sw}/xlib/SConscript (100%) rename src/gallium/winsys/{ => sw}/xlib/xlib_sw_winsys.c (100%)