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path: root/src/gallium/winsys
AgeCommit message (Expand)Author
2010-09-25r600g: add eg db count control register.Dave Airlie
2010-09-24r600g: bring over fix from old path to new pathJerome Glisse
2010-09-24r600g: fix evergreen new pathJerome Glisse
2010-09-24r600g: fix evergreen new pathJerome Glisse
2010-09-24r600g: evergreen fix for new designJerome Glisse
2010-09-24r600g: move use_mem_constants flags for new designs structure alignmentJerome Glisse
2010-09-24r600g: fix typo in evergreen define (resource are in [0x30000;0x34000] range)Jerome Glisse
2010-09-24r300g: make accessing map_list and buffer_handles thread-safeMarek Olšák
2010-09-24r300g: fixup long-lived BO maps being incorrectly unmapped when flushingMarek Olšák
2010-09-23r600g: initial evergreen support in new pathJerome Glisse
2010-09-23r600g: fix typo in evergreen register listDave Airlie
2010-09-22r600g: disable shader rebuild optimization & account cb flush packetJerome Glisse
2010-09-22r600g: flush color buffer after draw commandJerome Glisse
2010-09-22winsys: automatically build sw winsys needed by EGL and d3d1xLuca Barbieri
2010-09-21r600g: occlusion query for new designJerome Glisse
2010-09-21r600g: directly allocate bo for user bufferJerome Glisse
2010-09-21r600g: fix eg texture borders.Dave Airlie
2010-09-20r600g: add back reference check when mapping bufferJerome Glisse
2010-09-20r600g: use pipe context for flushing inside mapJerome Glisse
2010-09-20r600g: move chip class to radeon common structureJerome Glisse
2010-09-20r600g: only flush for the correct colorbuffer, not all of them.Dave Airlie
2010-09-20r600g: fixup r700 CB_SHADER_CONTROL register.Dave Airlie
2010-09-20r600g: fix tiling support for ddx supplied buffersDave Airlie
2010-09-20r600g: send correct surface base update for multi-cbufsDave Airlie
2010-09-19r600g: Respect PB_USAGE_UNSYNCHRONIZED in radeon_bo_pb_map_internal().Henri Verbeet
2010-09-19r600g: Buffer object maps imply a wait.Henri Verbeet
2010-09-19r600g: Check for other references before checking for existing mappings in ra...Henri Verbeet
2010-09-17r600g: Silence uninitialized variable warning.Vinson Lee
2010-09-17r600g: Fix memory leak on error path.Vinson Lee
2010-09-17r600g: Fix implicit declaration warning.Vinson Lee
2010-09-17r600g: Remove unnecessary headers.Vinson Lee
2010-09-17r600g: alternative command stream building from contextJerome Glisse
2010-09-18r600g: oops got the use_mem_constant the wrong way around.Dave Airlie
2010-09-17r600g: use calloc for ctx bo allocationsDave Airlie
2010-09-17r600g: fixup map flushing.Dave Airlie
2010-09-17r600g: add winsys bo caching.Dave Airlie
2010-09-17r600g: add support for kernel boDave Airlie
2010-09-17r600g: use malloc bufmgr for constant buffersDave Airlie
2010-09-17r600g: move constant buffer creation behind winsys abstraction.Dave Airlie
2010-09-17r600g: attempt to abstract kernel bos from pipe driver.Dave Airlie
2010-09-17r600g: hide radeon_ctx inside winsys.Dave Airlie
2010-09-15r300g: fix buffer reuse issue caused by previous commitDave Airlie
2010-09-15r300g: prevent creating multiple winsys BOs for the same handleMarek Olšák
2010-09-13r300g: fix map_bufferMarek Olšák
2010-09-12pb: add void * for flush ctx to mapping functionsDave Airlie
2010-09-10r600g: Only increase a bo's map_count if radeon_bo_map() succeeded.Tilman Sauerbeck
2010-09-10r600g: Fixed a bo leak in the error path of radeon_ctx_set_bo_new().Tilman Sauerbeck
2010-09-10r600g: fixup state calculations for picking states.Dave Airlie
2010-09-10r600g: evergreen CBs are more sane to support with a single stateDave Airlie
2010-09-10r600g: add multi-buffer flush support properly.Dave Airlie