Age | Commit message (Collapse) | Author |
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nv50 should switch to rules-ng-ng too at some point.
The classic Mesa Nouveau driver also includes a copy of nouveau_class.h,
and should convert to rules-ng-ng too and remove it.
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This is the new register generation toolkit in use by nouveau.
As far as I know, this is the best register description toolkit in
existence, and you should use it too for your hardware :)
Thanks to Marcin Kościelnicki for inventing it and performing
invaluable reverse engineering work of nVidia chips.
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Thanks for Dave Airlie and Jerome Glisse for their code which made
me realize I need this too.
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Hardware sets it to 0, so we add an ADD to put an 1 there if the
application really wants the alpha channel.
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Completely untested, since Mesa apparently never uses this currently.
In particular, it might not work with scalar slot op.
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The old swtnl code was broken by the new shader linkage support for
GLSL.
This is a rewrite of swtnl support, which should instead work properly,
be faster and more closer to the much more tested hardware pipeline.
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Intuition != mathematics, so this time I actually worked out the right
formula for first order approximation of perspective interpolation.
Ironically, per quad divide actually makes things slower when compared
with per pixel divide -- probably because the divide hardware unit is
rarely used, whereas the multiply unit is typically already saturated
and the first order approximation imply more multiplications.
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These are the non-trivial conversions that this function recognizes,
which was produced by u_format_compatible_test.c:
b8g8r8a8_unorm -> b8g8r8x8_unorm
a8r8g8b8_unorm -> x8r8g8b8_unorm
b5g5r5a1_unorm -> b5g5r5x1_unorm
b4g4r4a4_unorm -> b4g4r4x4_unorm
l8_unorm -> r8_unorm
i8_unorm -> l8_unorm
i8_unorm -> a8_unorm
i8_unorm -> r8_unorm
l16_unorm -> r16_unorm
z24_unorm_s8_uscaled -> z24x8_unorm
s8_uscaled_z24_unorm -> x8z24_unorm
r8g8b8a8_unorm -> r8g8b8x8_unorm
a8b8g8r8_srgb -> x8b8g8r8_srgb
b8g8r8a8_srgb -> b8g8r8x8_srgb
a8r8g8b8_srgb -> x8r8g8b8_srgb
a8b8g8r8_unorm -> x8b8g8r8_unorm
r10g10b10a2_uscaled -> r10g10b10x2_uscaled
r10sg10sb10sa2u_norm -> r10g10b10x2_snorm
State trackers and pipe drivers should be updated to take advantage of
this knowledge, e.g., in surface_copy.
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Also, include the color buffer in the key. Not having it there
causes a tight knots in the logic to determine when it is OK or not
to discard previous color buffer contents.
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color format.
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Much more convenient than boolean arrays.
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This should fix bogus reports "Too many temporaries." and maybe some others.
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We might want to copy them as color ones though.
Also works around crash in Unigine Heaven due to failing to allocate
a 64 MB temporary in GART for a CPU copy.
Unigine Heaven now works on nv40, albeit with very heavy glitches (with
the floating branch with render_hdr 0).
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Actually, we may want to get rid of the x/y coordinates for linear
surfaces, and realign the origin from scratch if necessary, instead
of doing this "on-demand realignment".
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This reverts commit 5cdedaaf295acae13ac10feeb3143d83bc53d314.
https://bugs.freedesktop.org/show_bug.cgi?id=30002
Conflicts:
src/gallium/drivers/r300/r300_texture.c
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Those are:
- dead-code elimination
- constant folding
- peephole (mainly copy propagation)
- register allocation
There are some bugs which I need to track down.
Also fix up the descriptions of all the debug options.
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We probably want to reorganize the remaining files too, but that's
for later, maybe.
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We were incorrectly setting a register that limited the range of
constants accessible via indirect addressing.
Setting it correctly, we can address all the constants the GPU
supports.
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Does any API even use rounding-up?
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If the GALLIUM_GALAHAD env var is 1 we'll wrap the regular driver with
the galahad validation driver.
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