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2008-11-12Merge commit 'origin/gallium-0.1' into gallium-0.2Pekka Paalanen
* commit 'origin/gallium-0.1': Mesa: fix number of buffers in st_draw_vbo(). Nouveau: fix nv20_vertex_layout() Nouveau: update nv20 miptree according to nv40. Nouveau: build, link and use nv20. Nouveau: name replace for nv20. Nouveau: Rename nv20/ files as nv20. Nouveau: copy nv30_vertprog.c to nv20. Nouveau: start nv20 by copying the nv10 tree.
2008-11-10nouveau: remove previous hack around x86_64 breakageBen Skeggs
This hack now causes breakage *doh*. :)
2008-11-10nv40: init pipe_surface correctlyBen Skeggs
2008-11-10nouveau: pass object handle not pointer to GPU...Ben Skeggs
2008-11-10Merge remote branch 'origin/gallium-0.2' into gallium-0.2Ben Skeggs
2008-11-09gallium: use PIPE_ARCH_SSE to protect use of SSE instrinsics onlyBrian
This allows us to use SSE codegen with debug builds again. When PIPE_ARCH_SSE is set (w/ gcc -msse -msse2) we will also use the gcc SSE intrinsic functions.
2008-11-09Nouveau: fix nv20_vertex_layout()Pekka Paalanen
The function should update nv20->vertex_info, and not just a local struct that's thrown away immediately. Fixes a SIGFPE due to vbuf->vertex_size = 0 in vbuf_alloc_vertices(). Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-08gallium: implement SSE codegen for TGSI_OPCODE_NRM/NRM4Brian
2008-11-08Nouveau: update nv20 miptree according to nv40.Pekka Paalanen
glxinfo doesn't degfault anymore. Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-08Nouveau: build, link and use nv20.Pekka Paalanen
Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-08Nouveau: name replace for nv20.Pekka Paalanen
No functional changes, only changed function, struct, macro etc. names. nv10 -> nv20 nv30 -> nv20 celsius -> kelvin Did not touch fifo command macros. Don't try to build nv20_vertprog.c for now. Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-08Nouveau: Rename nv20/ files as nv20.Pekka Paalanen
Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-08Nouveau: copy nv30_vertprog.c to nv20.Pekka Paalanen
Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-08Nouveau: start nv20 by copying the nv10 tree.Pekka Paalanen
Signed-off-by: Pekka Paalanen <pq@iki.fi>
2008-11-07gallium: added SSE for DP2, DP2ABrian Paul
2008-11-07gallium: implement TGSI_OPCODE_DP2A, add sqrt to NRM3/NRM4Brian Paul
2008-11-07CELL: fix several stencil problemsRobert Ellison
This small set of changes repairs several different stenciling problems; now redbook/stencil also runs correctly (and maybe others - I haven't checked everything yet). - The number of instructions that had been allocated for fragment ops used to be 64 (in cell/common.h). With complicated stencil use, we managed to get up to 93, which caused a segfault before we noticed we'd overran our memory buffer. It's now been bumped to 128, which should be enough for even complicated stencil and fragment op usage. - The status of cell surfaces never changed beyond the initial PIPE_SURFACE_STATUS_UNDEFINED. When a user called glClear() to clear just the Z buffer (but not the stencil buffer), this caused the check_clear_depth_with_quad() function to return false (because the surface status was believed to be undefined), and so the device was instructed to clear the whole buffer (including the stencil buffer), instead of correctly using a quad to clear just the depth, leaving the stencil alone. This has been fixed similarly to the way the i915 driver handles the surface status: during cell_clear_surface(), the status is set to PIPE_SURFACE_STATUS_DEFINED. Then a partial buffer clear is handled with a quad, as expected. Note that we are *not* using PIPE_SURFACE_STATUS_CLEAR (also similar to the i915); technically, we should be setting the surface status to CLEAR on a clear, and to DEFINED when we actually draw something (say on cell_vbuf_draw()), but it's difficult to figure out exactly which surfaces are affected by a cell_vbuf_draw(), so for now we're doing the easy thing. - The fragment ops handling was very clever about only pulling out the parts of the Z/stencil buffer that it needed for calculations; but this failed when only part of the buffer was written, because the part that was never pulled out was inadvertently cleared. Now all the data from the combined Z/stencil buffer is pulled out, just so the proper values can be recombined later and written back to the buffer correctly. As a bonus, the fragment op code generation is simplified.
2008-11-07Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul
2008-11-06gallium: implement TGSI_OPCODE_NRM/NRM4 in tgsi_exec.cBrian
2008-11-06Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul
2008-11-06gallium: debug code to print vertex array data (disabled)Brian Paul
2008-11-06softpipe: debug code (disabled)Brian Paul
2008-11-06gallium: actually flip the coordinatesZack Rusin
2008-11-05gallium: check execution mask in indirect register loadsBrian
Zero-out the index for disabled execution channels to avoid using potential garbage values (thus avoiding bad array indexing).
2008-11-05gallium: don't range check tgsi register index for indirect accessesBrian
Fixes progs/vp/arl.txt test.
2008-11-05cell: minor reformatting, var renamingBrian Paul
2008-11-05gallium: s/mmDestroy/u_mmDestroy/Brian Paul
2008-11-05Merge commit 'origin/gallium-0.1' into gallium-0.2Brian Paul
Conflicts: src/gallium/auxiliary/rtasm/rtasm_execmem.c src/mesa/shader/slang/slang_emit.c src/mesa/shader/slang/slang_log.c src/mesa/state_tracker/st_atom_framebuffer.c
2008-11-05gallium: call tgsi_set_exec_mask() and use exec mask in SSE ARL codeBrian Paul
This prevents vertex shaders from referencing invalid memory locations when the shader is operating on less than four vertices or fragments.
2008-11-05gallium: added tgsi_set_exec_mask()Brian Paul
2008-11-05gallium: added some sanity check assertions for constant buffer indexingBrian Paul
2008-11-05gallium: added some debug code (disabled)Brian Paul
2008-11-05gallium: disable some debug outputBrian Paul
2008-11-05i915: Remove faulty assertJakob Bornecrantz
2008-11-05draw: Implement TGSI_OPCODE_TRUNC.michal
2008-11-05tgsi: Implement OPCODE_TRUNC.michal
2008-11-05draw: Implement TGSI_OPCODE_TRUNC.michal
2008-11-05tgsi: Implement OPCODE_TRUNC.michal
2008-11-03gallium: Silence compiler warnings on Windows.Michal Krol
2008-11-03gallium: Read from PIPE_FORMAT_Z32_FLOAT.José Fonseca
Mainly for debugging purposes for now.
2008-11-03gallium: WinCE portability fixes.José Fonseca
2008-11-03gallium: Fix typo.José Fonseca
2008-11-03pipebuffer: Ensure refcounts of live buffer objects are never zero.José Fonseca
2008-11-03gallium: Ensure refcounts of live objects are never zero.José Fonseca
2008-11-03gallium: Fix msvc warning.José Fonseca
2008-10-30CELL: fix use of stencil value maskRobert Ellison
The Cell stencil tests were completely ignoring the stencil value mask. Now the original code paths are still used if the stencil value mask is all 1s; but code to use the mask for the stencil value and reference value comparisons is now emitted if the mask is not all 1s.
2008-10-30gallivm: replace the temp parameters of the JIT function with alloca'ed ↵Stephane Marchesin
temps. This avoids useless writes of temporary results.
2008-10-30cell: Protected use of non-initialized untile buffersJonathan White
2008-10-30CELL: stencil bug fixesRobert Ellison
Two definitive bugs in stenciling were fixed. The first, reversed registers in the generated Select Bytes (selb) instruction, caused the stenciling INCR and DECR operations to fail dramatically, putting new values in where old values were supposed to be and vice versa. The second caused stencil tiles to not be read and written from main memory by the SPUs. A per-spu flag, spu.read_depth, was used to indicate whether the SPU should be reading depth tiles, and was set only when depth was enabled. A second flag, spu.read_stencil, was set when stenciling was enabled, but never referenced. As stenciling and depth are in the same tiles on the Cell, and there is no corresponding TAG_WRITE_TILE_STENCIL to complement TAG_WRITE_TILE_COLOR and TAG_WRITE_TILE_Z, I fixed this by eliminating the unused "spu.read_stencil", renaming "spu.read_depth" to "spu.read_depth_stencil", and setting it if either stenciling or depth is enabled. I also added an optimization to the fragment ops generation code, that avoids calculating stencil values and/or stencil writemask when the stencil operations are all KEEP.
2008-10-30cell: Added check for PIPE_FLUSH_RENDER_CACHE to cell_flush to fix black ↵Jonathan White
blocks during st_readpixels due to a flush wait not happening in order to allow any previous rendering to complete.