Age | Commit message (Collapse) | Author |
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If we are going to blit from a depth texture we need to flush
it before we blit from it.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Plus other assorted clarifications.
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Before, the set_sampler_views() and restore_sampler_views() functions
used MAX2(old,new) to tell the driver how many samplers or sampler
views to set. This could result in cases such as:
pipe->set_fragment_sampler_views(pipe, 4, views={foo, bar, NULL, NULL})
Many/most gallium drivers would take this as-is and set
ctx->num_sampler_views=4 and ctx->sampler_views={foo, bar, NULL, NULL, ...}.
Later, loops over ctx->num_sampler_views would have to check for null
pointers. Worse, the number of sampler views and number of sampler CSOs
could get out of sync:
ctx->num_samplers = 2
ctx->samplers = {foo, bar, ...}
ctx->num_sampler_views = 4
ctx->sampler_views={Foo, Bar, NULL, NULL, ...}
So loops over the num_samplers could run into null sampler_views pointers
or vice versa.
This fixes a failed assertion in the SVGA driver when running the Mesa
engine demo in AA line mode (and possibly other cases).
It looks like all gallium drivers are careful to unreference views
and null-out sampler CSO pointers for the units beyond what's set
with the pipe::bind_x_sampler_states() and pipe::set_x_sampler_views()
functions.
I'll update the gallium docs to explain this as well.
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Leak was introduced when fixing strict aliasing violation in this code:
the reference counting was preserved, but the destructor call on zero
reference count was not.
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See comment for more details.
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Exactly one half would be the ideal, but this is a soft limit, and one
more byte over brings us to synchronous behavior.
Flushing when the referred GMR exceeds one third of the aperture gives us
statistically better performance.
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Only svga_context_flush should do it, to ensure upload commands are not
submitted to hardware in an inconsistent state.
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With the previous fixes we can now enabled hw depth copies
Signed-off-by: Dave Airlie <airlied@redhat.com>
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If we get a sw accessible buffer like the S8 texture we end up
doing depth tracking on it when there is no need since we won't
ever bind it to the hardware. This leads to a sw fallback in the
transfer destruction which leads to and endless recusion loop
of fail in transfer destroy.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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this adds a flag to keep track of whether the depth texture structure
is the flushed texture or not, so we can avoid doing flushes when
we do a hw rendering from one to the other.
it also renames flushed to dirty_db which tracks if the DB copy
has been dirtied by being bound to the hw.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This fixes zreaddraw in tiling mode
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To be consistant with vertex, geometry sampler fields.
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This consolidates the code duplicated between the fragment sampler
and vertex sampler functions. Plus, it'll make adding support for
geometry shader samplers trivial.
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To better distinguish from vertex sampler fields.
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Before we were looping to nr_samplers, which is the number of fragment
samplers, not vertex samplers.
NOTE: This is a candidate for the 7.9 and 7.10 branches.
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Based on work from Jakob Bornecrantz, Michel Dänzer, and Brian Paul.
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Join multiple exports into just one instruction
instead of exporting each register separately.
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Not 100% sure on this one, but this is how it should work,
the question is whether it will uncover other bugs elsewhere.
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If we see a MACRO bit on r600g its 2D tiled,
if don't see a MACRO bit and we do see a MICRO bit then its 1D tiled.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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If the tile type for the buffer is 1 then its been bound to the
DB at some point, we need to decompress it, otherwise its only
been bound as texture/cb so don't do anything.
This fixes 5 piglit tests here on r600g.
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this just adds the ioctl interface and sets the tile type
and array mode in the correct place.
This seems to bring eg 1D tiling to the same level, and issues
as on r600. No idea how to address 2D yet.
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sampler view on a depth texture.
R600/R700 was using incorrect tiling information from the (compressed) depth
buffer. Evergreen worked anyway because tiling doesn't work.
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Only decrement ref count if r600_upload_const_buffer
really changes the buffer.
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Print warnings and continue build.
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SVGA3D only supports SGN for vertex shaders, and this requires two additional
temporary registers for intermediate results.
For fragment shaders, lower to two CMPs and one ADD.
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Makes it easier to figure out which opcode it's about.
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the context init is separate for these gpus.
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6xx/7xx have a max of 4 DBs, evergreen have a max of 8.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Like on some r5xx, there are multiple DB backends on the r600,
we need to add up the query results from each of these to get the
final correct value.
So far I'm not 100% sure how to calculate the num_db, value
setting it to 4 should be harmless enough until we do.
This fixes occulsion_query piglit test on my rv740.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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eea1d8199b376f37027c14669e0bdf991a22872d
Although CUBE is a reduction inst, it writes to more than just PV.X
so we need to keep the dst channel.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This only works on r600/r700 so far, evergreen doesn't appear
to have the multiwrite enable bit in the color control, so we
may have to actually do a shader rewrite on EG hardware.
remove some duplicate code reg defines also.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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texture.
I know Jerome will probably rewrite the way depth textures work sometime
soon. For the time being this should at least make common depth texture usage
for shadowing work properly though.
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When the paint is opaque (currently, solid color with alpha 1.0f), no
blending is needed for VG_BLEND_SRC_OVER. This eliminates the serious
performance hit introduced by 859106f196ade77f59f8787b071739901cd1a843
for a common scenario.
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