Age | Commit message (Collapse) | Author |
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Not quite working, but the general idea is right I think.
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Replace cell_batch{align,alloc)*() with cell_batch_alloc16(), allocating
multiples of 16 bytes that are 16 byte aligned.
Opcodes are stored in preferred slot of SPU machine word.
Various structures are explicitly padded to 16 byte multiples.
Added STATIC_ASSERT().
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May fail to parse otherwise.
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Still a little dodgy:
- RTT will hit an assertion (hopefully!) and fail
- 3D textures with depth >= 32 will cause bad things to happen
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Sorry, but no, we're not doing this.. Correctness always takes precedence
over speed. Implement this higher up where you know it's safe to do so,
and doesn't break other things in the process.
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The new instruction order is 10 cycles faster.
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When negating a src vector that's stored in a altivec register, need to put
negated value into a new register so we don't upset the original value.
This solves the dark colors in the mandelbrot GLSL demo.
Also, use new predicate functions to check if a TGSI temp is stored in
an altivec register.
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Also flag shadows as dynamic since they're for CPU access as well.
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