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s/kms/drm/, s/kdpy/drmdpy/, and so forth.
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The main use of the backend is to support EGL_MESA_drm_display. drm
should be a better name.
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The modeset code supports now obsolete EGL_MESA_screen_surface. Move it
to a file of its own.
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On r6xx if an MOVA instruction is emitted we should set this bit.
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This makes the 'glsl1-gl_FrontFacing var (1)' piglit test pass.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Fixes this GCC warning.
nv50_state_validate.c:336: warning: missing initializer
nv50_state_validate.c:336: error: (near initialization for 'validate_list[20].func')
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Silences this GCC warning.
nvfx_vertprog.c: In function 'nvfx_vertprog_translate':
nvfx_vertprog.c:998: warning: assignment discards qualifiers from pointer target type
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The variables are used in code that is currently ifdef'ed out.
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Fixes this GCC warning.
r600_state2.c: In function 'r600_context_flush':
r600_state2.c:946: error: implicit declaration of function 'drmCommandWriteRead'
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Fixes glean texture_srgb test.
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Fixes fd.o bug 30245
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Winsys context build a list of register block a register block is
a set of consecutive register that will be emited together in the
same pm4 packet (the various r600_block* are there to provide basic
grouping that try to take advantage of states that are linked together)
Some consecutive register are emited each in a different block,
for instance the various cb[0-7]_base. At winsys context creation,
the list of block is created & an index into the list of block. So
to find into which block a register is in you simply use the register
offset and lookup the block index. Block are grouped together into
group which are the various pkt3 group of config, context, resource,
Pipe state build a list of register each state want to modify,
beside register value it also give a register mask so only subpart
of a register can be updated by a given pipe state (the oring is
in the winsys) There is no prebuild register list or define for
each pipe state. Once pipe state are built they are bound to
the winsys context.
Each of this functions will go through the list of register and
will find into which block each reg falls and will update the
value of the block with proper masking (vs/ps resource/constant
are specialized variant with somewhat limited capabilities).
Each block modified by r600_context_pipe_state_set* is marked as
dirty and we update a count of dwords needed to emit all dirty
state so far.
r600_context_pipe_state_set* should be call only when pipe context
change some of the state (thus when pipe bind state or set state)
Then to draw primitive you make a call to r600_context_draw
void r600_context_draw(struct r600_context *ctx, struct r600_draw *draw)
It will check if there is enough dwords in current cs buffer and
if not will flush. Once there is enough room it will copy packet
from dirty block and then add the draw packet3 to initiate the draw.
The flush will send the current cs, reset the count of dwords to
0 and remark all states that are enabled as dirty and recompute
the number of dwords needed to send the current context.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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This is what xf86-video-ati and r600c do.
Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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Signed-off-by: Tilman Sauerbeck <tilman@code-monkey.de>
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this fixes evergreen gears again.
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since the reference code relies on these being NULL.
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long lived maps were getting removed when they shouldn't this
tries to avoid that problem by only adding to the flush list
on unmap.
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this add support for the upload manager for uploading user vbo/index buffers.
this provides a considerable speedup in q3 type games.
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this adds the bo caching layer and uses it for vertex/index/constant bos.
ctx needs to take references on hw bos so the flushing works okay, also
needs to flush the maps.
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this moves to using a pb bufmgr instead of kernel bos directly.
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this paves the way for moving to pb bufmgrs now.
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st/egl no longer relies on libGL for OpenGL support.
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Otherwise, applications compiled with C compiler might have trouble
using them.
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Basically, change the loop from:
do {...} while (--num_inputs != 0)
into:
while (num_inputs != 0) { ... --num_inputs; }
Fixes fd.o bug 29987.
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introduce an abstraction layer between kernel bos and the winsys BOs.
this is to allow plugging in pb manager with minimal disruption to pipe driver.
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no need for this info to be exported to pipe driver.
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Prevents crashes with bogus data, or bad shader translation.
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We're actually doing a double swizzling:
indirect_reg->Swizzle[indirect_reg->SwizzleX]
instead of simply
indirect_reg->SwizzleX
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https://bugs.freedesktop.org/show_bug.cgi?id=29901
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