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path: root/src/mesa/drivers/dri/i915/i915_texstate.c
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2011-03-16android: Add __DRI_IMAGE_FORMAT_RGBA8888_REV.Chia-I Wu
2011-01-05intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.Eric Anholt
This has always been ugly about our texture code -- object base/max level vs intel object first/last level vs image level vs miptree first/last level. We now get rid of intelObj->first_level which is just tObj->BaseLevel, and make intelObj->_MaxLevel clearly based off of tObj->_MaxLevel instead of duplicating its code (incorrectly, as image->MaxLog2 only considers width/height and not depth!)
2010-10-13Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-06-04i915: Clamp minimum lod to maximum texture level too.Eric Anholt
Otherwise, we'd run into minlod > maxlod, and the sampler would give us the undefined we asked for. Bug #24846. Fixes OGLC texlod.c.
2010-03-17intel: Replace mt->pitch with mt->region->pitch.Eric Anholt
The pitch is not really an inherent part of the miptree, since it's not part of any of the layout calculations, and it's dictated by the libdrm-allocated region pitch now.
2010-03-05intel: Remove support for the DRI1 TFP extension.Eric Anholt
2010-01-04mesa: make texture BorderColor a union of float/int/uintBrian Paul
When we have integer-valued texture formats, the texture border color must also store integer and uint values. With GL 3.0, the new glTexParameterIiv() and glTexParameterIuiv() functions can set the border color to int or uint values.
2010-01-04Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: docs/relnotes.html src/gallium/drivers/llvmpipe/lp_tex_sample_c.c src/gallium/drivers/r300/r300_cs.h src/mesa/drivers/dri/i965/brw_wm_surface_state.c src/mesa/main/enums.c
2010-01-04i915: Use _MaxLevel on principle in texture setup.Eric Anholt
It was OK before because we proceed to clamp the value to hardware limits, but given that other use of MaxLevel has been a trap, let's avoid it.
2009-12-21Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/main/version.h src/mesa/state_tracker/st_atom_shader.c
2009-12-11Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
2009-12-10intel: Remove ARGB internal_format == GL_RGB hacksIan Romanick
Now that XRGB is supported, we don't need to hack around cases of an RGBA format buffer with an internal format of GL_RGB.
2009-12-18i915: Fix GL_TEXTURE_MAX_LEVEL support (piglit levelclamp test).Eric Anholt
2009-12-18i915: Clean up some unnecessary x/y miptree code.Eric Anholt
The base of the texture is always the base of the miptree. If it wasn't, we'd have issues with this code due to miptrees not walking the same direction for all LODs.
2009-11-19intel: Remove our special color packing macros and just use colormac.h.Eric Anholt
2009-10-29intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul
Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
2009-10-29i915: Fix 1D texture mapping in the t coordinate.Eric Anholt
Fixes piglit tex1d-2dborder test.
2009-10-29i915: Correct and make use of the defines for 32-bit depth texture modes.Eric Anholt
Previously, S8_Z24 depth textures would always be treated as intensity. Fixes piglit depth-tex-modes.
2009-10-29i915: Implement min/max LOD clamping with the hardware.Eric Anholt
This gets us expected behavior for clamping between mipmap levels, and avoids relayout of textures for doing clamping. Fixes piglit lodclamp-between.
2009-10-28Merge branch 'texformat-rework'Brian Paul
Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
2009-10-27i915: Fix driver for the miptree x/y offset changes.Eric Anholt
Bug #24734.
2009-10-21i915: replace MESA_FORMAT_Z24_S8 with MESA_FORMAT_S8_Z24Brian Paul
And change parameter type.
2009-10-12intel: pass zslice to intel_miptree_image_offset()Brian Paul
This lets us get rid of intel_miptree_depth_offsets() and simplify all of the calling code.
2009-10-08mesa: remove a bunch of gl_renderbuffer fieldsBrian Paul
_ActualFormat is replaced by Format (MESA_FORMAT_x). ColorEncoding, ComponentType, RedBits, GreenBits, BlueBits, etc. are all replaced by MESA_FORMAT_x queries.
2009-10-05drivers: don't include texformat.hBrian Paul
And remove other unneeded #includes while we're at it.
2009-09-30mesa: replace gl_texture_format with gl_formatBrian Paul
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
2009-06-04i915: Don't rely on fence regs when we don't have to.Eric Anholt
We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them.
2009-04-23i915: fix fix for anisotropic filteringRoland Scheidegger
forgot to commit the changes to actually support 4x aniso filtering...
2009-04-01dri: use BorderColor instead of _BorderChanBrian Paul
2009-03-20Fix DRI2 accelerated EXT_texture_from_pixmap with GL_RGB format.Eric Anholt
This requires upgrading the interface so that the argument to glXBindTexImageEXT isn't just dropped on the floor. Note that this only fixes the accelerated path on Intel, as Mesa's texture format support is missing x8r8g8b8 support (right now, GL_RGB textures get uploaded as a8r8gb8, but in this case we're not doing the upload so we can't really work around it that way). Fixes bugs with compositors trying to use shaders that use alpha channels, on windows without a valid alpha channel. Bug #19910 and likely others as well. Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
2008-12-18i915: check WRAP_T instead of WRAP_R for cube map texture.Xiang, Haihao
2008-12-11i915: fallback for cube map texture.Xiang, Haihao
The i915 (and related graphics cores) only support TEXCOORDMODE_CLAMP and TEXCOORDMODE_CUBE when using cube map texture coordinates, so fall back to software rendering for other modes to avoid potential gpu hang issue. This fixes scorched3d issue on 945GM(see bug 14539).
2008-10-08i915: Accelerate depth textures with border color.Eric Anholt
The fallback was introduced to fix bug #16697, but made the test it was fixing run excessively long.
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul
Makefile.template
2008-09-10intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.Eric Anholt
2008-09-04intel: Fix depth_stencil texture.Xiang, Haihao
2008-07-09i915: fall back to software rendering when shadow comparison isXiang, Haihao
enabled for 1D texture. fix #12176
2008-06-04i915: Fix GL_DEPTH_TEXTURE_MODE issue. (bug #16221)Xiang, Haihao
2008-03-31i915: texture object's lod bias. fix bug #15192Xiang, Haihao
2008-03-26[i915] don't use 4x4 filter for 1D shadowmapZou Nan hai
2008-03-20[i915] GL_DEPTH_TEXTURE_MODE fixZou Nan hai
2008-03-14intel: fix abort issue with shadowtex demo when useXiang, Haihao
DEPTH_STENCIL texture. (bug#14952).
2007-12-25i915: apply commit a0a5e8cfc04c14873441b50f7d594ef11806b9a8 from 965.Xiang, Haihao
fix #11925
2007-09-24Move i915tex driver into place as just i915.Eric Anholt
2007-09-24Remove the old i915 driver now that i915tex works without TTM.Eric Anholt
2007-08-13i915: satisfy certain alignment restrictions for smallXiang, Haihao
compressed texture
2007-06-05Add PCI IDs for the G33, Q33, and Q35 chipsets.Wang Zhenyu
2007-05-31i915: Add support for 945GME chipWang Zhenyu
2007-05-19fix small s3tc mipmaps (#10968)Roland Scheidegger
make sure that always whole blocks are uploaded. (May still not work correctly if the top mip map is not at least a full block, that is 4 pixels wide - not sure, but probably doesn't happen in real world)
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