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2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-06-05i915: Only emit a MI_FLUSH when the drawing rectangle offset changes.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-06-05i915: Fix off-by-one for drawing rectangle.Chris Wilson
The drawing rectangle is given in *inclusive* pixel values, so the range is only [0,2047]. Hence when rendering to a 2048 wide target, such as an extended desktop, we would issue an illegal instruction zeroing the draw area. Fixes: Bug 27408: Primary and Secondary display blanks in extended desktop mode with Compiz enabled https://bugs.freedesktop.org/show_bug.cgi?id=27408 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-06-05i915: Inhibit render cache flush when changing drawing rectangle offset.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2010-03-03i915: Use x,y drawing offsets instead of changing buffer offsets.Eric Anholt
This should fix rendering into mipmaps of tiled textures.
2010-02-18i915: update render buffers at prepare_render timeJesse Barnes
We need to do this before we emit any state dependent on the current render buffers.
2010-01-30i915: Remove unnecessary headers.Vinson Lee
2010-01-28i915: Remove unused initial and current state, now that there's nothing else.Eric Anholt
2010-01-28intel: Remove long-disabled meta readpixels, and associated meta support.Eric Anholt
2010-01-25Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/intel/intel_screen.c src/mesa/drivers/dri/intel/intel_swapbuffers.c src/mesa/drivers/dri/r300/r300_emit.c src/mesa/drivers/dri/r300/r300_ioctl.c src/mesa/drivers/dri/r300/r300_tex.c src/mesa/drivers/dri/r300/r300_texstate.c
2010-01-22i915: Remove unnecessary headers.Vinson Lee
2010-01-21dri: Remove unnecessary glapi headers.Chia-I Wu
They are not used at all.
2010-01-04intel: Drop more cliprect bookkeepingKristian Høgsberg
2010-01-04intel: Drop batchbuffer cliprect_mode trackingKristian Høgsberg
2009-12-22intel: Replace some gen3 IS_* checks with context structure usage.Eric Anholt
Shaves 400 bytes or so from i915_dri.so.
2009-12-11Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/gallium/state_trackers/xorg/xorg_xv.c src/mesa/drivers/dri/intel/intel_span.c
2009-12-10intel: Axe intel_renderbuffer::texformatIan Romanick
Since the texformat branch merge, the value of intel_renderbuffer::texformat is just a copy of gl_renderbuffer::Format.
2009-11-19intel: Consistently use no_batch_wrap in intel_context struct.Eric Anholt
2009-11-06intel: Use PIPE_CONTROL on gen4 hardware for doing pipeline flushing.Eric Anholt
This should do all the things that MI_FLUSH did, but it can be pipelined so that further rendering isn't blocked on the flush completion unless necessary.
2009-10-29intel: update intel_create_renderbuffer(format), add XRGB supportBrian Paul
Pass a gl_format to intel_create_renderbuffer() instead of GLenum. Add cases for MESA_FORMAT_XRGB8888 textures and renderbuffers. However, we don't yet create any renderbuffers or textures with that format. It seems the default alpha value is zero instead of one. Need to investigate that first.
2009-10-28Merge branch 'texformat-rework'Brian Paul
Conflicts: src/mesa/drivers/dri/radeon/radeon_fbo.c src/mesa/drivers/dri/s3v/s3v_tex.c src/mesa/drivers/dri/s3v/s3v_xmesa.c src/mesa/drivers/dri/trident/trident_context.c src/mesa/main/debug.c src/mesa/main/mipmap.c src/mesa/main/texformat.c src/mesa/main/texgetimage.c
2009-10-05drivers: don't include texformat.hBrian Paul
And remove other unneeded #includes while we're at it.
2009-10-01Revert "i915: don't validate PS program when falling back to software"Eric Anholt
This reverts commit e7044d552c6d16389447880b8744a51de1cf0199. It prevented the driver from ever recovering from a software fallback due to a program error. The original bug it claimed to fix doesn't appear to exist post-revert.
2009-09-30mesa: replace gl_texture_format with gl_formatBrian Paul
Now gl_texture_image::TexFormat is a simple MESA_FORMAT_x enum. ctx->Driver.ChooseTexture format also returns a MESA_FORMAT_x. gl_texture_format will go away next.
2009-08-04intel: Add support for EXT_provoking_vertex.Eric Anholt
2009-07-29i915: Add support for EXT_stencil_two_side and ATI_separate_stencil.Eric Anholt
Passes tests/stencil_twoside and glean/stencil2.
2009-06-29intel: Move note_unlock() implementation to the one place it's needed.Eric Anholt
2009-06-09i915: Add an option for testing the effect of early Z in classic mode.Eric Anholt
The early Z stuff is supposed to be unsafe without some more work in the enable/disable path (in particular, how do we want to get it disabled on the way out to the X Server?), but at the moment is 6% in OA.
2009-06-04i915: Don't rely on fence regs when we don't have to.Eric Anholt
We're on the way to telling the kernel about when we need fence regs on our objects or not, and this will cut the number of places needing them.
2009-04-16intel: Add support for argb1555, argb4444 FBOs and fix rgb565 fbo readpixels.Eric Anholt
Also enable them all regardless of screen bpp, as 32 bpp what I've been testing against, and haven't been able to detect any screen bpp-specific troubles with them.
2008-12-18i915: fix abort issue. (bug #19147)Xiang, Haihao
2008-10-28intel: Don't keep intel->pClipRects, and instead just calculate it when needed.Eric Anholt
This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change.
2008-09-26intel: Fix a number of memory leaks on context destroy.Eric Anholt
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul
Makefile.template
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
2008-06-23i915: Accumulate the VB into a local buffer and subdata it in.Eric Anholt
This lets GEM use pwrite, for an additional 4% or so speedup.
2008-06-23i915: Convert to using VBs instead of inline prims.Eric Anholt
2008-06-11[intel-gem] Chase domain flag renaming in the DRM.Eric Anholt
This is an API breakage only.
2008-05-07GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.Eric Anholt
The GEM flags are much more descriptive for what we need. Since this makes bufmgr_fake rather device-specific, move it to the intel common directory. We've wanted to do device-specific stuff to it before.
2008-04-18i915: check for depth region before accounting its buffer sizeDave Airlie
fd.o bz #15573
2008-04-16intel: fix _mesa_error ctx I introduced at lsat minuteDave Airlie
2008-04-16intel/fake_bufmgr: Attempt to restrict references to objects in a ↵Dave Airlie
batchbuffer > aperture size. So with compiz on Intel hw with fake bufmgr, opening 4 firefox windows at 1680x1050 and hitting alt-tab, could cause the batchbuffer to try and reference more than the 32MB of RAM allocated. Fix 1: Fix 1 is to pre-verify the list of buffers against the current batchbuffer and if it can't possibly fit in the aperture to flush the batchbuffer to the hardware and try again. If the buffers still can't fit well then you are hosed as I'm not sure there is a nice way to tell anyone. Fix 2: Next problem was that even with a simple check for total < aperture, we ran into fragmentation issues, this meant that half way down a set of buffers, we would fail as no blocks were available. Fix this by nuking the memory manager from orbit and letting it start again and relayout the blocks in a manner that fits. Fix 3: Finally the initial problem we were seeing was a memcpy to a NULL backing store. We seem to end up with a texture at some point that never gets mapped but ends up with data in it. compiz al-tab icons have this property. So I created a card dirty bit that memcpy's any buffer that is !static and is written to back to memory. This probably is wrong but it makes compiz work for now. Caveats: 965 support is still fail.
2008-03-25intel: fix the issue "VBO: Cannot allocate memory for a BO" onXiang, Haihao
965 after merging intel_context.c from i915 and i965. fix bug# 15152.
2008-03-13 [i965] multiple rendering target supportZou Nan hai
2008-01-17[i915] Fix driver from cliprects changes, and clean up state emission.Eric Anholt
The fix for pageflipping with cliprects ended up causing a batch flush at an inopportune time, which is fixed by moving it up. Additionally, the recovery code for handling batch wraps at bad times is replaced by just checking for the space up front, and using a no_batch_wrap assert like on 965 to make sure that we weren't wrong about how much space that was.
2008-01-10[intel] Add more cliprect modes to cover other meanings for batch emits.Eric Anholt
The previous change gave us only two modes, one which looped over the batch per cliprect (3d drawing) and one that didn't (state updeast). However, we really want 4: - Batch doesn't care about cliprects (state updates) - Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing) - Batch needs to be executed just once (region fills, copies, etc.) - Batch already includes cliprect handling, and must be flushed by unlock time (copybuffers, clears). All callers should now be fixed to use one of these states for any batchbuffer emits. Thanks to Keith Whitwell for pointing out the failure.
2008-01-09[intel] Rename lost_hardware vtbl entry to new_batch.Eric Anholt
Both drivers have ended up relying on lost_hardware being called after each batch buffer, so update the name. This removes one of the calls on 965 whic h was outside of the batchbuffer handling code and just duplicating what had already happened through batchbuffer handling.
2008-01-04i915: don't validate PS program when falling back to softwareXiang, Haihao
rendering. fix #12786