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path: root/src/mesa/drivers/dri/i915
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2007-12-22fix GL_LINE_LOOP with drivers using own render pipeline stage (#12410, #13527)Roland Scheidegger
primitive needs to include the begin/end flags (broken since vbo-0.2). Should fix missing first/last line segment on gamma, i810, i915, mga, r200, radeon, s3v, savage, unichrome (r300 already correct). Tested on r200, fixes #13527.
2007-12-21[intel] Move some pixel path support from drivers to shared.Eric Anholt
2007-12-21intel: cast a pointer to unsigned long, avoid potential error.Xiang, Haihao
2007-12-20[intel] Fix and reenable (software) SGIS_generate_mipmapEric Anholt
The core problem was that _mesa_generate_mipmap was not respecting RowStride of the source image. Additionally, the intel private data associated with the images (level and face) was not being initialized for the _mesa_generate_mipmap-generated images.
2007-12-20[i915] Move meta_draw_quad into the vtbl with other meta operations.Eric Anholt
2007-12-20i915: avoid dead lock in intel_meta_draw_poly. fix #13696Xiang, Haihao
2007-12-18[915] Free dri_bufmgr after mesa context data.Eric Anholt
Fixes a crash when buffer objects are left around until context destroy.
2007-12-18[915] Make polygon stipple use pre-unpacked pixel data.Eric Anholt
This fixes a crash when stippling using data from a PBO.
2007-12-18[Intel] Centralize mipmap pitch computations.Keith Packard
mipmap pitches must account for the device alignment requirements, which used to be fairly simple; just align to a 4-byte boundary. However, to allow textures to be drawn to under TTM, they now need to be aligned to a 64-byte boundary. Placing all of the alignment constraints in a single function allows this new constraint to be applied uniformly. There was some pitch constraining code in intel_miptree_create, but that was modifying the pitch long after the miptree had been layed out, so it only served to wreck the mipmap and cause rendering errors.
2007-12-13[intel] Enable INTEL_DEBUG=bufmgr output in TTM mode as well as classic.Eric Anholt
2007-12-12[intel] Move bufmgr back to context instead of screen, fixing glthreads.Eric Anholt
Putting the bufmgr in the screen is not thread-safe since the emit_reloc changes. It also led to a significant performance hit from pthread usage for the attempted thread-safety (up to 12% of a cpu spent on refcounting protection in single-threaded 965). The motivation had been to allow multi-context bufmgr sharing in classic mode, but it wasn't worth the cost.
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
This is currently believed to work but be a significant performance loss. Performance recovery should be soon to follow. The dri_bo_fake_disable_backing_store() call was added to allow backing store disable like bufmgr_fake.c did, which is a significant performance win (though it's missing the no-fence-subdata part). This commit is a squash merge of the 965-ttm branch, which had some history I wanted to avoid pulling due to noisiness and brokenness at many points for git-bisecting.
2007-12-07i915: fix the error in the previos commit.Xiang, Haihao
2007-12-07i915: Check the program size when uploading a program. fix bug 13494Xiang, Haihao
2007-12-03i915: Fix up state changes for i8xx.Michel Dänzer
2007-11-29[i915] Make INTEL_DEBUG=bufmgr actually do things for bufmgr_fake.Eric Anholt
2007-11-26i915: Catch cases where not all state is emitted for a new batchbuffer.Keith Whitwell
This could lead to incorrect rendering or even lockups.
2007-11-25intel: Fix relative symlinks.Michel Dänzer
2007-11-16[intel] Add 965 support to shared intel_blit.cEric Anholt
This requires that regions grow a marker of whether they are tiled or not, because fence (surface) registers are ignored by the 965 2D engine.
2007-11-16[intel] Move additional code to be shared from intel_context.h to intel/.Eric Anholt
2007-11-16[intel] Move intel_tex.h into place, forgotten in the previous commit.Eric Anholt
2007-11-16[i915] Add INTEL_DEBUG=sync debug flag to wait for fences after making them.Eric Anholt
2007-11-16[i915] Push locking in intelClearWithTris down inside meta_draw_poly.Eric Anholt
The lock coverage and checks for cliprects were unneeded since the batchbuffer will have INTEL_BATCH_CLIPRECTS anyway. It appeared to be a leftover from intelClearWithBlit. This makes the locking requirements of i915 meta_draw_quad match i965 meta_draw_quad.
2007-11-09[i915] Remove old frontbuffer rotation hack.Eric Anholt
This was replaced in previous releases of xserver/dri/libGL by reporting the damage to the frontbuffer so that the server and driver could handle it appropriately.
2007-11-09[intel] Move over files that will be shared with 965-fbo work.Eric Anholt
2007-11-01i915: make i915 use the cached mappings for batch/buffer objects.Dave Airlie
This should restore gears speed on 9xx hardware
2007-10-30More vblank cleanups.Michel Dänzer
* Fix crash at context creation in most drivers supporting vblank. * Don't pass vblank sequence or flags to functions that get passed the drawable private already. * Attempt to initialize vblank related drawable private fields just once per drawable. May need more work in some drivers.
2007-10-29[i915] Include header to pick up intel_ttm_bo_create_from_handle() proto.Eric Anholt
2007-10-29Merge branch 'origin'Eric Anholt
2007-10-29Refactor and fix core vblank supportJesse Barnes
Consolidate support for synchronizing to and retrieving vblank counters. Also fix the core vblank code to return monotonic MSC counters, which are required by some GLX extensions. Adding support for multiple pipes to a low level driver is fairly easy, the Intel 965 driver provides simple example code (see intel_buffers.c:intelWindowMoved()). The new code bumps the media stream counter extension version to 2 and adds a new getDrawableMSC callback. This callback takes a drawablePrivate pointer, which is used to calculate the MSC value seen by clients based on the actual vblank counter(s) returned from the kernel. The new drawable private fields are as follows: - vblSeq - used for tracking vblank counts for buffer swapping - vblFlags - flags (e.g. current pipe), updated by low level driver - msc_base - MSC counter from the last time the current pipe changed - vblank_base - kernel DRM vblank counter from the last time the pipe changed Using the above variables, the core vblank code (in vblank.c) can calculate a monotonic MSC value. The low level DRI drivers are responsible for updating the current pipe (by setting VBLANK_FLAG_SECONDARY for example in vblFlags) along with msc_base and vblank_base whenever the pipe associated with a given drawable changes (again, see intelWindowMoved for an example of this). Drivers should fill in the GetDrawableMSC DriverAPIRec field to point to driDrawableGetMSC32 and add code for pipe switching as outlined above to fully support the new scheme.
2007-10-18i915: Add some sanity checks to blit command debugging code.Michel Dänzer
2007-10-17i915: Don't emit 'empty' blit rectangles.Michel Dänzer
The hardware seems to interpret them differently and produce unexpected results...
2007-10-16Replace symlink generation from i915 with files in intel/ and symlinks there.Eric Anholt
2007-10-16i915: Make sure extensions that require TTM actually work.Michel Dänzer
2007-10-16i915: fixup TTM interfaces to follow drm changesDave Airlie
2007-10-16i915: Re-enable __DRItexOffsetExtension.Michel Dänzer
This seems to have got lost somehow during the recent DRI interface changes.
2007-10-12Merge branch 'dri2'Kristian Høgsberg
Conflicts: src/mesa/drivers/dri/i915/intel_screen.c
2007-10-12Merge branch 'master' into i915-superioctlDave Airlie
2007-10-12i915: only enable TTM path if drm minor is > 11 for superioctlDave Airlie
2007-10-12i915: fixup reloc header definesDave Airlie
2007-10-11Drop no longer implemented MESA allocate extension from i915.Kristian Høgsberg
2007-10-11Add a version field to __DRIextension.Kristian Høgsberg
2007-10-11Add a DRI_ReadDrawable marker extension to signal read drawable capability.Kristian Høgsberg
2007-10-11Move media stream counter entry points to new extension.Kristian Høgsberg
2007-10-11Move GLX_MESA_swap_frame_usage DRI entry points to the new mechanism.Kristian Høgsberg
2007-10-11Move GLX_MESA_allocate_memory related functions to new extension mechanism.Kristian Høgsberg
2007-10-10Move swap_interval to new extension mechanism.Kristian Høgsberg
2007-10-10Move the copySubBuffer extension over to the new mechanism.Kristian Høgsberg
2007-10-10Pull createNewScreen entry point into dri_util.c.Kristian Høgsberg
This pulls the top level createNewScreen entry point out of the drivers and rewrites __driUtilCreateNewScreen in dri_util.c to be the new entry point. The change moves more logic into the common/ layer and changes the createNewScreen entry point to only be defined in one place.
2007-10-10Replace open-coded major, minor, and patch version fields with __DRIversionRec.Kristian Høgsberg