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path: root/src/mesa/drivers/dri/i915
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2011-03-16android: Add __DRI_IMAGE_FORMAT_RGBA8888_REV.Chia-I Wu
2011-03-11mesa: replace NEED_SECONDARY_COLOR(), RGBA_LOGICOP_ENABLED() with inlinesBrian Paul
and rename them.
2011-03-07i915: Only invert wpos when rendering to the system framebuffer.Henri Verbeet
2011-03-07i915: Derive the gl_fragment_program from i915_fragment_program.Henri Verbeet
Instead of using the current gl_fragment_program. These aren't necessarily the same, for example when translate_program() is called by i915ValidateFragmentProgram().
2011-02-23i915: And remember assign the new value to the state reg...Chris Wilson
Fixes regression from 298ebb78de8a6b6edf0aa0fe8d784d00bbc2930e. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34589 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i915: Emit a single relocation per vboChris Wilson
Reducing the number of relocations has lots of nice knock-on effects, not least including reducing batch buffer size, auxilliary array sizes (vmalloced and copied into the kernel), processing of uncached relocations etc. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i915: Suppress emission of redundant stencil updatesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i915: Separate BLEND from general context state.Chris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i915: Only flag context changes if the actual state is changedChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i915: suppress repeated sampler state emissionChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21i915: Eliminate redundant CONSTANTS updatesChris Wilson
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-21intel: use pwrite for batchChris Wilson
It's faster. Not only is the memcpy more efficiently performed in the kernel (making up for the system call overhead), but by not using mmap we remove the greater overhead of tracking the vma of every batch. And it means we can read back from the batch buffer without incurring the cost of a uncached read through the GTT. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
2011-02-10i915: Force lowering of all types of indirect array accesses in the FSIan Romanick
NOTE: This is a candidate for the 7.9 and 7.10 branches.
2011-02-10i915: Calculate partial result to temp register firstIan Romanick
Previously the SNE and SEQ instructions would calculate the partial result to the destination register. This would cause problems if the destination register was also one of the source registers. Fixes piglit tests glsl-fs-any, glsl-fs-struct-equal, glsl-fs-struct-notequal, glsl-fs-vec4-operator-equal, glsl-fs-vec4-operator-notequal. NOTE: This is a candidate for the 7.9 and 7.10 branches.
2011-02-01i915: Only mark a register as available if all components are writtenIan Romanick
Previously a register would be marked as available if any component was written. This caused shaders such as this: 0: TEX TEMP[0].xyz, INPUT[14].xyyy, texture[0], 2D; 1: MUL TEMP[1], UNIFORM[0], TEMP[0].xxxx; 2: MAD TEMP[2], UNIFORM[1], TEMP[0].yyyy, TEMP[1]; 3: MAD TEMP[1], UNIFORM[2], TEMP[0].zzzz, TEMP[2]; 4: ADD TEMP[0].xyz, TEMP[1].xyzx, UNIFORM[3].xyzx; 5: TEX TEMP[1].w, INPUT[14].xyyy, texture[0], 2D; 6: MOV TEMP[0].w, TEMP[1].wwww; 7: MOV OUTPUT[2], TEMP[0]; 8: END to produce incorrect code such as this: BEGIN DCL S[0] DCL T_TEX0 R[0] = MOV T_TEX0.xyyy U[0] = TEXLD S[0],R[0] R[0].xyz = MOV U[0] R[1] = MUL CONST[0], R[0].xxxx R[2] = MAD CONST[1], R[0].yyyy, R[1] R[1] = MAD CONST[2], R[0].zzzz, R[2] R[0].xyz = ADD R[1].xyzx, CONST[3].xyzx R[0] = MOV T_TEX0.xyyy U[0] = TEXLD S[0],R[0] R[1].w = MOV U[0] R[0].w = MOV R[1].wwww oC = MOV R[0] END Note that T_TEX0 is copied to R[0], but the xyz components of R[0] are still expected to hold a calculated value. Fixes piglit tests draw-elements-vs-inputs, fp-kill, and glsl-fs-color-matrix. It also fixes Meego bugzilla #13005. NOTE: This is a candidate for the 7.9 and 7.10 branches.
2011-01-20intel: Fix typeos from 3d028024 and 790ff232Ian Romanick
...and remove egg from face.
2011-01-20i915: Set correct values for range/precision of fragment shader typesIan Romanick
2011-01-15mesa: begin implementation of GL_ARB_draw_buffers_blendBrian Paul
2011-01-10Revert "intel: Always allocate miptrees from level 0, not tObj->BaseLevel."Eric Anholt
This reverts commit 7ce6517f3ac41bf770ab39aba4509d4f535ef663. This reverts commit d60145d06d999c5c76000499e6fa9351e11d17fa. I was wrong about which generations supported baselevel adjustment -- it's just gen4, nothing earlier. This meant that i915 would have never used the mag filter when baselevel != 0. Not a severe bug, but not an intentional regression. I think we can fix the performance issue another way.
2011-01-07i915: Drop old checks for the settexoffset hack.Eric Anholt
2011-01-07intel: Add a vtbl hook for determining if a format is renderable.Eric Anholt
By relying on just intel_span_supports_format, some formats that aren't supported pre-gen4 were not reporting FBO incomplete. And we also complained in stderr when it happened on i915 because draw_region gets called before framebuffer completeness validation.
2011-01-05i915: Fix build for previous commit.Eric Anholt
2011-01-05intel: Clarify first_level/last_level vs baselevel/maxlevel by deletion.Eric Anholt
This has always been ugly about our texture code -- object base/max level vs intel object first/last level vs image level vs miptree first/last level. We now get rid of intelObj->first_level which is just tObj->BaseLevel, and make intelObj->_MaxLevel clearly based off of tObj->_MaxLevel instead of duplicating its code (incorrectly, as image->MaxLog2 only considers width/height and not depth!)
2011-01-05i915: Enable LOD preclamping on 8xx like on 915/965.Eric Anholt
Fixes lodclamp-between and lodclamp-between-max.
2011-01-05i915: Implement min/max lod clamping in hardware on 8xx.Eric Anholt
This avoids 8xx-specific texture relayout for min/max lod changes. One step closer to avoiding relayout for base/maxlevel changes!
2010-12-16i915: Fix INTEL_DEBUG=wm segmentation faultShuang He
The program should be disassembled after it's uploaded
2010-12-13i965: Add support for using the BLT ring on gen6.Eric Anholt
2010-12-01i915: Correctly generate unconditional KIL instructionsIan Romanick
Fixes piglit test glsl-fs-discard-03. NOTE: This is a candidate for the 7.9 branch.
2010-12-01i915: Request that POW instructions be loweredIan Romanick
2010-11-03i965: Remove dead intel_structs.h file.Eric Anholt
2010-10-13Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg
2010-10-13Rename GLvisual and __GLcontextModes to struct gl_configKristian Høgsberg
2010-10-08i915: Silence unused variable warning in non-debug builds.Vinson Lee
Fixes this GCC warning. i915_vtbl.c: In function 'i915_assert_not_dirty': i915_vtbl.c:670: warning: unused variable 'dirty'
2010-10-08i915: Silence unused variable warning in non-debug builds.Vinson Lee
Fixes this GCC warning. i830_vtbl.c: In function 'i830_assert_not_dirty': i830_vtbl.c:704: warning: unused variable 'i830'
2010-09-30dri/i915: remove duplicated includeNicolas Kaiser
Remove duplicated include. Signed-off-by: Brian Paul <brianp@vmware.com>
2010-09-27Remove GL_EXT_cull_vertexIan Romanick
This is only used in the i915 driver where it provides little benefit for very few applications that use it with fixed function TNL.
2010-09-23i915: Remove a dead if (0) block.Eric Anholt
2010-09-10intel: Remove noise opcode support from i915 and i965 driversIan Romanick
With recent changes to the GLSL compiler, these opcode should never be seen in these drivers.
2010-09-09glsl2: Add EmitNoNoise flag, use it to remove noise opcodesIan Romanick
2010-09-08glsl: make compiler options per-targetLuca Barbieri
This allows us to specify different options, especially useful for chips without unified shaders. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
2010-08-19i915: Remove unnecessary header from i830_context.c.Vinson Lee
2010-08-17i915: Add support for SSG opcode.Eric Anholt
Fixes glsl-fs-sign and many of the tests of trig builtins.
2010-08-17i915: Add support for reading output regs in the FS.Eric Anholt
Fixes glsl-unused-varying and many others, since we produce an output reg read any time gl_FragColor is written inside an if statement.
2010-08-17i915: Add support for OPCODE_DP2.Eric Anholt
Fixes glsl-fs-dot-vec2.
2010-08-16Merge branch 'glsl2'Ian Romanick
Conflicts: src/mesa/program/prog_optimize.c
2010-08-13Merge branch 'master' into glsl2Ian Romanick
2010-08-07dri: Add missing header m_xform.h.Vinson Lee
This is a follow-up patch to commit f4511c4835879090ce7e6afe3ac26b98fb91899a. Files that include tnl_dd/t_dd_dmatmp.h now need to also include m_xform.h as t_context.h no longer includes it.
2010-07-27intel: Remove unused intel/server filesKristian Høgsberg
2010-07-26Merge remote branch 'origin/master' into glsl2Eric Anholt
This pulls in multiple i965 driver fixes which will help ensure better testing coverage during development, and also gets past the conflicts of the src/mesa/shader -> src/mesa/program move. Conflicts: src/mesa/Makefile src/mesa/main/shaderapi.c src/mesa/main/shaderobj.h
2010-07-19i915: Ask the compiler to flatten out all the if statements that it can.Eric Anholt