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path: root/src/mesa/drivers/dri/i915
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2008-12-18i915: fix abort issue. (bug #19147)Xiang, Haihao
2008-12-11i915: fallback for cube map texture.Xiang, Haihao
The i915 (and related graphics cores) only support TEXCOORDMODE_CLAMP and TEXCOORDMODE_CUBE when using cube map texture coordinates, so fall back to software rendering for other modes to avoid potential gpu hang issue. This fixes scorched3d issue on 945GM(see bug 14539).
2008-12-02intel: restore old vertex submit paths for i8xx hardware.Dave Airlie
Intel docs state that only 830/845 have VBOs, 855/865 don't. So lets just not use them on i8xx at all. This restores the old pre-vbo code and uses it on all 8xx hw.
2008-11-21i915: Don't overwrite i915's Viewport function from generic code.Eric Anholt
Instead, have i965 and i915 both call the generic function from their Viewport.
2008-11-20intel: fix i830 comment + backwards VB offsets.airlied
According to Keith the docs have these offsets the other way around
2008-10-28intel: Don't keep intel->pClipRects, and instead just calculate it when needed.Eric Anholt
This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change.
2008-10-21i915: fix carsh in i830_emit_state. (bug #17766)Xiang, Haihao
2008-10-13i915: Texture instructions use r/t/oC/oD register as texture coordinate.Xiang, Haihao
Fix http://bugs.freedesktop.org/show_bug.cgi?id=16287.
2008-10-08i915: Accelerate depth textures with border color.Eric Anholt
The fallback was introduced to fix bug #16697, but made the test it was fixing run excessively long.
2008-10-04i915: Refine the texture indirect lookup accounting.Eric Anholt
Without this, we would reject programs which sampled multiple times from registers defined in the same phase (block of instructions with the same texture indirection count), as each sample would count as a new phase beginning. Instead, keep track of which phases registers were written in, and only bump phase when we're reading from one generated in this phase. On the other hand, we failed to count oC or oD texture samples as being new phases. Bug #17865.
2008-10-01Unify ARB_depth_texture and SGIX_depth_textureIan Romanick
The ARB extension is a superset of the older SGIX extension. Any hardware that can support the SGIX version can also support the ARB version. In Mesa, any driver that supports one also supports the other. This unification just simplifies some bits of code.
2008-09-26intel: Fix a number of memory leaks on context destroy.Eric Anholt
2008-09-23i915: fix crash in flush_prim -> wait_flips -> flush_batch -> flush_prim.Eric Anholt
2008-09-18mesa: added "main/" prefix to includes, remove some -I paths from ↵Brian Paul
Makefile.template
2008-09-13i915: fix himask constant init for 64-bit buildGuillaume Melquiond
2008-09-10intel: track move of bo_exec from drivers to bufmgr.Eric Anholt
2008-09-10intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.Eric Anholt
2008-09-04intel: Fix depth_stencil texture.Xiang, Haihao
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
2008-07-25Merge branch 'master' into drm-gemIan Romanick
Conflicts: src/mesa/drivers/dri/common/dri_bufmgr.c src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-07-16intel: Clean-up ARB_texture_env_crossbarIan Romanick
Enable support for ARB_texture_env_crossbar in the master extension list instead of in every single device-specific list.
2008-07-14i915: fix build after previous commit.Eric Anholt
2008-07-09i915: fall back to software rendering when shadow comparison isXiang, Haihao
enabled for 1D texture. fix #12176
2008-06-26intel: Replace sprinkled intel_batchbuffer_flush with MI_FLUSH or nothing.Eric Anholt
Most of these were to ensure that caches got synchronized between 2d (or meta) rendering and later use of the target as a source, such as for texture miptree setup. Those are replaced with intel_batchbuffer_emit_mi_flush(), which just drops an MI_FLUSH. Most of the remainder were to ensure that REFERENCES_CLIPRECTS batchbuffers got flushed before the lock was dropped. Those are now replaced by automatically flushing those when dropping the lock.
2008-06-24Merge commit 'origin/master' into drm-gemEric Anholt
2008-06-24intel: Same pixel function init for everyone now.Eric Anholt
2008-06-24i915: Add support for accelerated glBitmap, shared from 965.Eric Anholt
2008-06-23i915: Accumulate the VB into a local buffer and subdata it in.Eric Anholt
This lets GEM use pwrite, for an additional 4% or so speedup.
2008-06-23i915: Convert to using VBs instead of inline prims.Eric Anholt
2008-06-18i915: Restore the accelerated PBO pixel path functions after GEM changes.Eric Anholt
The fencing code is not required, and waiting on the fences defeated one of the purposes of the extension, which is to allow asynchronous readpixels.
2008-06-18Merge commit 'origin/master' into drm-gemEric Anholt
2008-06-17[intel] Fix no_rast option on non-965.Eric Anholt
The no_rast fallback was getting partially overwritten by later TNL init, resulting in a segfault when things were in a mixed-up state.
2008-06-11[intel-gem] Chase domain flag renaming in the DRM.Eric Anholt
This is an API breakage only.
2008-06-04i915: Fix GL_DEPTH_TEXTURE_MODE issue. (bug #16221)Xiang, Haihao
2008-06-03[intel] Convert drivers to using libdrm bufmgr code.Eric Anholt
2008-05-23Emit a flush after the swapbuffers blit, so contents end up on the screen.Eric Anholt
Otherwise, since the MI_FLUSH at the end of every batch had been removed, non-automatic-flushing chips (965) wouldn't get flushed and apps with static rendering would get partial screen contents until the server's blockhandler flush kicked in.
2008-05-07GEM: Make dri_emit_reloc take GEM domain flags instead of TTM flags.Eric Anholt
The GEM flags are much more descriptive for what we need. Since this makes bufmgr_fake rather device-specific, move it to the intel common directory. We've wanted to do device-specific stuff to it before.
2008-05-05Add intel_bufmgr_gem.c to i915Keith Packard
2008-05-05Temporarily disable intel pixel ops on i915 for GEMKeith Packard
Instead of attempting to fix these for GEM, just disable until GEM is working.
2008-05-02[intel] Fix build for GEM. TTM is now disabled, and fencing is gone.Eric Anholt
Fencing was used in two places: ensuring that we didn't get too many frames ahead of ourselves, and glFinish. glFinish will be satisfied by waiting on buffers like we would do for CPU access on them. The "don't get too far ahead" is now the responsibility of the execution manager (kernel).
2008-05-02[intel] Merge intel_ioctl.h. Not sure how this slipped by in the .c merge.Eric Anholt
2008-04-18i915: check for depth region before accounting its buffer sizeDave Airlie
fd.o bz #15573
2008-04-16intel: fix _mesa_error ctx I introduced at lsat minuteDave Airlie
2008-04-16intel/fake_bufmgr: Attempt to restrict references to objects in a ↵Dave Airlie
batchbuffer > aperture size. So with compiz on Intel hw with fake bufmgr, opening 4 firefox windows at 1680x1050 and hitting alt-tab, could cause the batchbuffer to try and reference more than the 32MB of RAM allocated. Fix 1: Fix 1 is to pre-verify the list of buffers against the current batchbuffer and if it can't possibly fit in the aperture to flush the batchbuffer to the hardware and try again. If the buffers still can't fit well then you are hosed as I'm not sure there is a nice way to tell anyone. Fix 2: Next problem was that even with a simple check for total < aperture, we ran into fragmentation issues, this meant that half way down a set of buffers, we would fail as no blocks were available. Fix this by nuking the memory manager from orbit and letting it start again and relayout the blocks in a manner that fits. Fix 3: Finally the initial problem we were seeing was a memcpy to a NULL backing store. We seem to end up with a texture at some point that never gets mapped but ends up with data in it. compiz al-tab icons have this property. So I created a card dirty bit that memcpy's any buffer that is !static and is written to back to memory. This probably is wrong but it makes compiz work for now. Caveats: 965 support is still fail.
2008-03-31i915: texture object's lod bias. fix bug #15192Xiang, Haihao
2008-03-26[i915] don't use 4x4 filter for 1D shadowmapZou Nan hai
2008-03-25intel: fix the issue "VBO: Cannot allocate memory for a BO" onXiang, Haihao
965 after merging intel_context.c from i915 and i965. fix bug# 15152.
2008-03-20[i915] GL_DEPTH_TEXTURE_MODE fixZou Nan hai