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path: root/src/mesa/drivers/dri/i915tex
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2007-05-24Replace the flags/hint arguments to bo_alloc{,_static} with a location mask.Eric Anholt
Now, allocations only take locations, rather than a variety of unused flags. The only interesting flag before was the no_move/no_evict pair for scanout and similar buffers, which the DRI drivers don't use. That will be readded when we get to using this code for display buffer allocation, by adding a pin/unpin call (dynamic pinning/unpinning may be useful for VT switching and root window resizing). This commit changes one instance of DRM_BO_FLAG_MEM_LOCAL with DRM_BO_FLAG_MEM_TT, which appeared to have been unintentional.
2007-05-24Merge branch 'master' into i915-unificationEric Anholt
Conflicts: src/mesa/drivers/dri/i915tex/i830_texstate.c src/mesa/drivers/dri/i915tex/i915_texstate.c
2007-05-22Replace initInitState() with _mesa_init_driver_state().Brian
2007-05-22i915tex: Implement SetTexOffset hook.Michel Dänzer
Only build tested for I830 generation.
2007-05-22i915/i915tex: minor cleanup (remove unneeded function callRoland Scheidegger
2007-05-22unbreak 3d textures (typo when setting tex layout)Roland Scheidegger
2007-05-21Don't read beyond the end of the buffer with INTEL_DEBUG=bat.Eric Anholt
2007-05-21Enable INTEL_DEBUG environment variable.Eric Anholt
2007-05-21Remove unused intel_batchpool.c.Eric Anholt
This may need to be implemented again, but probably not as a buffer manager (pool).
2007-05-21Notify the fake buffer manager on contended lock take.Eric Anholt
2007-05-19fix miptree layout (i915) for small compressed mipmapsRoland Scheidegger
This seems to work now. Also fix i945 set_level_info, need to match i915 behaviour for storing mip height, as it's assumed to be the mip width (in texels) elsewhere and the division by 4 is done later (untested).
2007-05-19fix miptree comparison with compressed texturesRoland Scheidegger
TexelBytes is always 0 with compressed textures, thus would never match mt->cpp. This caused constant blitting around of textures, and it fixes at least the horrible performance of Q3 if compressed textures are enabled.
2007-05-18Merge branch 'master' into i915-unificationEric Anholt
Conflicts: src/mesa/drivers/dri/common/dri_bufmgr.c src/mesa/drivers/dri/common/dri_drmpool.c src/mesa/drivers/dri/i915tex/intel_batchpool.c src/mesa/drivers/dri/i915tex/intel_buffer_objects.c src/mesa/drivers/dri/i915tex/intel_regions.c src/mesa/drivers/dri/i915tex/intel_screen.c src/mesa/drivers/dri/i915tex/intel_screen.h
2007-05-18Fix a refcounting mistake with first_swap_fence.Eric Anholt
2007-05-18Kill old struct bufmgr members.Eric Anholt
2007-05-18Ratchet required version down to 1.5 (pre-TTM).Eric Anholt
2007-05-17Restore missing intel_batchbuffer_reset() which was needed.Eric Anholt
2007-05-17Rename the i915tex_dri.so driver to just i915_dri.so again.Eric Anholt
2007-05-17Convert i915tex to the new interface and make it compile.Eric Anholt
2007-05-09Clean-up in I830AllocVidMem(), s/int/unsigned long/ for ret variable.Brian
2007-05-08i915/miniglx: remove unused codeDave Airlie
2007-04-17Defer buffer pool creation to the first context creation.Thomas Hellstrom
This way we have a hw context so that we can take the hardware lock. Also, at this point, AIGLX isn't locked with the X server context as it is at screen creation.
2007-04-16just clean-upsBrian
2007-04-16remove _tnl_arb_vertex_program_stageBrian
2007-04-16Make sure we are locked when creating drm buffer objects.Thomas Hellstrom
Don't place buffer objects on unfenced list when newly created. Fix a buffer object wait-for-idle deadlock.
2007-04-11use _mesa_reference_renderbuffer(), fix typoBrian
2007-04-09i915tex: Fix some mismatches between texels or bytes for pitch/stride.Michel Dänzer
2007-04-09i915tex: Make sure texture format fetch hooks are initialized.Michel Dänzer
2007-04-08i915tex: Clean up resizing of renderbuffers.Michel Dänzer
2007-04-05include points.h to fix warningsBrian
2007-04-04i810/i915/i915tex: reinitialize the context point stateXiang, Haihao
2007-03-27i915tex compile fix (account for moved _UseTexEnvProgram var)Roland Scheidegger
2007-03-27Restore the UseTexEnvProgram logic.Brian
Was removed during glsl-compiler work. Still need to go back and revisit this because of the interaction with fragment shaders...
2007-03-26merge of glsl-compiler-1 branchBrian
2007-03-26i915tex: Make sure renderbuffers don't get deleted when flipping them.Michel Dänzer
Since the recent renderbuffer refcounting fixes it's no longer sufficient to just remove the old renderbuffer from the framebuffer and then add the new one because the former may decrease the reference count to 0 and delete the old renderbuffer.
2007-03-21merge from masterBrian
2007-03-19i915tex: The intended triple buffering fix.Michel Dänzer
Making modifications while the editor spawned by git-commit was suspended didn't have the intended effect.
2007-03-19i915tex: Fix triple buffering after recent Mesa core changes.Michel Dänzer
Remove superfluous _mesa_resize_framebuffer call which is now harmful because it causes the third renderbuffer to have width/height 0, so Mesa refuses to render to it. In the long term, it would be nice to remove the hack in intel_alloc_window_storage in favour of a proper Mesa interface for flipping between more than two colour buffers.
2007-03-18fix typo in subrect_disable packetKeith Whitwell
2007-03-15Fix off by one error in immediate state packet size.Keith Whitwell
2007-03-12i915tex: Don't crash when intel_fb->color_rb[i] is NULL.Michel Dänzer
This can be the case on some systems when running glxinfo.
2007-03-10Merge branch 'master' of git+ssh://brianp@git.freedesktop.org/git/mesa/mesa ↵Brian
into glsl-compiler-1
2007-03-10i915tex: Fix build against libdrm git...Michel Dänzer
2007-03-10i915tex: Fix intel_wait_flips being declared implicitly.Michel Dänzer
2007-03-10i915tex: Fix build against released version of libdrm.Michel Dänzer
2007-03-10Merge branch 'i915tex-pageflip'Michel Dänzer
2007-03-09i915tex: Wait for pending scheduled flips before switching vsync pipe.Michel Dänzer
This avoids hangs when the vblank sequence numbers are not in sync between pipes, in particular when they run at different refresh rates.
2007-03-09i915tex: Set intel_fb->vbl_waited to current instead of what we aimed for.Michel Dänzer
2007-03-09Merge branch 'origin' into glsl-compiler-1Brian
Conflicts: src/mesa/main/context.c
2007-03-09i915tex: Sync pages between pipes immediately again.Michel Dänzer
This should be safe now that we no longer use the MI_WAIT_FOR_EVENT instruction incorrectly and should also work correctly with applications that render to the front buffer.