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path: root/src/mesa/drivers/dri/i965/brw_context.h
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2010-08-27i965: When encountering an unknown opcode in new FS backend, print its name.Eric Anholt
2010-08-26i965: Start building 965 FS backend.Eric Anholt
2010-08-22i965: Fix up WM push constant setup on gen6.Eric Anholt
Fixes glsl-algebraic-add-add-1.
2010-06-12i965: Stream out CC unit state.Eric Anholt
before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 31.791 32.287 1.11% 6/6 after: [ 0] gl firefox-talos-gfx 31.198 31.675 0.96% 6/6
2010-06-11i965: Remove caching of surface state objects.Eric Anholt
It turns out that computing a 56 byte key to look up a 20-byte object out of a hash table was some sort of a bad idea. Whoops. before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 after: [ 0] gl firefox-talos-gfx 34.761 34.784 0.17% 5/6
2010-06-11i965: Convert the binding table to streamed indirect state.Eric Anholt
This slightly reduces reduces cairo-gl firefox-talos-gfx runtime on my Ironlake: before: [ # ] backend test min(s) median(s) stddev. count [ 0] gl firefox-talos-gfx 38.236 38.383 0.43% 5/6 after: [ 0] gl firefox-talos-gfx 37.799 38.203 0.39% 6/6 It turns out the cost of caching these objects and looking them up in the cache again is greater than the cost of just computing the object again, particularly when the overhead of having a separate BO to pin is removed. (Those that are paying close attention will note that this is a reversal of the path I was moving the driver in a couple of years ago. The major thing that has changed is that back then all state was recomputed when we wrapped the streaming state buffer, including recompiling our precious programs. Now, we're uncaching just the objects that are cheap to compute, and retaining caching of expensive objects)
2010-06-11i965: Split constant buffer setup from its surface state/binding state.Eric Anholt
This was bothering me when redoing the binding tables.
2010-06-11i965: Set the CC VP state immediately on state change.Eric Anholt
The cache lookup of these two little floats was .12% of total CPU time on firefox-talos-gfx because we did it any time commonly-changed state changed. On the other hand, updating the CC VP bo immediately whenver CC VP state changes is a .07% overhead due to putting a driver hoook in glEnable().
2010-06-09i965: Avoid calloc/free in the CURBE upload process.Eric Anholt
In exchange we end up with an extra memcpy, but that seems better than calloc/free. Each buffer is 4k maximum, and on the i965-streaming branch this allocation was showing up as the top entry in brw_validate_state profiling for cairo-gl.
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-05-23i965: Add support for all 8 possible ARB_draw_buffers in Mesa.Eric Anholt
We should be able to do 16, but are limited by Mesa's static buffer allocations.
2010-05-16i965: Remove the half-baked code for multiple OQs at the same time.Eric Anholt
GL doesn't actually let you begin an OQ while one is active, so the extra work was pointless.
2010-05-16i965: Remove unused occlusion query struct field.Eric Anholt
2010-05-14i965: Dump out the correct shared function for SEND on Ironlake.Eric Anholt
2010-04-28dri: Add DRI entrypoints to create a context for a given APIKristian Høgsberg
2010-03-10i965: Use the PLN instruction when possible in interpolation.Eric Anholt
Saves an instruction in PINTERP, LINTERP, and PIXEL_W from brw_wm_glsl.c For non-GLSL it isn't used yet because the deltas have to be laid out differently.
2010-02-25i965: Add Sandybridge scissor state.Eric Anholt
2010-02-25i965: Set up the SNB URB.Eric Anholt
even with vs disabled, still doesn't work.
2010-02-25i965: Start adding support for the Sandybridge CC unit.Eric Anholt
2010-02-06i965: Keep the CURBE BO mapped and memcpy instead of subdataing.Eric Anholt
For the tiny bis of data we generally upload through the CURBEs, the overhead of the kernel's pagetable trickery is actually rather high. This improves cairo-gl gnome-terminal-vim performance by 3.8%.
2010-01-19intel: Remove dead note_fence vtbl hook.Eric Anholt
2010-01-19i965: Upload as many VS constants as possible through the push constants.Eric Anholt
The pull constants require sending out to an overworked shared unit and waiting for a response, while push constants are nicely loaded in for us at thread dispatch time. By putting things we access in every VS invocation there, ETQW performance improved by 2.5% +/- 1.6% (n=6).
2010-01-19i965: Allow for variable-sized auxdata in the state cache.Eric Anholt
Everything has been constant-sized until now, but constant buffer handling changes will make us want some additional variable sized array.
2010-01-04Remove leftover __DRI{screen,drawable,context}Private referencesKristian Høgsberg
As part of the DRI driver interface rewrite I merged __DRIscreenPrivate and __DRIscreen, and likewise for __DRIdrawablePrivate and __DRIcontextPrivate. I left typedefs in place though, to avoid renaming all the *Private use internal to the driver. That was probably a mistake, and it turns out a one-line find+sed combo can do the mass rename. Better late than never.
2009-12-22intel: Replace IS_965 checks with context structure usage.Eric Anholt
Saves another 600 bytes or so of code.
2009-12-22intel: Replace IS_G4X() across the driver with context structure usage.Eric Anholt
Saves ~2KB of code.
2009-11-19intel: Consistently use no_batch_wrap in intel_context struct.Eric Anholt
2009-11-19i965: Pack brw_wm_fragment_program better.Eric Anholt
2009-11-17Merge branch 'outputswritten64'Ian Romanick
Add a GLbitfield64 type and several macros to operate on 64-bit fields. The OutputsWritten field of gl_program is changed to use that type. This results in a fair amount of fallout in drivers that use programs. No changes are strictly necessary at this point as all bits used are below the 32-bit boundary. Fairly soon several bits will be added for clip distances written by a vertex shader. This will cause several bits used for varyings to be pushed above the 32-bit boundary. This will affect any drivers that support GLSL. At this point, only the i965 driver has been modified to support this eventuality. I did this as a "squash" merge. There were several places through the outputswritten64 branch where things were broken. I foresee this causing difficulties later for bisecting. The history is still available in the branch. Conflicts: src/mesa/drivers/dri/i965/brw_wm.h
2009-11-13i965: Remove an unused cache_item field.Eric Anholt
2009-11-13i965: Remove long dead structures for ffvertex_prog.c.Eric Anholt
2009-11-06i965: Always pass the size argument to brw_cache_data.Eric Anholt
This keeps the individual state files from having to export their structures for brw_state_cache initialization.
2009-10-29i965: define, use BRW_MAX_DRAW_BUFFERSBrian Paul
i965 might support more than 4 color draw buffers. But if not, this protects from breakage if the Mesa limit is raised.
2009-10-27Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul
This reverts commit 8810b8f67135185d1044746bb861fe2ff997626c. It turns out the i965 driver uses the intel->Fallback field as a boolean, not as a bitmask. The intelFallback() function is a no-op in the i965 driver. It would have been nice if there were some comments about this. I'll fix that next...
2009-10-22Merge branch 'mesa_7_6_branch'Brian Paul
2009-10-22i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul
Setting intel->Fallback = 1 clobbered any fallback state that was already set. Not sure where this hack originated (the git history is a little convoluted). Define and use a new BRW_FALLBACK_DRAW bit instead. This shouldn't break anything and could potentially fix some bugs (but no specific ones are known).
2009-10-22i965: remove unused brw_context::tmp_fallback fieldBrian Paul
2009-10-22i965: remove unused BRW_FALLBACK_TEXTURE bitBrian Paul
The value was probably wrong too. It was the same as INTEL_FALLBACK_DRAW_BUFFER.
2009-09-28intel: Remove some dead metaops code.Eric Anholt
2009-09-09Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul
Conflicts: Makefile configs/default progs/glsl/Makefile src/gallium/auxiliary/util/u_simple_shaders.c src/gallium/state_trackers/glx/xlib/xm_api.c src/mesa/drivers/dri/i965/brw_draw_upload.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/intel/intel_context.h src/mesa/drivers/dri/intel/intel_pixel.c src/mesa/drivers/dri/intel/intel_pixel_read.c src/mesa/main/texenvprogram.c src/mesa/main/version.h
2009-09-08i965: fix incorrect test for vertex position attributeBrian Paul
2009-09-04i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
The code duplication bothered me. (cherry picked from commit 9b9cb30d128fc5f1ba77287696ecd508e640efde)
2009-08-26i965: keep track of which texture units the fragment shader accessesBrian Paul
We'll use this for debug/sanity checking.
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt
No performance difference proven at 95% confidence with my GLSL demo (n=10).
2009-08-07i965: minor context commentsBrian Paul
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out, and running intel-gen4disasm on it.
2009-08-03i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
The code duplication bothered me.
2009-07-07i965: Remove BRW_NEW_INPUT_VARYINGEric Anholt
This state flag has been unused since the ffvertex_prog move to core.
2009-06-30i965: move BRW_MAX_GRF, define BRW_MAX_MRFBrian Paul
2009-06-30i965: defined BRW_MAX_MRFBrian Paul