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path: root/src/mesa/drivers/dri/i965/brw_disasm.c
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2010-07-22i965: Fix the disasm output for da16 src widths.Eric Anholt
This has confused me twice now. It's a fixed width of 4 (usually a region description of <4,4,1>), not 1. If it was 1, we'd have been skipping all over register space.
2010-07-21i965: Add disasm for dataport reads (register unspilling).Eric Anholt
2010-07-08i965: Add disasm for SEND mlen/rlen on Sandybridge.Eric Anholt
2010-07-08i965: Fix disasm of a SEND's mlen and rlen on Ironlake.Eric Anholt
2010-07-08i965: Add decode for Sandybridge DP write messages.Zhenyu Wang
2010-05-14i965: Parse the ff_sync URB send opcode on Ironlake disasm.Eric Anholt
2010-05-14i965: Dump out the correct shared function for SEND on Ironlake.Eric Anholt
2010-03-22i965: Add disasm for SNB MATH opcode.Eric Anholt
2010-03-10i965: Use the PLN instruction when possible in interpolation.Eric Anholt
Saves an instruction in PINTERP, LINTERP, and PIXEL_W from brw_wm_glsl.c For non-GLSL it isn't used yet because the deltas have to be laid out differently.
2010-03-10i965: Print the offset for IFF in disasmEric Anholt
2010-03-09i965: Print the offsets for WHILE and BREAK in disasm.Eric Anholt
2009-12-31Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: configs/darwin src/gallium/auxiliary/util/u_clear.h src/gallium/state_trackers/xorg/xorg_exa_tgsi.c src/mesa/drivers/dri/i965/brw_draw_upload.c
2009-12-26i965: Fix setup of immediate types for gen4 disasm.Eric Anholt
Caught by clang.
2009-12-24i965: Add missing va_end.Vinson Lee
2009-08-04i965: Print out ELSE and ENDIF src1 arguments like IF does.Eric Anholt
2009-08-04i965: Hook up the disassembler for INTEL_DEBUG={wm,vs}.Eric Anholt
I was getting tired of doing the dance of INTEL_DEBUG=batch, copying it out, and running intel-gen4disasm on it.
2009-08-04i965: Initial import of disasm code from intel-gen4asm.Eric Anholt
There's a bunch of stuff from gen4asm and gpu-tools that we probably want to make into a library instead of cargo-culting it around.