summaryrefslogtreecommitdiff
path: root/src/mesa/drivers/dri/i965/brw_draw_upload.c
AgeCommit message (Collapse)Author
2010-11-03intel: Annotate debug printout checks with unlikely().Eric Anholt
This provides the optimizer with hints about code hotness, which we're quite certain about for debug printouts (or, rather, while we developers often hit the checks for debug printouts, we don't care about performance while doing so).
2010-10-13Drop GLcontext typedef and use struct gl_context insteadKristian Høgsberg
2010-10-12i965: Don't rebase the index buffer to min 0 if any arrays are in VBOs.Eric Anholt
There was a check to only do the rebase if we didn't have everything in VBOs, but nexuiz apparently hands us a mix of VBOs and arrays, resulting in blocking on the GPU to do a rebase. Improves nexuiz 800x600, high-settings performance on my Ironlake 41% (+/- 1.3%), from 14.0fps to 19.7fps.
2010-08-22i965: Use intel->gen >= 6 instead of IS_GEN6.Eric Anholt
2010-06-08intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.Eric Anholt
The slightly less mechanical change of converting the emit_reloc calls will follow.
2010-05-14i965: Use R16G16B16A16_FLOAT for 3-component half-float.Eric Anholt
The RGBX version isn't supported as a vertex input type, but since we force the last channel's value anyway, this should be fine. The only potential risk I see is in the limiter on VBO reads past the end of the buffer forcing the whole vertex to 0 when the A channel lands past the end. Fixes piglit draw-vertices-half-float.
2010-04-21intel: Clean up chipset name and gen num for IronlakeZhenyu Wang
Rename old IGDNG to Ironlake, and set 'gen' number for Ironlake as 5, so tracking the features with generation num instead of special is_ironlake flag. Reviewed-by: Eric Anholt <eric@anholt.net> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
2010-03-04intel: Remove non-kernel-exec-fencing support.Eric Anholt
Shaves 60k off the driver from removing the broken spans code. This means we now require 2.6.29, which seems fair given that it's a year old and we've removed support for non-KMS already in the last release of 2D.
2010-02-25i965: Fix up some Sandybridge define checks for the structure rebase.Eric Anholt
2010-02-25i965: Reconnect the index/vertex setup.Eric Anholt
2010-02-19Replace the _mesa_*printf() wrappers with the plain libc versionsKristian Høgsberg
2010-02-19Replace _mesa_malloc, _mesa_calloc and _mesa_free with plain libc versionsKristian Høgsberg
2010-01-25Merge branch 'mesa_7_7_branch'Brian Paul
Conflicts: src/mesa/drivers/dri/intel/intel_screen.c src/mesa/drivers/dri/intel/intel_swapbuffers.c src/mesa/drivers/dri/r300/r300_emit.c src/mesa/drivers/dri/r300/r300_ioctl.c src/mesa/drivers/dri/r300/r300_tex.c src/mesa/drivers/dri/r300/r300_texstate.c
2010-01-22i965: Remove unnecessary headers.Vinson Lee
2010-01-23i965: add support for ARB_half_float_vertexDave Airlie
enables the extension on i965 and adds support to the draw upload for the vertex format. Signed-off-by: Dave Airlie <airlied@redhat.com>
2010-01-04intel: Drop batchbuffer cliprect_mode trackingKristian Høgsberg
2009-12-28intel: Silence compiler warnings.Vinson Lee
2009-12-22intel: Replace IS_IGDNG checks with intel->is_ironlake or needs_ff_sync.Eric Anholt
Saves ~480 bytes of code.
2009-11-19intel: Remove non-GEM support.Eric Anholt
This really isn't supported at this point. GEM's been in the kernel for a year, and the fake bufmgr never really worked.
2009-11-13Merge remote branch 'origin/mesa_7_6_branch'Eric Anholt
2009-11-12i965: Fix VBO last-valid-offset setup on Ironlake.Eric Anholt
Instead of doing math based on the (broken for VBO && offset != 0) input->count number, just use the BO size. Fixes assertion failure in ETQW.
2009-10-27i965: be clear that the Fallback field is a boolean, not a bitfieldBrian Paul
2009-10-27Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul
This reverts commit 8810b8f67135185d1044746bb861fe2ff997626c. It turns out the i965 driver uses the intel->Fallback field as a boolean, not as a bitmask. The intelFallback() function is a no-op in the i965 driver. It would have been nice if there were some comments about this. I'll fix that next...
2009-10-27i965: be clear that the Fallback field is a boolean, not a bitfieldBrian Paul
2009-10-27Revert "i965: fix hacked Fallback usage in brw_prepare_vertices()"Brian Paul
This reverts commit 8810b8f67135185d1044746bb861fe2ff997626c. It turns out the i965 driver uses the intel->Fallback field as a boolean, not as a bitmask. The intelFallback() function is a no-op in the i965 driver. It would have been nice if there were some comments about this. I'll fix that next...
2009-10-22Merge branch 'mesa_7_6_branch'Brian Paul
2009-10-22i965: fix hacked Fallback usage in brw_prepare_vertices()Brian Paul
Setting intel->Fallback = 1 clobbered any fallback state that was already set. Not sure where this hack originated (the git history is a little convoluted). Define and use a new BRW_FALLBACK_DRAW bit instead. This shouldn't break anything and could potentially fix some bugs (but no specific ones are known).
2009-10-14Merge branch 'mesa_7_6_branch'Brian Paul
2009-10-11i965: Fix the last valid address setting for the index buffer.Eric Anholt
Again, last valid address, not first invalid address. Fixes regression in 255e5be265133280293bbfd8b2f9b74b2dec50bb that the kernel now catches and caused piglit draw_elements_base_vertex to fail.
2009-10-11i965: Fix the bounds emitted in the vertex buffer packets.Eric Anholt
It's the address of the last valid byte, not the address of the first invalid byte. This should also fix problems with rendering with the new sanity checks in the kernel.
2009-09-09Merge branch 'mesa_7_6_branch'Brian Paul
2009-09-09Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul
Conflicts: Makefile configs/default progs/glsl/Makefile src/gallium/auxiliary/util/u_simple_shaders.c src/gallium/state_trackers/glx/xlib/xm_api.c src/mesa/drivers/dri/i965/brw_draw_upload.c src/mesa/drivers/dri/i965/brw_vs_emit.c src/mesa/drivers/dri/intel/intel_context.h src/mesa/drivers/dri/intel/intel_pixel.c src/mesa/drivers/dri/intel/intel_pixel_read.c src/mesa/main/texenvprogram.c src/mesa/main/version.h
2009-09-08i965: #include clean-upsBrian Paul
2009-09-08i965: use _mesa_is_bufferobj()Brian Paul
2009-09-08i965: fix incorrect test for vertex position attributeBrian Paul
2009-09-04i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
This avoids sending a bad buffer address to the GPU due to programmer error, and is permitted by the ARB_vbo spec. Note that we still have the opportunity to dereference past the end of the GPU, because we aren't clipping to a correct _MaxElement, but that appears to be harder than it should be. This gets us the 90% solution. Bug #19911. (cherry picked from commit d7430d942f6c7950a92367aeb13b80cf76ccad78)
2009-09-04i965: Don't emit bad packets when no VBs are referenced.Eric Anholt
It appears that sometimes Mesa (and I suppose a VS could as well) emits a program which references no vertex data, and thus we end up with nr_enabled == 0 even though some VBs are enabled. We'd end up emitting VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs. Bug #22945 (wine with an uncompiled VS) (cherry picked from commit d1fbfd0f962347e4153db3852292d44de5aea863)
2009-09-04i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
The code duplication bothered me. (cherry picked from commit 9b9cb30d128fc5f1ba77287696ecd508e640efde)
2009-09-04i965: Set the max index buffer address correctly according to the docs.Eric Anholt
It's the last addressable byte, not the byte after the end of the buffer. (cherry picked from commit b72dea5441e8e9226dabf1826fa3bc129c7bc281)
2009-09-04i965: rename var: s/tmp/vs_inputs/Brian Paul
(cherry picked from commit 840c09fc71542fdfc71edd2a2802925d467567bb)
2009-08-15i965: disable bounds checking on arrays with stride 0Roland Scheidegger
if stride is 0 we cannot use count as max index for bounds checking, since the hardware will simply return 0 as data for indices failing bounds check. If stride is 0 any index should be valid hence simply disable bounds checking in this case. This fixes bugs introduced with e643bc5fc7afb563028f5a089ca5e38172af41a8.
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt
No performance difference proven at 95% confidence with my GLSL demo (n=10).
2009-08-12i965: Use _MaxElement instead of index-calculated min/max for VBO bounds.Eric Anholt
2009-08-03i965: Assert that the offset in the VBO is below the VBO size.Eric Anholt
This avoids sending a bad buffer address to the GPU due to programmer error, and is permitted by the ARB_vbo spec. Note that we still have the opportunity to dereference past the end of the GPU, because we aren't clipping to a correct _MaxElement, but that appears to be harder than it should be. This gets us the 90% solution. Bug #19911.
2009-08-03i965: Don't emit bad packets when no VBs are referenced.Eric Anholt
It appears that sometimes Mesa (and I suppose a VS could as well) emits a program which references no vertex data, and thus we end up with nr_enabled == 0 even though some VBs are enabled. We'd end up emitting VB/VE packet headers of 0xffffffff in that case, leading to GPU hangs. Bug #22945 (wine with an uncompiled VS)
2009-08-03i965: Calculate enabled[] and nr_enabled once and re-use the values.Eric Anholt
The code duplication bothered me.
2009-07-13i965: add support for new chipsetsXiang, Haihao
1. new PCI ids 2. fix some 3D commands on new chipset 3. fix send instruction on new chipset 4. new VUE vertex header 5. ff_sync message (added by Zou Nan Hai <nanhai.zou@intel.com>) 6. the offset in JMPI is in unit of 64bits on new chipset 7. new cube map layout
2009-06-23i965: Set the max index buffer address correctly according to the docs.Eric Anholt
It's the last addressable byte, not the byte after the end of the buffer.
2009-05-21i965: rename var: s/tmp/vs_inputs/Brian Paul
2009-04-06i965: Use GTT maps when available to upload vertex arrays and system VBOs.Eric Anholt
This speeds up OA on my GM45 by 21% (more than the original CPU cost of the upload path). We might still be able to squeeze a few more percent out by avoiding repeatedly mapping/unmapping buffers as we upload elements into them.
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-01 00:05:22 +0000