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Also, fix some RNDD vs. RNDZ confusion elsewhere.
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OPCODE_NOISE4 coming later.
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This is required for scatter writes in destination regions to work.
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The 32-bit immediate value in the i965 instruction word must contain two
copies of any 16-bit constants. brw_imm_uw and brw_imm_w just needed to
copy the value into both halves of the immediate value instruction field.
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most of the sample working with some small modification
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Mostly:
- update #includes
- update STATE_* token code
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There is an errata for Broadwater that threads don't have the instruction/loop
mask stacks initialized on thread spawn. In single program flow mode, those
stacks are not writable, so we can't initialize them. However, they do get
read during ELSE and ENDIF instructions. So, instead, replace branch
instructions in single program flow mode with predicated jumps (ADD to the ip
register), avoiding use of the more complicated branch instructions that may
fail. This is also a minor optimization as no ENDIF equivalent is necessary.
Signed-off-by: Keith Packard <keithp@neko.keithp.com>
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This driver comes from Tungsten Graphics, with a few further modifications by
Intel.
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