android-x86-mesa.git - Androïd/x86 port of Mesa drivers

Age	Commit message (Collapse)	Author
2008-01-29	i965: new integrated graphics chipset support	Xiang, Haihao

2007-11-27	i965: The jump instruction count is added	Xiang, Haihao
	to IP pre-increment, and should point to the first instruction after the do instruction of the do-while block of code
2007-09-29	support continue, fix conditional	Zou Nan hai

2007-06-21	support branch and loop in pixel shader	Zou Nan hai
	most of the sample working with some small modification
2007-04-12	Initial 965 GLSL support	Zou Nan hai

2007-01-06	i965: Avoid branch instructions while in single program flow mode.	Eric Anholt
	There is an errata for Broadwater that threads don't have the instruction/loop mask stacks initialized on thread spawn. In single program flow mode, those stacks are not writable, so we can't initialize them. However, they do get read during ELSE and ENDIF instructions. So, instead, replace branch instructions in single program flow mode with predicated jumps (ADD to the ip register), avoiding use of the more complicated branch instructions that may fail. This is also a minor optimization as no ENDIF equivalent is necessary. Signed-off-by: Keith Packard <keithp@neko.keithp.com>
2006-09-01	fix a couple of cases where a message reg is used as an instruction source.	Keith Whitwell

2006-08-09	Add Intel i965G/Q DRI driver.	Eric Anholt
	This driver comes from Tungsten Graphics, with a few further modifications by Intel.