android-x86-mesa.git - Androïd/x86 port of Mesa drivers

Age	Commit message (Collapse)	Author
2011-01-31	Convert everything from the talloc API to the ralloc API.	Kenneth Graunke

2010-12-04	i965: Fix compile warning about missing opcodes.	Eric Anholt

2010-11-17	glsl: Remove the ir_binop_cross opcode.	Kenneth Graunke

2010-10-26	i965: Handle new ir_unop_round_even in channel expression splitting.	Eric Anholt

2010-10-11	i965: Move FS backend structures to a header.	Eric Anholt
	It's time to start splitting some of this up.
2010-09-22	i965: Update expression splitting for the vector-result change to compares.	Eric Anholt
	Fixes: glsl1-precision exp2 glsl1-precision log2
2010-09-22	i965: Fix the vector/expression splitting for the write_mask change.	Eric Anholt
	+113 piglits.
2010-09-09	i965: Add switch cases for ir_unop_noise, which should have been lowered.	Eric Anholt
	Fixes compiler warnings.
2010-08-26	i965: Add a pass for the FS to reduce vector expressions down to scalar.	Eric Anholt
	This is a step towards implementing a GLSL IR backend for the 965 fragment shader. Because it has downsides with the current codegen, it is hidden under the environment variable INTEL_NEW_FS. This results in an increase in instruction count at the moment (1444 -> 1752 for glsl-fs-raytrace, 345 -> 359 on my demo), because dot products are turned into a series of multiplies and adds instead of a custom expansion of MULs and MACs, and by not splitting the variable types up we don't get tree grafting and thus there are extra moves of temporary storage. However, register count drops for the non-GLSL path (64 -> 56 on my demo shader) because the register allocator sees all the sub-operations.