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path: root/src/mesa/drivers/dri/i965/brw_state_upload.c
AgeCommit message (Collapse)Author
2009-08-12i965: Avoid re-uploading the index buffer when we don't need to.Eric Anholt
No performance difference proven at 95% confidence with my GLSL demo (n=10).
2009-07-07i965: Remove BRW_NEW_INPUT_VARYINGEric Anholt
This state flag has been unused since the ffvertex_prog move to core.
2009-05-06i965: Split WM constant buffer update from other WM surfaces.Eric Anholt
This can avoid re-uploading constant data when it isn't necessary, and is a step towards not updating other surfaces just because constants change. It also brings the upload of the constant buffer next to the creation. This brings openarena performance up another 4%, to 91% of the Mesa 7.4 branch.
2009-05-06i965: Disentangle VS constant surface state from WM surface state.Eric Anholt
Also, only create VS surface state if there's a VS constant buffer to be uploaded, and set the contents of the buffer at the same time as creation.
2009-04-22i965: checkpoint commit: use two state caches instead of oneBrian Paul
The new, second cache will only be used for surface-related items. Since we can create many surfaces the original, single cache could get filled quickly. When we cleared it, we had to regenerate shaders, etc. With two caches, we can avoid doing that.
2009-04-22i965: remove unused state atom entriesBrian Paul
2009-04-22i965: the brw_constant_buffer state atom is no longer dynamicBrian Paul
No more dynamic atoms so we can simplify the state validation code a little.
2009-04-22i965: add _NEW_PROGRAM_CONSTANTS to mesa_bits[] listBrian Paul
2009-02-02i965: Remove brw->attribs now that we can just always look in the GLcontext.Eric Anholt
2009-02-02i965: Delete old metaops code now that there are no remaining consumers.Eric Anholt
2009-01-07i965: Remove worrisome comment about _NEW_PROGRAM signaling fp change.Eric Anholt
Everything now depends on either BRW_NEW_FRAGMENT_PROGRAM or BRW_NEW_VERTEX_PROGRAM.
2008-11-28i965: Remove BRW_WM_LOCK dirty bit, introduced to work around lack of relocs.Eric Anholt
This was causing a prepare of wm state at every primitive emit.
2008-11-28i965: Add debug code for dumping how frequently different dirty bits are set.Eric Anholt
2008-11-06i965: Always check vertex program.Xiang, Haihao
Now i965 also uses the vertex program created by Mesa Core, but this vertex program is not only depend on mesa state _NEW_PROGRAM, so always check the current vertex program is updated or not. This fixes broken demo cubemap.
2008-10-28i965: Fix check_aperture calls to cover everything needed for the prim at once.Eric Anholt
Previously, since my check_aperture API change, we would check each piece of state against the batchbuffer individually, but not all the state against the batchbuffer at once. In addition to not being terribly useful in assuring success, it probably also increased CPU load by calling check_aperture many times per primitive.
2008-10-28intel: Don't keep intel->pClipRects, and instead just calculate it when needed.Eric Anholt
This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change.
2008-10-27i965: Remove dead brw->wrap flag.Eric Anholt
2008-09-28Remove TNL-to-VP tracking from i965Ian Romanick
The i965 driver previously had it's own set of code to convert fixed-function TNL state to a vertex program. Core Mesa has code to do this, so there is no reason to duplicate that effort in the driver. In fact, this duplication leads to bugs when other aspects of the Mesa infrastructure change.
2008-09-10intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change.Eric Anholt
2008-08-24Revert "Revert "Merge branch 'drm-gem'""Dave Airlie
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
2008-08-24Revert "Merge branch 'drm-gem'"Dave Airlie
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c
2008-08-08intel-gem: Update to new check_aperture API for classic mode.Eric Anholt
To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management.
2008-05-07GEM: Remove already-disabled PIPE_CONTROL command.Eric Anholt
This existed to get the icache flushed. However, GEM handles this for us now for sure, and we had disabled it prematurely anyway.
2008-04-18i965: initial attempt at fixing the aperture overflowDave Airlie
Makes state emission into a 2 phase, prepare sets things up and accounts the size of all referenced buffer objects. The emit stage then actually does the batchbuffer touching for emitting the objects. There is an assert in dri_emit_reloc if a reloc occurs for a buffer that hasn't been accounted yet.
2008-02-01[965] Fix indentation.Eric Anholt
2008-02-01i965: Don't emit state if fall back to software rendering. fix #14116Xiang, Haihao
2008-01-29i965: new integrated graphics chipset supportXiang, Haihao
2008-01-09[965] Replace the always_update dirty flag with BRW_NEW_BATCH.Eric Anholt
This allows us to avoid re-emitting some state when validate_state happens multiple times per batchbuffer. Even though we flush batch per primitive currently, that may still happen already if the primitive changed (this should probably be fixed as well).
2008-01-09[965] Remove drawing rect upload, which is handled (better) by the kernel.Eric Anholt
2008-01-03[intel] Convert relocations to not be cleared out on buffer submit.Eric Anholt
We have two consumers of relocations. One is static state buffers, which want the same relocation every time. The other is the batchbuffer, which gets thrown out immediately after submit. This lets us reduce repeated computation for static state buffers, and clean up the code by moving relocations nearer to where the state buffer is computed.
2007-12-14[965] Replace the state cache suballocator with direct dri_bufmgr use.Eric Anholt
The user-space suballocator that was used avoided relocation computations by using the general and surface state base registers and allocating those types of buffers out of pools built on top of single buffer objects. It also avoided calls into the buffer manager for these small state allocations, since only one buffer object was being used. However, the buffer allocation cost appears to be low, and with relocation caching, computing relocations for buffers is essentially free. Additionally, implementing the suballocator required a don't-fence-subdata flag to disable waiting on buffer maps so that writing new data didn't block on rendering using old data, and careful handling when mapping to update old data (which we need to do for unavoidable relocations with FBOs). More importantly, when the suballocator filled, it had no replacement algorithm and just threw out all of the contents and forced them to be recomputed, which is a significant cost. This is the first step, which just changes the buffer type, but doesn't yet improve the hash table to not result in full recompute on overflow. Because the buffers are all allocated out of the general buffer allocator, we can no longer use the general/surface state bases to avoid relocations, and they are set to 0 instead.
2007-12-07[965] Convert the driver to dri_bufmgr interface and enable TTM.Eric Anholt
This is currently believed to work but be a significant performance loss. Performance recovery should be soon to follow. The dri_bo_fake_disable_backing_store() call was added to allow backing store disable like bufmgr_fake.c did, which is a significant performance win (though it's missing the no-fence-subdata part). This commit is a squash merge of the 965-ttm branch, which had some history I wanted to avoid pulling due to noisiness and brokenness at many points for git-bisecting.
2006-08-09Add Intel i965G/Q DRI driver.Eric Anholt
This driver comes from Tungsten Graphics, with a few further modifications by Intel.