| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-02-25 | i965: Set up the SNB sampler state pointers. | Eric Anholt | |
| 2010-02-25 | i965: Move PIPELINE_SELECT to the top of gen6 3d pipeline setup. | Eric Anholt | |
| 2010-02-25 | i965: Untested Sandybridge WM packets. | Eric Anholt | |
| 2010-02-25 | i965: Hook up remaining Sandybridge state packets besides WM. | Eric Anholt | |
| 2010-02-25 | i965: Untested Sandybridge SF setup. | Eric Anholt | |
| 2010-02-25 | i965: Add Sandybridge viewport setup. | Eric Anholt | |
| 2010-02-25 | i965: Enable DRAWING_RECTANGLE emit on Sandybridge. | Eric Anholt | |
| 2010-02-25 | i965: Add Sandybridge scissor state. | Eric Anholt | |
| 2010-02-25 | i965: Set the state base address on Sandybridge. | Eric Anholt | |
| 2010-02-25 | i965: Reconnect the index/vertex setup. | Eric Anholt | |
| 2010-02-25 | i965: Set up the SNB URB. | Eric Anholt | |
| even with vs disabled, still doesn't work. | |||
| 2010-02-25 | i965: Get vp-tri batchbuffers running (no rendering). | Eric Anholt | |
| 2010-02-25 | i965: Add untested REJECT_ALL clip state. | Eric Anholt | |
| 2010-02-25 | i965: Add untested passthrough GS setup. | Eric Anholt | |
| 2010-02-25 | i965: Add untested Sandybridge passthrough VS setup. | Eric Anholt | |
| 2010-02-25 | i965: Start adding support for the Sandybridge CC unit. | Eric Anholt | |
| 2010-02-25 | i965: Update WM surface state setup for sandybridge's new BLEND_STATE. | Eric Anholt | |
| 2010-02-25 | i965: Set up sandybridge depthbuffer. | Eric Anholt | |
| 2010-02-25 | intel: Start adding defines and some bits for sandybridge bringup. | Eric Anholt | |
| 2010-02-19 | Remove _mesa_memset in favor of plain memset. | Kenneth Graunke | |
| This may break the SUNOS4 build, but it's no longer relevant. | |||
| 2010-01-19 | intel: Remove dead note_fence vtbl hook. | Eric Anholt | |
| 2010-01-19 | i965: Remove obsolete comment about the state atoms. | Eric Anholt | |
| 2009-11-21 | i965: Fix several memory leaks on exit. | Eric Anholt | |
| Bug #25194. | |||
| 2009-11-03 | intel: avoid unnecessary front buffer flushing/updating | Brian Paul | |
| Before, if we just called glXMakeCurrent() and didn't render anything we'd still trigger a flushFrontBuffer() call. Now only set the intel->front_buffer_dirty field at state validation time just before we draw something. NOTE: additional calls to intel_check_front_buffer_rendering() might be needed if I missed some rendering paths. | |||
| 2009-10-27 | i965: be clear that the Fallback field is a boolean, not a bitfield | Brian Paul | |
| 2009-09-24 | i965: Clean up some mess with the batch cache. | Eric Anholt | |
| Its flagging of extra state that's already flagged by the vtbl new_batch when appropriate was confusing my tracking down of the OA clear bug. | |||
| 2009-08-26 | i965: added texture unit sanity check | Brian Paul | |
| Check that all the textures needed by the current fragment program actually exist and are valid. | |||
| 2009-08-12 | i965: Avoid re-uploading the index buffer when we don't need to. | Eric Anholt | |
| No performance difference proven at 95% confidence with my GLSL demo (n=10). | |||
| 2009-07-07 | i965: Remove BRW_NEW_INPUT_VARYING | Eric Anholt | |
| This state flag has been unused since the ffvertex_prog move to core. | |||
| 2009-05-06 | i965: Split WM constant buffer update from other WM surfaces. | Eric Anholt | |
| This can avoid re-uploading constant data when it isn't necessary, and is a step towards not updating other surfaces just because constants change. It also brings the upload of the constant buffer next to the creation. This brings openarena performance up another 4%, to 91% of the Mesa 7.4 branch. | |||
| 2009-05-06 | i965: Disentangle VS constant surface state from WM surface state. | Eric Anholt | |
| Also, only create VS surface state if there's a VS constant buffer to be uploaded, and set the contents of the buffer at the same time as creation. | |||
| 2009-04-22 | i965: checkpoint commit: use two state caches instead of one | Brian Paul | |
| The new, second cache will only be used for surface-related items. Since we can create many surfaces the original, single cache could get filled quickly. When we cleared it, we had to regenerate shaders, etc. With two caches, we can avoid doing that. | |||
| 2009-04-22 | i965: remove unused state atom entries | Brian Paul | |
| 2009-04-22 | i965: the brw_constant_buffer state atom is no longer dynamic | Brian Paul | |
| No more dynamic atoms so we can simplify the state validation code a little. | |||
| 2009-04-22 | i965: add _NEW_PROGRAM_CONSTANTS to mesa_bits[] list | Brian Paul | |
| 2009-02-02 | i965: Remove brw->attribs now that we can just always look in the GLcontext. | Eric Anholt | |
| 2009-02-02 | i965: Delete old metaops code now that there are no remaining consumers. | Eric Anholt | |
| 2009-01-07 | i965: Remove worrisome comment about _NEW_PROGRAM signaling fp change. | Eric Anholt | |
| Everything now depends on either BRW_NEW_FRAGMENT_PROGRAM or BRW_NEW_VERTEX_PROGRAM. | |||
| 2008-11-28 | i965: Remove BRW_WM_LOCK dirty bit, introduced to work around lack of relocs. | Eric Anholt | |
| This was causing a prepare of wm state at every primitive emit. | |||
| 2008-11-28 | i965: Add debug code for dumping how frequently different dirty bits are set. | Eric Anholt | |
| 2008-11-06 | i965: Always check vertex program. | Xiang, Haihao | |
| Now i965 also uses the vertex program created by Mesa Core, but this vertex program is not only depend on mesa state _NEW_PROGRAM, so always check the current vertex program is updated or not. This fixes broken demo cubemap. | |||
| 2008-10-28 | i965: Fix check_aperture calls to cover everything needed for the prim at once. | Eric Anholt | |
| Previously, since my check_aperture API change, we would check each piece of state against the batchbuffer individually, but not all the state against the batchbuffer at once. In addition to not being terribly useful in assuring success, it probably also increased CPU load by calling check_aperture many times per primitive. | |||
| 2008-10-28 | intel: Don't keep intel->pClipRects, and instead just calculate it when needed. | Eric Anholt | |
| This avoids issues with dereferencing stale cliprects around intel_draw_buffer time. Additionally, take advantage of cliprects staying constant for FBOs and DRI2, and emit cliprects in the batchbuffer instead of having to flush batch each time they change. | |||
| 2008-10-27 | i965: Remove dead brw->wrap flag. | Eric Anholt | |
| 2008-09-28 | Remove TNL-to-VP tracking from i965 | Ian Romanick | |
| The i965 driver previously had it's own set of code to convert fixed-function TNL state to a vertex program. Core Mesa has code to do this, so there is no reason to duplicate that effort in the driver. In fact, this duplication leads to bugs when other aspects of the Mesa infrastructure change. | |||
| 2008-09-10 | intel: track bufmgr move to libdrm_intel and bufmgr_fake irq emit/wait change. | Eric Anholt | |
| 2008-08-24 | Revert "Revert "Merge branch 'drm-gem'"" | Dave Airlie | |
| This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a. | |||
| 2008-08-24 | Revert "Merge branch 'drm-gem'" | Dave Airlie | |
| This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03. Conflicts: src/mesa/drivers/dri/i965/brw_wm_surface_state.c | |||
| 2008-08-08 | intel-gem: Update to new check_aperture API for classic mode. | Eric Anholt | |
| To do this, I had to clean up some of 965 state upload stuff. We may end up over-emitting state in the aperture overflow case, but that should be rare, and I'd rather have the simplification of state management. | |||
| 2008-05-07 | GEM: Remove already-disabled PIPE_CONTROL command. | Eric Anholt | |
| This existed to get the icache flushed. However, GEM handles this for us now for sure, and we had disabled it prematurely anyway. | |||
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index : android-x86-mesa.git | |
| Androïd/x86 port of Mesa drivers | Hugues Hiegel |
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